f11c7f6305
The isci driver is for the integrated SAS controller in the Intel C600 (Patsburg) chipset. Source files in sys/dev/isci directory are FreeBSD-specific, and sys/dev/isci/scil subdirectory contains an OS-agnostic library (SCIL) published by Intel to control the SAS controller. This library is used primarily as-is in this driver, with some post-processing to better integrate into the kernel build environment. isci.4 and a README in the sys/dev/isci directory contain a few additional details. This driver is only built for amd64 and i386 targets. Sponsored by: Intel Reviewed by: scottl Approved by: scottl
244 lines
8.6 KiB
C
244 lines
8.6 KiB
C
/*-
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* This file is provided under a dual BSD/GPLv2 license. When using or
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* redistributing this file, you may do so under either license.
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*
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* GPL LICENSE SUMMARY
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*
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* Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
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* The full GNU General Public License is included in this distribution
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* in the file called LICENSE.GPL.
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*
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* BSD LICENSE
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*
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* Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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/**
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* @file
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* @brief This file contains the method implementations to translate
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* SCSI Write and Verify command based of the SAT spec.
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*/
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#if !defined(DISABLE_SATI_WRITE_AND_VERIFY)
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#include <dev/isci/scil/sati_write_and_verify.h>
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#include <dev/isci/scil/sati_write.h>
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#include <dev/isci/scil/sati_verify.h>
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#include <dev/isci/scil/sati_callbacks.h>
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#include <dev/isci/scil/sati_util.h>
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#include <dev/isci/scil/intel_ata.h>
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#include <dev/isci/scil/intel_scsi.h>
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/**
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* @brief This function translates a SCSI Write and Verify 10 command
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* into both ATA write and ATA read verify commands. This
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* happens by passing the SCSI IO, ATA IO, and Sequence pointers
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* to both the sati_write_10_translate_command and the
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* sati_verify_10_translate_command.
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*
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* @return Indicate if the command translation succeeded.
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* @retval SCI_SUCCESS This is returned if the command translation was
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* successful.
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* @retval SATI_FAILURE_CHECK_RESPONSE_DATA is returned if there was
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* a problem with the translation of write long.
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* @retval SATI_FAILURE is returned if there the sequence is out of
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* state for a sati_write_and_verify_10 translation.
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*
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*/
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SATI_STATUS sati_write_and_verify_10_translate_command(
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SATI_TRANSLATOR_SEQUENCE_T * sequence,
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void * scsi_io,
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void * ata_io
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)
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{
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SATI_STATUS status;
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if(sequence->state == SATI_SEQUENCE_STATE_INITIAL)
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{
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status = sati_write_10_translate_command(sequence, scsi_io, ata_io);
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sequence->state = SATI_SEQUENCE_STATE_INCOMPLETE;
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sequence->is_translate_response_required = TRUE;
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}
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else if(sequence->state == SATI_SEQUENCE_STATE_INCOMPLETE)
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{
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status = sati_verify_10_translate_command(sequence, scsi_io, ata_io);
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sequence->state = SATI_SEQUENCE_STATE_AWAIT_RESPONSE;
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}
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else
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{
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//SATI sequence is in the wrong state
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return SATI_FAILURE;
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}
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sequence->type = SATI_SEQUENCE_WRITE_AND_VERIFY;
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return status;
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}
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/**
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* @brief This function translates a SCSI Write and Verify 12 command
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* into both ATA write and ATA read verify commands. This
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* happens by passing the SCSI IO, ATA IO, and Sequence pointers
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* to both the sati_write_12_translate_command and the
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* sati_verify_12_translate_command.
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*
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* @return Indicate if the command translation succeeded.
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* @retval SCI_SUCCESS This is returned if the command translation was
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* successful.
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* @retval SATI_FAILURE_CHECK_RESPONSE_DATA is returned if there was
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* a problem with the translation of write long.
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* @retval SATI_FAILURE is returned if there the sequence is out of
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* state for a sati_write_and_verify_12 translation.
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*
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*/
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SATI_STATUS sati_write_and_verify_12_translate_command(
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SATI_TRANSLATOR_SEQUENCE_T * sequence,
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void * scsi_io,
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void * ata_io
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)
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{
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SATI_STATUS status;
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if(sequence->state == SATI_SEQUENCE_STATE_INITIAL)
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{
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status = sati_write_12_translate_command(sequence, scsi_io, ata_io);
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sequence->state = SATI_SEQUENCE_STATE_INCOMPLETE;
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sequence->is_translate_response_required = TRUE;
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}
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else if(sequence->state == SATI_SEQUENCE_STATE_INCOMPLETE)
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{
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status = sati_verify_12_translate_command(sequence, scsi_io, ata_io);
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sequence->state = SATI_SEQUENCE_STATE_AWAIT_RESPONSE;
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}
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else
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{
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//SATI sequence is in the wrong state
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return SATI_FAILURE;
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}
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sequence->type = SATI_SEQUENCE_WRITE_AND_VERIFY;
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return status;
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}
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/**
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* @brief This function translates a SCSI Write and Verify 16 command
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* into both ATA write and ATA read verify commands. This
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* happens by passing the SCSI IO, ATA IO, and Sequence pointers
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* to both the sati_write_16_translate_command and the
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* sati_verify_16_translate_command.
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*
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* @return Indicate if the command translation succeeded.
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* @retval SCI_SUCCESS This is returned if the command translation was
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* successful.
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* @retval SATI_FAILURE_CHECK_RESPONSE_DATA is returned if there was
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* a problem with the translation of write long.
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* @retval SATI_FAILURE is returned if there the sequence is out of
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* state for a sati_write_and_verify_16 translation.
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*
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*/
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SATI_STATUS sati_write_and_verify_16_translate_command(
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SATI_TRANSLATOR_SEQUENCE_T * sequence,
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void * scsi_io,
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void * ata_io
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)
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{
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SATI_STATUS status;
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if(sequence->state == SATI_SEQUENCE_STATE_INITIAL)
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{
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status = sati_write_16_translate_command(sequence, scsi_io, ata_io);
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sequence->state = SATI_SEQUENCE_STATE_INCOMPLETE;
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sequence->is_translate_response_required = TRUE;
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}
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else if(sequence->state == SATI_SEQUENCE_STATE_INCOMPLETE)
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{
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status = sati_verify_16_translate_command(sequence, scsi_io, ata_io);
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sequence->state = SATI_SEQUENCE_STATE_AWAIT_RESPONSE;
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}
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else
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{
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//SATI sequence is in the wrong state
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return SATI_FAILURE;
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}
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sequence->type = SATI_SEQUENCE_WRITE_AND_VERIFY;
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return status;
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}
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/**
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* @brief This function is the response to a sati_write_and_verify
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translation. Since no response translation is required
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this function will only check the sequence state and return
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status.
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*
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* @return Indicate if the command response translation succeeded.
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* @retval SCI_COMPLETE This is returned if the command translation
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is successful and requires no more work.
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* @retval SATI_SEQUENCE_INCOMPLETE This is returned if the command
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translation has finished sending the ATA Write command but
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still needs to complete the Verify portion.
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* @retval SATI_FAILURE is returned if there the sequence is out of
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* state for a sati_write_and_verify translation.
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*
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*/
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SATI_STATUS sati_write_and_verify_translate_response(
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SATI_TRANSLATOR_SEQUENCE_T * sequence,
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void * scsi_io,
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void * ata_io
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)
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{
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if(sequence->state == SATI_SEQUENCE_STATE_INCOMPLETE)
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{
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return SATI_SEQUENCE_INCOMPLETE;
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}
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else if(sequence->state == SATI_SEQUENCE_STATE_AWAIT_RESPONSE)
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{
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sequence->state = SATI_SEQUENCE_STATE_FINAL;
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return SATI_COMPLETE;
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}
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return SATI_FAILURE;
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}
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#endif //!defined(DISABLE_SATI_WRITE_AND_VERIFY)
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