b2608b2c73
cards of different bus types as each bus type may have a different bus mapping. Submitted by: Eivind Eklund <eivind@yes.no>
279 lines
7.9 KiB
C
279 lines
7.9 KiB
C
/*
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* Device probe and attach routines for the following
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* Advanced Systems Inc. SCSI controllers:
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*
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* Connectivity Products:
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* ABP920 - Bus-Master PCI (16 CDB)
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* ABP930 - Bus-Master PCI (16 CDB) *
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* ABP930U - Bus-Master PCI Ultra (16 CDB)
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* ABP930UA - Bus-Master PCI Ultra (16 CDB)
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* ABP960 - Bus-Master PCI MAC/PC (16 CDB) **
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* ABP960U - Bus-Master PCI MAC/PC Ultra (16 CDB)
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*
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* Single Channel Products:
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* ABP940 - Bus-Master PCI (240 CDB)
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* ABP940U - Bus-Master PCI Ultra (240 CDB)
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* ABP970 - Bus-Master PCI MAC/PC (240 CDB)
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* ABP970U - Bus-Master PCI MAC/PC Ultra (240 CDB)
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*
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* Dual Channel Products:
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* ABP950 - Dual Channel Bus-Master PCI (240 CDB Per Channel)
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*
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* Footnotes:
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* * This board has been sold by SIIG as the Fast SCSI Pro PCI.
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* ** This board has been sold by Iomega as a Jaz Jet PCI adapter.
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*
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* Copyright (c) 1997 Justin Gibbs.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions, and the following disclaimer,
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* without modification, immediately at the beginning of the file.
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* 2. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $Id: adv_pci.c,v 1.3 1998/12/14 06:32:54 dillon Exp $
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*/
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#include <pci.h>
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#if NPCI > 0
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <machine/bus_pio.h>
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#include <machine/bus.h>
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#include <pci/pcireg.h>
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#include <pci/pcivar.h>
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#include <dev/advansys/advansys.h>
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#define PCI_BASEADR0 PCI_MAP_REG_START /* I/O Address */
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#define PCI_BASEADR1 PCI_MAP_REG_START + 4 /* Mem I/O Address */
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#define PCI_DEVICE_ID_ADVANSYS_1200A 0x110010CD
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#define PCI_DEVICE_ID_ADVANSYS_1200B 0x120010CD
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#define PCI_DEVICE_ID_ADVANSYS_ULTRA 0x130010CD
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#define PCI_DEVICE_REV_ADVANSYS_3150 0x02
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#define PCI_DEVICE_REV_ADVANSYS_3050 0x03
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#define ADV_PCI_MAX_DMA_ADDR (0xFFFFFFFFL)
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#define ADV_PCI_MAX_DMA_COUNT (0xFFFFFFFFL)
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static const char* advpciprobe(pcici_t tag, pcidi_t type);
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static void advpciattach(pcici_t config_id, int unit);
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/*
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* The overrun buffer shared amongst all PCI adapters.
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*/
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static u_int8_t* overrun_buf;
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static bus_dma_tag_t overrun_dmat;
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static bus_dmamap_t overrun_dmamap;
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static bus_addr_t overrun_physbase;
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static struct pci_device adv_pci_driver = {
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"adv",
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advpciprobe,
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advpciattach,
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&adv_unit,
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NULL
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};
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DATA_SET (pcidevice_set, adv_pci_driver);
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static const char*
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advpciprobe(pcici_t tag, pcidi_t type)
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{
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int rev = pci_conf_read(tag, PCI_CLASS_REG) & 0xff;
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switch (type) {
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case PCI_DEVICE_ID_ADVANSYS_1200A:
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return ("AdvanSys ASC1200A SCSI controller");
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case PCI_DEVICE_ID_ADVANSYS_1200B:
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return ("AdvanSys ASC1200B SCSI controller");
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case PCI_DEVICE_ID_ADVANSYS_ULTRA:
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if (rev == PCI_DEVICE_REV_ADVANSYS_3150)
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return ("AdvanSys ASC3150 Ultra SCSI controller");
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else
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return ("AdvanSys ASC3050 Ultra SCSI controller");
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break;
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default:
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break;
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}
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return (NULL);
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}
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static void
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advpciattach(pcici_t config_id, int unit)
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{
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u_int16_t io_port;
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struct adv_softc *adv;
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u_int32_t id;
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u_int32_t command;
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int error;
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/*
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* Determine the chip version.
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*/
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id = pci_cfgread(config_id, PCI_ID_REG, /*bytes*/4);
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command = pci_cfgread(config_id, PCIR_COMMAND, /*bytes*/1);
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/*
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* These cards do not allow memory mapped accesses, so we must
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* ensure that I/O accesses are available or we won't be able
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* to talk to them.
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*/
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if ((command & (PCIM_CMD_PORTEN|PCIM_CMD_BUSMASTEREN))
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!= (PCIM_CMD_PORTEN|PCIM_CMD_BUSMASTEREN)) {
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command |= PCIM_CMD_PORTEN|PCIM_CMD_BUSMASTEREN;
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pci_cfgwrite(config_id, PCIR_COMMAND, command, /*bytes*/1);
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}
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/*
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* Early chips can't handle non-zero latency timer settings.
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*/
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if (id == PCI_DEVICE_ID_ADVANSYS_1200A
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|| id == PCI_DEVICE_ID_ADVANSYS_1200B) {
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pci_cfgwrite(config_id, PCIR_LATTIMER, /*value*/0, /*bytes*/1);
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}
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if (pci_map_port(config_id, PCI_BASEADR0, &io_port) == 0)
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return;
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if (adv_find_signature(I386_BUS_SPACE_IO, io_port) == 0)
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return;
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adv = adv_alloc(unit, I386_BUS_SPACE_IO, io_port);
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if (adv == NULL)
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return;
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/* Allocate a dmatag for our transfer DMA maps */
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/* XXX Should be a child of the PCI bus dma tag */
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error = bus_dma_tag_create(/*parent*/NULL, /*alignment*/0,
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/*boundary*/0,
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/*lowaddr*/ADV_PCI_MAX_DMA_ADDR,
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/*highaddr*/BUS_SPACE_MAXADDR,
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/*filter*/NULL, /*filterarg*/NULL,
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/*maxsize*/BUS_SPACE_MAXSIZE_32BIT,
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/*nsegments*/BUS_SPACE_UNRESTRICTED,
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/*maxsegsz*/ADV_PCI_MAX_DMA_COUNT,
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/*flags*/0,
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&adv->parent_dmat);
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if (error != 0) {
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printf("%s: Could not allocate DMA tag - error %d\n",
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adv_name(adv), error);
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adv_free(adv);
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return;
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}
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adv->init_level++;
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if (overrun_buf == NULL) {
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/* Need to allocate our overrun buffer */
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if (bus_dma_tag_create(adv->parent_dmat,
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/*alignment*/8, /*boundary*/0,
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ADV_PCI_MAX_DMA_ADDR, BUS_SPACE_MAXADDR,
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/*filter*/NULL, /*filterarg*/NULL,
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ADV_OVERRUN_BSIZE, /*nsegments*/1,
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BUS_SPACE_MAXSIZE_32BIT, /*flags*/0,
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&overrun_dmat) != 0) {
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bus_dma_tag_destroy(adv->parent_dmat);
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adv_free(adv);
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return;
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}
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if (bus_dmamem_alloc(overrun_dmat,
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(void **)&overrun_buf,
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BUS_DMA_NOWAIT,
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&overrun_dmamap) != 0) {
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bus_dma_tag_destroy(overrun_dmat);
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bus_dma_tag_destroy(adv->parent_dmat);
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adv_free(adv);
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return;
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}
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/* And permanently map it in */
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bus_dmamap_load(overrun_dmat, overrun_dmamap,
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overrun_buf, ADV_OVERRUN_BSIZE,
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adv_map, &overrun_physbase,
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/*flags*/0);
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}
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adv->overrun_physbase = overrun_physbase;
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/*
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* Stop the chip.
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*/
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ADV_OUTB(adv, ADV_CHIP_CTRL, ADV_CC_HALT);
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ADV_OUTW(adv, ADV_CHIP_STATUS, 0);
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adv->chip_version = ADV_INB(adv, ADV_NONEISA_CHIP_REVISION);
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adv->type = ADV_PCI;
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/*
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* Setup active negation and signal filtering.
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*/
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{
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u_int8_t extra_cfg;
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if (adv->chip_version >= ADV_CHIP_VER_PCI_ULTRA_3150)
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adv->type |= ADV_ULTRA;
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if (adv->chip_version == ADV_CHIP_VER_PCI_ULTRA_3150)
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extra_cfg = ADV_IFC_ACT_NEG | ADV_IFC_SLEW_RATE;
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else if (adv->chip_version == ADV_CHIP_VER_PCI_ULTRA_3050)
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extra_cfg = ADV_IFC_ACT_NEG | ADV_IFC_WR_EN_FILTER;
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else
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extra_cfg = ADV_IFC_ACT_NEG | ADV_IFC_SLEW_RATE;
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ADV_OUTB(adv, ADV_REG_IFC, extra_cfg);
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}
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if (adv_init(adv) != 0) {
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adv_free(adv);
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return;
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}
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adv->max_dma_count = ADV_PCI_MAX_DMA_COUNT;
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adv->max_dma_addr = ADV_PCI_MAX_DMA_ADDR;
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#if CC_DISABLE_PCI_PARITY_INT
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{
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u_int16_t config_msw;
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config_msw = ADV_INW(adv, ADV_CONFIG_MSW);
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config_msw &= 0xFFC0;
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ADV_OUTW(adv, ADV_CONFIG_MSW, config_msw);
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}
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#endif
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if (id == PCI_DEVICE_ID_ADVANSYS_1200A
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|| id == PCI_DEVICE_ID_ADVANSYS_1200B) {
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adv->bug_fix_control |= ADV_BUG_FIX_IF_NOT_DWB;
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adv->bug_fix_control |= ADV_BUG_FIX_ASYN_USE_SYN;
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adv->fix_asyn_xfer = ~0;
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}
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if ((pci_map_int(config_id, adv_intr, (void *)adv, &cam_imask)) == 0) {
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adv_free(adv);
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return;
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}
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adv_attach(adv);
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}
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#endif /* NPCI > 0 */
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