6ce70ec7f9
Mainly focus on files that use BSD 2-Clause license, however the tool I was using misidentified many licenses so this was mostly a manual - error prone - task. The Software Package Data Exchange (SPDX) group provides a specification to make it easier for automated tools to detect and summarize well known opensource licenses. We are gradually adopting the specification, noting that the tags are considered only advisory and do not, in any way, superceed or replace the license texts.
939 lines
26 KiB
C
939 lines
26 KiB
C
/*-
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* SPDX-License-Identifier: BSD-3-Clause
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*
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* Copyright (c) 1999-2002 Eduardo Horvath
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* from: NetBSD: sbus.c,v 1.50 2002/06/20 18:26:24 eeh Exp
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*/
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/*-
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* Copyright (c) 2002 by Thomas Moestl <tmm@FreeBSD.org>.
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* Copyright (c) 2005 Marius Strobl <marius@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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/*
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* SBus support.
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <sys/malloc.h>
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#include <sys/module.h>
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#include <sys/pcpu.h>
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#include <sys/queue.h>
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#include <sys/reboot.h>
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#include <sys/rman.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include <dev/ofw/openfirm.h>
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#include <machine/bus.h>
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#include <machine/bus_common.h>
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#include <machine/bus_private.h>
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#include <machine/iommureg.h>
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#include <machine/iommuvar.h>
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#include <machine/resource.h>
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#include <sparc64/sbus/ofw_sbus.h>
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#include <sparc64/sbus/sbusreg.h>
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#include <sparc64/sbus/sbusvar.h>
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struct sbus_devinfo {
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int sdi_burstsz;
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int sdi_clockfreq;
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int sdi_slot;
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struct ofw_bus_devinfo sdi_obdinfo;
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struct resource_list sdi_rl;
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};
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/* Range descriptor, allocated for each sc_range. */
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struct sbus_rd {
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bus_addr_t rd_poffset;
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bus_addr_t rd_pend;
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int rd_slot;
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bus_addr_t rd_coffset;
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bus_addr_t rd_cend;
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struct rman rd_rman;
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bus_space_handle_t rd_bushandle;
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struct resource *rd_res;
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};
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struct sbus_softc {
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device_t sc_dev;
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bus_dma_tag_t sc_cdmatag;
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int sc_clockfreq; /* clock frequency (in Hz) */
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int sc_nrange;
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struct sbus_rd *sc_rd;
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int sc_burst; /* burst transfer sizes supp. */
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struct resource *sc_sysio_res;
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int sc_ign; /* IGN for this sysio */
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struct iommu_state sc_is; /* IOMMU state (iommuvar.h) */
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struct resource *sc_ot_ires;
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void *sc_ot_ihand;
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struct resource *sc_pf_ires;
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void *sc_pf_ihand;
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};
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#define SYSIO_READ8(sc, off) \
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bus_read_8((sc)->sc_sysio_res, (off))
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#define SYSIO_WRITE8(sc, off, v) \
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bus_write_8((sc)->sc_sysio_res, (off), (v))
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static device_probe_t sbus_probe;
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static device_attach_t sbus_attach;
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static bus_print_child_t sbus_print_child;
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static bus_probe_nomatch_t sbus_probe_nomatch;
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static bus_read_ivar_t sbus_read_ivar;
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static bus_get_resource_list_t sbus_get_resource_list;
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static bus_setup_intr_t sbus_setup_intr;
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static bus_alloc_resource_t sbus_alloc_resource;
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static bus_activate_resource_t sbus_activate_resource;
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static bus_adjust_resource_t sbus_adjust_resource;
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static bus_release_resource_t sbus_release_resource;
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static bus_get_dma_tag_t sbus_get_dma_tag;
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static ofw_bus_get_devinfo_t sbus_get_devinfo;
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static int sbus_inlist(const char *, const char *const *);
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static struct sbus_devinfo * sbus_setup_dinfo(device_t, struct sbus_softc *,
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phandle_t);
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static void sbus_destroy_dinfo(struct sbus_devinfo *);
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static void sbus_intr_enable(void *);
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static void sbus_intr_disable(void *);
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static void sbus_intr_assign(void *);
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static void sbus_intr_clear(void *);
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static int sbus_find_intrmap(struct sbus_softc *, u_int, bus_addr_t *,
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bus_addr_t *);
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static driver_intr_t sbus_overtemp;
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static driver_intr_t sbus_pwrfail;
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static int sbus_print_res(struct sbus_devinfo *);
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static device_method_t sbus_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, sbus_probe),
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DEVMETHOD(device_attach, sbus_attach),
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DEVMETHOD(device_shutdown, bus_generic_shutdown),
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DEVMETHOD(device_suspend, bus_generic_suspend),
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DEVMETHOD(device_resume, bus_generic_resume),
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/* Bus interface */
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DEVMETHOD(bus_print_child, sbus_print_child),
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DEVMETHOD(bus_probe_nomatch, sbus_probe_nomatch),
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DEVMETHOD(bus_read_ivar, sbus_read_ivar),
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DEVMETHOD(bus_alloc_resource, sbus_alloc_resource),
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DEVMETHOD(bus_activate_resource, sbus_activate_resource),
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DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
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DEVMETHOD(bus_adjust_resource, sbus_adjust_resource),
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DEVMETHOD(bus_release_resource, sbus_release_resource),
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DEVMETHOD(bus_setup_intr, sbus_setup_intr),
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DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
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DEVMETHOD(bus_get_resource, bus_generic_rl_get_resource),
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DEVMETHOD(bus_get_resource_list, sbus_get_resource_list),
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DEVMETHOD(bus_child_pnpinfo_str, ofw_bus_gen_child_pnpinfo_str),
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DEVMETHOD(bus_get_dma_tag, sbus_get_dma_tag),
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/* ofw_bus interface */
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DEVMETHOD(ofw_bus_get_devinfo, sbus_get_devinfo),
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DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat),
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DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model),
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DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name),
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DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node),
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DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type),
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DEVMETHOD_END
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};
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static driver_t sbus_driver = {
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"sbus",
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sbus_methods,
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sizeof(struct sbus_softc),
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};
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static devclass_t sbus_devclass;
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EARLY_DRIVER_MODULE(sbus, nexus, sbus_driver, sbus_devclass, NULL, NULL,
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BUS_PASS_BUS);
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MODULE_DEPEND(sbus, nexus, 1, 1, 1);
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MODULE_VERSION(sbus, 1);
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#define OFW_SBUS_TYPE "sbus"
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#define OFW_SBUS_NAME "sbus"
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static const struct intr_controller sbus_ic = {
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sbus_intr_enable,
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sbus_intr_disable,
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sbus_intr_assign,
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sbus_intr_clear
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};
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struct sbus_icarg {
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struct sbus_softc *sica_sc;
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bus_addr_t sica_map;
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bus_addr_t sica_clr;
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};
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static const char *const sbus_order_first[] = {
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"auxio",
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"dma",
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NULL
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};
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static int
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sbus_inlist(const char *name, const char *const *list)
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{
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int i;
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if (name == NULL)
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return (0);
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for (i = 0; list[i] != NULL; i++) {
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if (strcmp(name, list[i]) == 0)
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return (1);
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}
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return (0);
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}
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static int
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sbus_probe(device_t dev)
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{
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const char *t;
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t = ofw_bus_get_type(dev);
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if (((t == NULL || strcmp(t, OFW_SBUS_TYPE) != 0)) &&
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strcmp(ofw_bus_get_name(dev), OFW_SBUS_NAME) != 0)
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return (ENXIO);
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device_set_desc(dev, "U2S UPA-SBus bridge");
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return (0);
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}
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static int
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sbus_attach(device_t dev)
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{
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struct sbus_softc *sc;
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struct sbus_devinfo *sdi;
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struct sbus_icarg *sica;
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struct sbus_ranges *range;
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struct resource *res;
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struct resource_list *rl;
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device_t cdev;
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bus_addr_t intrclr, intrmap, phys;
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bus_size_t size;
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u_long vec;
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phandle_t child, node;
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uint32_t prop;
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int i, j;
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sc = device_get_softc(dev);
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sc->sc_dev = dev;
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node = ofw_bus_get_node(dev);
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i = 0;
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sc->sc_sysio_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &i,
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RF_ACTIVE);
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if (sc->sc_sysio_res == NULL)
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panic("%s: cannot allocate device memory", __func__);
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if (OF_getprop(node, "interrupts", &prop, sizeof(prop)) == -1)
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panic("%s: cannot get IGN", __func__);
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sc->sc_ign = INTIGN(prop);
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/*
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* Record clock frequency for synchronous SCSI.
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* IS THIS THE CORRECT DEFAULT??
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*/
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if (OF_getprop(node, "clock-frequency", &prop, sizeof(prop)) == -1)
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prop = 25000000;
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sc->sc_clockfreq = prop;
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prop /= 1000;
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device_printf(dev, "clock %d.%03d MHz\n", prop / 1000, prop % 1000);
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/*
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* Collect address translations from the OBP.
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*/
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if ((sc->sc_nrange = OF_getprop_alloc(node, "ranges",
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sizeof(*range), (void **)&range)) == -1) {
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panic("%s: error getting ranges property", __func__);
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}
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sc->sc_rd = malloc(sizeof(*sc->sc_rd) * sc->sc_nrange, M_DEVBUF,
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M_NOWAIT | M_ZERO);
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if (sc->sc_rd == NULL)
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panic("%s: cannot allocate rmans", __func__);
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/*
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* Preallocate all space that the SBus bridge decodes, so that nothing
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* else gets in the way; set up rmans etc.
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*/
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rl = BUS_GET_RESOURCE_LIST(device_get_parent(dev), dev);
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for (i = 0; i < sc->sc_nrange; i++) {
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phys = range[i].poffset | ((bus_addr_t)range[i].pspace << 32);
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size = range[i].size;
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sc->sc_rd[i].rd_slot = range[i].cspace;
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sc->sc_rd[i].rd_coffset = range[i].coffset;
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sc->sc_rd[i].rd_cend = sc->sc_rd[i].rd_coffset + size;
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j = resource_list_add_next(rl, SYS_RES_MEMORY, phys,
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phys + size - 1, size);
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if ((res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &j,
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RF_ACTIVE)) == NULL)
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panic("%s: cannot allocate decoded range", __func__);
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sc->sc_rd[i].rd_bushandle = rman_get_bushandle(res);
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sc->sc_rd[i].rd_rman.rm_type = RMAN_ARRAY;
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sc->sc_rd[i].rd_rman.rm_descr = "SBus Device Memory";
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if (rman_init(&sc->sc_rd[i].rd_rman) != 0 ||
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rman_manage_region(&sc->sc_rd[i].rd_rman, 0, size) != 0)
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panic("%s: failed to set up memory rman", __func__);
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sc->sc_rd[i].rd_poffset = phys;
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sc->sc_rd[i].rd_pend = phys + size;
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sc->sc_rd[i].rd_res = res;
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}
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OF_prop_free(range);
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/*
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* Get the SBus burst transfer size if burst transfers are supported.
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*/
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if (OF_getprop(node, "up-burst-sizes", &sc->sc_burst,
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sizeof(sc->sc_burst)) == -1 || sc->sc_burst == 0)
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sc->sc_burst =
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(SBUS_BURST64_DEF << SBUS_BURST64_SHIFT) | SBUS_BURST_DEF;
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/* initialise the IOMMU */
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/* punch in our copies */
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sc->sc_is.is_pmaxaddr = IOMMU_MAXADDR(SBUS_IOMMU_BITS);
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sc->sc_is.is_bustag = rman_get_bustag(sc->sc_sysio_res);
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sc->sc_is.is_bushandle = rman_get_bushandle(sc->sc_sysio_res);
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sc->sc_is.is_iommu = SBR_IOMMU;
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sc->sc_is.is_dtag = SBR_IOMMU_TLB_TAG_DIAG;
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sc->sc_is.is_ddram = SBR_IOMMU_TLB_DATA_DIAG;
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sc->sc_is.is_dqueue = SBR_IOMMU_QUEUE_DIAG;
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sc->sc_is.is_dva = SBR_IOMMU_SVADIAG;
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sc->sc_is.is_dtcmp = 0;
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sc->sc_is.is_sb[0] = SBR_STRBUF;
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sc->sc_is.is_sb[1] = 0;
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/*
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* Note: the SBus IOMMU ignores the high bits of an address, so a NULL
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* DMA pointer will be translated by the first page of the IOTSB.
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* To detect bugs we'll allocate and ignore the first entry.
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*/
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iommu_init(device_get_nameunit(dev), &sc->sc_is, 3, -1, 1);
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/* Create the DMA tag. */
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if (bus_dma_tag_create(bus_get_dma_tag(dev), 8, 0,
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sc->sc_is.is_pmaxaddr, ~0, NULL, NULL, sc->sc_is.is_pmaxaddr,
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0xff, 0xffffffff, 0, NULL, NULL, &sc->sc_cdmatag) != 0)
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panic("%s: bus_dma_tag_create failed", __func__);
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/* Customize the tag. */
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sc->sc_cdmatag->dt_cookie = &sc->sc_is;
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sc->sc_cdmatag->dt_mt = &iommu_dma_methods;
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/*
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* Hunt through all the interrupt mapping regs and register our
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* interrupt controller for the corresponding interrupt vectors.
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* We do this early in order to be able to catch stray interrupts.
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*/
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for (i = 0; i <= SBUS_MAX_INO; i++) {
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if (sbus_find_intrmap(sc, i, &intrmap, &intrclr) == 0)
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continue;
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sica = malloc(sizeof(*sica), M_DEVBUF, M_NOWAIT);
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if (sica == NULL)
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panic("%s: could not allocate interrupt controller "
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"argument", __func__);
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sica->sica_sc = sc;
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sica->sica_map = intrmap;
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sica->sica_clr = intrclr;
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#ifdef SBUS_DEBUG
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device_printf(dev,
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"intr map (INO %d, %s) %#lx: %#lx, clr: %#lx\n",
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i, (i & INTMAP_OBIO_MASK) == 0 ? "SBus slot" : "OBIO",
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(u_long)intrmap, (u_long)SYSIO_READ8(sc, intrmap),
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(u_long)intrclr);
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#endif
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j = intr_controller_register(INTMAP_VEC(sc->sc_ign, i),
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&sbus_ic, sica);
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if (j != 0)
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device_printf(dev, "could not register interrupt "
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"controller for INO %d (%d)\n", i, j);
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}
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|
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/* Enable the over-temperature and power-fail interrupts. */
|
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i = 4;
|
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sc->sc_ot_ires = bus_alloc_resource_any(dev, SYS_RES_IRQ, &i,
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RF_ACTIVE);
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if (sc->sc_ot_ires == NULL ||
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INTIGN(vec = rman_get_start(sc->sc_ot_ires)) != sc->sc_ign ||
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INTVEC(SYSIO_READ8(sc, SBR_THERM_INT_MAP)) != vec ||
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intr_vectors[vec].iv_ic != &sbus_ic ||
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bus_setup_intr(dev, sc->sc_ot_ires, INTR_TYPE_MISC | INTR_BRIDGE,
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NULL, sbus_overtemp, sc, &sc->sc_ot_ihand) != 0)
|
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panic("%s: failed to set up temperature interrupt", __func__);
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i = 3;
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sc->sc_pf_ires = bus_alloc_resource_any(dev, SYS_RES_IRQ, &i,
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RF_ACTIVE);
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|
if (sc->sc_pf_ires == NULL ||
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INTIGN(vec = rman_get_start(sc->sc_pf_ires)) != sc->sc_ign ||
|
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INTVEC(SYSIO_READ8(sc, SBR_POWER_INT_MAP)) != vec ||
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intr_vectors[vec].iv_ic != &sbus_ic ||
|
|
bus_setup_intr(dev, sc->sc_pf_ires, INTR_TYPE_MISC | INTR_BRIDGE,
|
|
NULL, sbus_pwrfail, sc, &sc->sc_pf_ihand) != 0)
|
|
panic("%s: failed to set up power fail interrupt", __func__);
|
|
|
|
/* Initialize the counter-timer. */
|
|
sparc64_counter_init(device_get_nameunit(dev),
|
|
rman_get_bustag(sc->sc_sysio_res),
|
|
rman_get_bushandle(sc->sc_sysio_res), SBR_TC0);
|
|
|
|
/*
|
|
* Loop through ROM children, fixing any relative addresses
|
|
* and then configuring each device.
|
|
*/
|
|
for (child = OF_child(node); child != 0; child = OF_peer(child)) {
|
|
if ((sdi = sbus_setup_dinfo(dev, sc, child)) == NULL)
|
|
continue;
|
|
/*
|
|
* For devices where there are variants that are actually
|
|
* split into two SBus devices (as opposed to the first
|
|
* half of the device being a SBus device and the second
|
|
* half hanging off of the first one) like 'auxio' and
|
|
* 'SUNW,fdtwo' or 'dma' and 'esp' probe the SBus device
|
|
* which is a prerequisite to the driver attaching to the
|
|
* second one with a lower order. Saves us from dealing
|
|
* with different probe orders in the respective device
|
|
* drivers which generally is more hackish.
|
|
*/
|
|
cdev = device_add_child_ordered(dev, (OF_child(child) == 0 &&
|
|
sbus_inlist(sdi->sdi_obdinfo.obd_name, sbus_order_first)) ?
|
|
SBUS_ORDER_FIRST : SBUS_ORDER_NORMAL, NULL, -1);
|
|
if (cdev == NULL) {
|
|
device_printf(dev,
|
|
"<%s>: device_add_child_ordered failed\n",
|
|
sdi->sdi_obdinfo.obd_name);
|
|
sbus_destroy_dinfo(sdi);
|
|
continue;
|
|
}
|
|
device_set_ivars(cdev, sdi);
|
|
}
|
|
return (bus_generic_attach(dev));
|
|
}
|
|
|
|
static struct sbus_devinfo *
|
|
sbus_setup_dinfo(device_t dev, struct sbus_softc *sc, phandle_t node)
|
|
{
|
|
struct sbus_devinfo *sdi;
|
|
struct sbus_regs *reg;
|
|
u_int32_t base, iv, *intr;
|
|
int i, nreg, nintr, slot, rslot;
|
|
|
|
sdi = malloc(sizeof(*sdi), M_DEVBUF, M_ZERO | M_WAITOK);
|
|
if (ofw_bus_gen_setup_devinfo(&sdi->sdi_obdinfo, node) != 0) {
|
|
free(sdi, M_DEVBUF);
|
|
return (NULL);
|
|
}
|
|
resource_list_init(&sdi->sdi_rl);
|
|
slot = -1;
|
|
nreg = OF_getprop_alloc(node, "reg", sizeof(*reg), (void **)®);
|
|
if (nreg == -1) {
|
|
if (sdi->sdi_obdinfo.obd_type == NULL ||
|
|
strcmp(sdi->sdi_obdinfo.obd_type, "hierarchical") != 0) {
|
|
device_printf(dev, "<%s>: incomplete\n",
|
|
sdi->sdi_obdinfo.obd_name);
|
|
goto fail;
|
|
}
|
|
} else {
|
|
for (i = 0; i < nreg; i++) {
|
|
base = reg[i].sbr_offset;
|
|
if (SBUS_ABS(base)) {
|
|
rslot = SBUS_ABS_TO_SLOT(base);
|
|
base = SBUS_ABS_TO_OFFSET(base);
|
|
} else
|
|
rslot = reg[i].sbr_slot;
|
|
if (slot != -1 && slot != rslot) {
|
|
device_printf(dev, "<%s>: multiple slots\n",
|
|
sdi->sdi_obdinfo.obd_name);
|
|
OF_prop_free(reg);
|
|
goto fail;
|
|
}
|
|
slot = rslot;
|
|
|
|
resource_list_add(&sdi->sdi_rl, SYS_RES_MEMORY, i,
|
|
base, base + reg[i].sbr_size, reg[i].sbr_size);
|
|
}
|
|
OF_prop_free(reg);
|
|
}
|
|
sdi->sdi_slot = slot;
|
|
|
|
/*
|
|
* The `interrupts' property contains the SBus interrupt level.
|
|
*/
|
|
nintr = OF_getprop_alloc(node, "interrupts", sizeof(*intr),
|
|
(void **)&intr);
|
|
if (nintr != -1) {
|
|
for (i = 0; i < nintr; i++) {
|
|
iv = intr[i];
|
|
/*
|
|
* SBus card devices need the slot number encoded into
|
|
* the vector as this is generally not done.
|
|
*/
|
|
if ((iv & INTMAP_OBIO_MASK) == 0)
|
|
iv |= slot << 3;
|
|
iv = INTMAP_VEC(sc->sc_ign, iv);
|
|
resource_list_add(&sdi->sdi_rl, SYS_RES_IRQ, i,
|
|
iv, iv, 1);
|
|
}
|
|
OF_prop_free(intr);
|
|
}
|
|
if (OF_getprop(node, "burst-sizes", &sdi->sdi_burstsz,
|
|
sizeof(sdi->sdi_burstsz)) == -1)
|
|
sdi->sdi_burstsz = sc->sc_burst;
|
|
else
|
|
sdi->sdi_burstsz &= sc->sc_burst;
|
|
if (OF_getprop(node, "clock-frequency", &sdi->sdi_clockfreq,
|
|
sizeof(sdi->sdi_clockfreq)) == -1)
|
|
sdi->sdi_clockfreq = sc->sc_clockfreq;
|
|
|
|
return (sdi);
|
|
|
|
fail:
|
|
sbus_destroy_dinfo(sdi);
|
|
return (NULL);
|
|
}
|
|
|
|
static void
|
|
sbus_destroy_dinfo(struct sbus_devinfo *dinfo)
|
|
{
|
|
|
|
resource_list_free(&dinfo->sdi_rl);
|
|
ofw_bus_gen_destroy_devinfo(&dinfo->sdi_obdinfo);
|
|
free(dinfo, M_DEVBUF);
|
|
}
|
|
|
|
static int
|
|
sbus_print_child(device_t dev, device_t child)
|
|
{
|
|
int rv;
|
|
|
|
rv = bus_print_child_header(dev, child);
|
|
rv += sbus_print_res(device_get_ivars(child));
|
|
rv += bus_print_child_footer(dev, child);
|
|
return (rv);
|
|
}
|
|
|
|
static void
|
|
sbus_probe_nomatch(device_t dev, device_t child)
|
|
{
|
|
const char *type;
|
|
|
|
device_printf(dev, "<%s>", ofw_bus_get_name(child));
|
|
sbus_print_res(device_get_ivars(child));
|
|
type = ofw_bus_get_type(child);
|
|
printf(" type %s (no driver attached)\n",
|
|
type != NULL ? type : "unknown");
|
|
}
|
|
|
|
static int
|
|
sbus_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
|
|
{
|
|
struct sbus_softc *sc;
|
|
struct sbus_devinfo *dinfo;
|
|
|
|
sc = device_get_softc(dev);
|
|
if ((dinfo = device_get_ivars(child)) == NULL)
|
|
return (ENOENT);
|
|
switch (which) {
|
|
case SBUS_IVAR_BURSTSZ:
|
|
*result = dinfo->sdi_burstsz;
|
|
break;
|
|
case SBUS_IVAR_CLOCKFREQ:
|
|
*result = dinfo->sdi_clockfreq;
|
|
break;
|
|
case SBUS_IVAR_IGN:
|
|
*result = sc->sc_ign;
|
|
break;
|
|
case SBUS_IVAR_SLOT:
|
|
*result = dinfo->sdi_slot;
|
|
break;
|
|
default:
|
|
return (ENOENT);
|
|
}
|
|
return (0);
|
|
}
|
|
|
|
static struct resource_list *
|
|
sbus_get_resource_list(device_t dev, device_t child)
|
|
{
|
|
struct sbus_devinfo *sdi;
|
|
|
|
sdi = device_get_ivars(child);
|
|
return (&sdi->sdi_rl);
|
|
}
|
|
|
|
static void
|
|
sbus_intr_enable(void *arg)
|
|
{
|
|
struct intr_vector *iv = arg;
|
|
struct sbus_icarg *sica = iv->iv_icarg;
|
|
|
|
SYSIO_WRITE8(sica->sica_sc, sica->sica_map,
|
|
INTMAP_ENABLE(iv->iv_vec, iv->iv_mid));
|
|
}
|
|
|
|
static void
|
|
sbus_intr_disable(void *arg)
|
|
{
|
|
struct intr_vector *iv = arg;
|
|
struct sbus_icarg *sica = iv->iv_icarg;
|
|
|
|
SYSIO_WRITE8(sica->sica_sc, sica->sica_map, iv->iv_vec);
|
|
}
|
|
|
|
static void
|
|
sbus_intr_assign(void *arg)
|
|
{
|
|
struct intr_vector *iv = arg;
|
|
struct sbus_icarg *sica = iv->iv_icarg;
|
|
|
|
SYSIO_WRITE8(sica->sica_sc, sica->sica_map, INTMAP_TID(
|
|
SYSIO_READ8(sica->sica_sc, sica->sica_map), iv->iv_mid));
|
|
}
|
|
|
|
static void
|
|
sbus_intr_clear(void *arg)
|
|
{
|
|
struct intr_vector *iv = arg;
|
|
struct sbus_icarg *sica = iv->iv_icarg;
|
|
|
|
SYSIO_WRITE8(sica->sica_sc, sica->sica_clr, INTCLR_IDLE);
|
|
}
|
|
|
|
static int
|
|
sbus_find_intrmap(struct sbus_softc *sc, u_int ino, bus_addr_t *intrmapptr,
|
|
bus_addr_t *intrclrptr)
|
|
{
|
|
bus_addr_t intrclr, intrmap;
|
|
int i;
|
|
|
|
if (ino > SBUS_MAX_INO) {
|
|
device_printf(sc->sc_dev, "out of range INO %d requested\n",
|
|
ino);
|
|
return (0);
|
|
}
|
|
|
|
if ((ino & INTMAP_OBIO_MASK) == 0) {
|
|
intrmap = SBR_SLOT0_INT_MAP + INTSLOT(ino) * 8;
|
|
intrclr = SBR_SLOT0_INT_CLR +
|
|
(INTSLOT(ino) * 8 * 8) + (INTPRI(ino) * 8);
|
|
} else {
|
|
intrclr = 0;
|
|
for (i = 0, intrmap = SBR_SCSI_INT_MAP;
|
|
intrmap <= SBR_RESERVED_INT_MAP; intrmap += 8, i++) {
|
|
if (INTVEC(SYSIO_READ8(sc, intrmap)) ==
|
|
INTMAP_VEC(sc->sc_ign, ino)) {
|
|
intrclr = SBR_SCSI_INT_CLR + i * 8;
|
|
break;
|
|
}
|
|
}
|
|
if (intrclr == 0)
|
|
return (0);
|
|
}
|
|
if (intrmapptr != NULL)
|
|
*intrmapptr = intrmap;
|
|
if (intrclrptr != NULL)
|
|
*intrclrptr = intrclr;
|
|
return (1);
|
|
}
|
|
|
|
static int
|
|
sbus_setup_intr(device_t dev, device_t child, struct resource *ires, int flags,
|
|
driver_filter_t *filt, driver_intr_t *intr, void *arg, void **cookiep)
|
|
{
|
|
struct sbus_softc *sc;
|
|
u_long vec;
|
|
|
|
sc = device_get_softc(dev);
|
|
/*
|
|
* Make sure the vector is fully specified and we registered
|
|
* our interrupt controller for it.
|
|
*/
|
|
vec = rman_get_start(ires);
|
|
if (INTIGN(vec) != sc->sc_ign || intr_vectors[vec].iv_ic != &sbus_ic) {
|
|
device_printf(dev, "invalid interrupt vector 0x%lx\n", vec);
|
|
return (EINVAL);
|
|
}
|
|
return (bus_generic_setup_intr(dev, child, ires, flags, filt, intr,
|
|
arg, cookiep));
|
|
}
|
|
|
|
static struct resource *
|
|
sbus_alloc_resource(device_t bus, device_t child, int type, int *rid,
|
|
rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
|
|
{
|
|
struct sbus_softc *sc;
|
|
struct rman *rm;
|
|
struct resource *rv;
|
|
struct resource_list *rl;
|
|
struct resource_list_entry *rle;
|
|
device_t schild;
|
|
bus_addr_t toffs;
|
|
bus_size_t tend;
|
|
int i, slot;
|
|
int isdefault, passthrough;
|
|
|
|
isdefault = RMAN_IS_DEFAULT_RANGE(start, end);
|
|
passthrough = (device_get_parent(child) != bus);
|
|
rle = NULL;
|
|
sc = device_get_softc(bus);
|
|
rl = BUS_GET_RESOURCE_LIST(bus, child);
|
|
switch (type) {
|
|
case SYS_RES_IRQ:
|
|
return (resource_list_alloc(rl, bus, child, type, rid, start,
|
|
end, count, flags));
|
|
case SYS_RES_MEMORY:
|
|
if (!passthrough) {
|
|
rle = resource_list_find(rl, type, *rid);
|
|
if (rle == NULL)
|
|
return (NULL);
|
|
if (rle->res != NULL)
|
|
panic("%s: resource entry is busy", __func__);
|
|
if (isdefault) {
|
|
start = rle->start;
|
|
count = ulmax(count, rle->count);
|
|
end = ulmax(rle->end, start + count - 1);
|
|
}
|
|
}
|
|
rm = NULL;
|
|
schild = child;
|
|
while (device_get_parent(schild) != bus)
|
|
schild = device_get_parent(schild);
|
|
slot = sbus_get_slot(schild);
|
|
for (i = 0; i < sc->sc_nrange; i++) {
|
|
if (sc->sc_rd[i].rd_slot != slot ||
|
|
start < sc->sc_rd[i].rd_coffset ||
|
|
start > sc->sc_rd[i].rd_cend)
|
|
continue;
|
|
/* Disallow cross-range allocations. */
|
|
if (end > sc->sc_rd[i].rd_cend)
|
|
return (NULL);
|
|
/* We've found the connection to the parent bus */
|
|
toffs = start - sc->sc_rd[i].rd_coffset;
|
|
tend = end - sc->sc_rd[i].rd_coffset;
|
|
rm = &sc->sc_rd[i].rd_rman;
|
|
break;
|
|
}
|
|
if (rm == NULL)
|
|
return (NULL);
|
|
|
|
rv = rman_reserve_resource(rm, toffs, tend, count, flags &
|
|
~RF_ACTIVE, child);
|
|
if (rv == NULL)
|
|
return (NULL);
|
|
rman_set_rid(rv, *rid);
|
|
|
|
if ((flags & RF_ACTIVE) != 0 && bus_activate_resource(child,
|
|
type, *rid, rv)) {
|
|
rman_release_resource(rv);
|
|
return (NULL);
|
|
}
|
|
if (!passthrough)
|
|
rle->res = rv;
|
|
return (rv);
|
|
default:
|
|
return (NULL);
|
|
}
|
|
}
|
|
|
|
static int
|
|
sbus_activate_resource(device_t bus, device_t child, int type, int rid,
|
|
struct resource *r)
|
|
{
|
|
struct sbus_softc *sc;
|
|
struct bus_space_tag *tag;
|
|
int i;
|
|
|
|
switch (type) {
|
|
case SYS_RES_IRQ:
|
|
return (bus_generic_activate_resource(bus, child, type, rid,
|
|
r));
|
|
case SYS_RES_MEMORY:
|
|
sc = device_get_softc(bus);
|
|
for (i = 0; i < sc->sc_nrange; i++) {
|
|
if (rman_is_region_manager(r,
|
|
&sc->sc_rd[i].rd_rman) != 0) {
|
|
tag = sparc64_alloc_bus_tag(r, SBUS_BUS_SPACE);
|
|
if (tag == NULL)
|
|
return (ENOMEM);
|
|
rman_set_bustag(r, tag);
|
|
rman_set_bushandle(r,
|
|
sc->sc_rd[i].rd_bushandle +
|
|
rman_get_start(r));
|
|
return (rman_activate_resource(r));
|
|
}
|
|
}
|
|
/* FALLTHROUGH */
|
|
default:
|
|
return (EINVAL);
|
|
}
|
|
}
|
|
|
|
static int
|
|
sbus_adjust_resource(device_t bus, device_t child, int type,
|
|
struct resource *r, rman_res_t start, rman_res_t end)
|
|
{
|
|
struct sbus_softc *sc;
|
|
int i;
|
|
|
|
if (type == SYS_RES_MEMORY) {
|
|
sc = device_get_softc(bus);
|
|
for (i = 0; i < sc->sc_nrange; i++)
|
|
if (rman_is_region_manager(r,
|
|
&sc->sc_rd[i].rd_rman) != 0)
|
|
return (rman_adjust_resource(r, start, end));
|
|
return (EINVAL);
|
|
}
|
|
return (bus_generic_adjust_resource(bus, child, type, r, start, end));
|
|
}
|
|
|
|
static int
|
|
sbus_release_resource(device_t bus, device_t child, int type, int rid,
|
|
struct resource *r)
|
|
{
|
|
struct resource_list *rl;
|
|
struct resource_list_entry *rle;
|
|
int error, passthrough;
|
|
|
|
passthrough = (device_get_parent(child) != bus);
|
|
rl = BUS_GET_RESOURCE_LIST(bus, child);
|
|
if (type == SYS_RES_MEMORY) {
|
|
if ((rman_get_flags(r) & RF_ACTIVE) != 0) {
|
|
error = bus_deactivate_resource(child, type, rid, r);
|
|
if (error)
|
|
return (error);
|
|
}
|
|
error = rman_release_resource(r);
|
|
if (error != 0)
|
|
return (error);
|
|
if (!passthrough) {
|
|
rle = resource_list_find(rl, type, rid);
|
|
KASSERT(rle != NULL,
|
|
("%s: resource entry not found!", __func__));
|
|
KASSERT(rle->res != NULL,
|
|
("%s: resource entry is not busy", __func__));
|
|
rle->res = NULL;
|
|
}
|
|
return (0);
|
|
}
|
|
return (resource_list_release(rl, bus, child, type, rid, r));
|
|
}
|
|
|
|
static bus_dma_tag_t
|
|
sbus_get_dma_tag(device_t bus, device_t child)
|
|
{
|
|
struct sbus_softc *sc;
|
|
|
|
sc = device_get_softc(bus);
|
|
return (sc->sc_cdmatag);
|
|
}
|
|
|
|
static const struct ofw_bus_devinfo *
|
|
sbus_get_devinfo(device_t bus, device_t child)
|
|
{
|
|
struct sbus_devinfo *sdi;
|
|
|
|
sdi = device_get_ivars(child);
|
|
return (&sdi->sdi_obdinfo);
|
|
}
|
|
|
|
/*
|
|
* Handle an overtemp situation.
|
|
*
|
|
* SPARCs have temperature sensors which generate interrupts
|
|
* if the machine's temperature exceeds a certain threshold.
|
|
* This handles the interrupt and powers off the machine.
|
|
* The same needs to be done to PCI controller drivers.
|
|
*/
|
|
static void
|
|
sbus_overtemp(void *arg __unused)
|
|
{
|
|
static int shutdown;
|
|
|
|
/* As the interrupt is cleared we may be called multiple times. */
|
|
if (shutdown != 0)
|
|
return;
|
|
shutdown++;
|
|
printf("DANGER: OVER TEMPERATURE detected\nShutting down NOW.\n");
|
|
shutdown_nice(RB_POWEROFF);
|
|
}
|
|
|
|
/* Try to shut down in time in case of power failure. */
|
|
static void
|
|
sbus_pwrfail(void *arg __unused)
|
|
{
|
|
static int shutdown;
|
|
|
|
/* As the interrupt is cleared we may be called multiple times. */
|
|
if (shutdown != 0)
|
|
return;
|
|
shutdown++;
|
|
printf("Power failure detected\nShutting down NOW.\n");
|
|
shutdown_nice(RB_POWEROFF);
|
|
}
|
|
|
|
static int
|
|
sbus_print_res(struct sbus_devinfo *sdi)
|
|
{
|
|
int rv;
|
|
|
|
rv = 0;
|
|
rv += resource_list_print_type(&sdi->sdi_rl, "mem", SYS_RES_MEMORY,
|
|
"%#jx");
|
|
rv += resource_list_print_type(&sdi->sdi_rl, "irq", SYS_RES_IRQ,
|
|
"%jd");
|
|
return (rv);
|
|
}
|