49e368ac48
When using DW UART with BUSY detection it is necessary to wait until all serial transfers are finished before manipulating the line control. LCR will not be affected when UART is busy. In addition, if Divisor Latch Access Bit is being set in order to modify UART divisors: 1. We will get BUSY interrupt if interrupts are enabled. 2. Because LCR will not be affected the THR and (even worse) IER contents will be corrupted. This will lead to console hang. Approved by: cognet (mentor) |
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cd180.h | ||
cd1400.h | ||
esp.h | ||
hd64570.h | ||
i8237.h | ||
i8251.h | ||
i8253reg.h | ||
i8255.h | ||
i8259.h | ||
i82586.h | ||
nec765.h | ||
ns16550.h | ||
quicc.h | ||
rsa.h | ||
sab82532.h | ||
via6522reg.h | ||
wd33c93reg.h | ||
z8530.h |