303 lines
6.5 KiB
TableGen
303 lines
6.5 KiB
TableGen
//===-- MicroMipsDSPInstrFormats.td - Instruction Formats --*- tablegen -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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class MMDSPInst<string opstr = "">
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: MipsInst<(outs), (ins), "", [], NoItinerary, FrmOther>, PredicateControl {
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let InsnPredicates = [HasDSP];
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let AdditionalPredicates = [InMicroMips];
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string BaseOpcode = opstr;
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string Arch = "mmdsp";
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let DecoderNamespace = "MicroMips";
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}
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class MMDSPInstAlias<string Asm, dag Result, bit Emit = 0b1>
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: InstAlias<Asm, Result, Emit>, PredicateControl {
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let InsnPredicates = [HasDSP];
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let AdditionalPredicates = [InMicroMips];
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}
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class POOL32A_3R_FMT<string opstr, bits<11> op> : MMDSPInst<opstr> {
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bits<5> rd;
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bits<5> rs;
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bits<5> rt;
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let Inst{31-26} = 0b000000;
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let Inst{25-21} = rt;
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let Inst{20-16} = rs;
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let Inst{15-11} = rd;
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let Inst{10-0} = op;
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}
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class POOL32A_2R_FMT<string opstr, bits<10> op> : MMDSPInst<opstr> {
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bits<5> rt;
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bits<5> rs;
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let Inst{31-26} = 0b000000;
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let Inst{25-21} = rt;
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let Inst{20-16} = rs;
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let Inst{15-6} = op;
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let Inst{5-0} = 0b111100;
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}
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class POOL32A_2RAC_FMT<string opstr, bits<8> op> : MMDSPInst<opstr> {
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bits<5> rt;
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bits<5> rs;
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bits<2> ac;
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let Inst{31-26} = 0b000000;
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let Inst{25-21} = rt;
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let Inst{20-16} = rs;
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let Inst{15-14} = ac;
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let Inst{13-6} = op;
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let Inst{5-0} = 0b111100;
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}
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class POOL32A_3RB0_FMT<string opstr, bits<10> op> : MMDSPInst<opstr> {
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bits<5> rd;
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bits<5> rs;
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bits<5> rt;
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let Inst{31-26} = 0b000000;
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let Inst{25-21} = rt;
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let Inst{20-16} = rs;
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let Inst{15-11} = rd;
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let Inst{10} = 0b0;
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let Inst{9-0} = op;
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}
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class POOL32A_2RSA4_FMT<string opstr, bits<12> op> : MMDSPInst<opstr> {
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bits<5> rt;
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bits<5> rs;
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bits<4> sa;
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let Inst{31-26} = 0b000000;
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let Inst{25-21} = rt;
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let Inst{20-16} = rs;
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let Inst{15-12} = sa;
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let Inst{11-0} = op;
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}
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class POOL32A_2RSA3_FMT<string opstr, bits<7> op> : MMDSPInst<opstr> {
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bits<5> rt;
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bits<5> rs;
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bits<3> sa;
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let Inst{31-26} = 0b000000;
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let Inst{25-21} = rt;
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let Inst{20-16} = rs;
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let Inst{15-13} = sa;
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let Inst{12-6} = op;
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let Inst{5-0} = 0b111100;
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}
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class POOL32A_2RSA5B0_FMT<string opstr, bits<10> op> : MMDSPInst<opstr> {
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bits<5> rt;
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bits<5> rs;
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bits<5> sa;
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let Inst{31-26} = 0b000000;
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let Inst{25-21} = rt;
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let Inst{20-16} = rs;
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let Inst{15-11} = sa;
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let Inst{10} = 0b0;
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let Inst{9-0} = op;
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}
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class POOL32A_2RSA4B0_FMT<string opstr, bits<11> op> : MMDSPInst<opstr> {
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bits<5> rt;
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bits<5> rs;
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bits<4> sa;
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let Inst{31-26} = 0b000000;
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let Inst{25-21} = rt;
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let Inst{20-16} = rs;
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let Inst{15-12} = sa;
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let Inst{11} = 0b0;
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let Inst{10-0} = op;
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}
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class POOL32A_2RSA4OP6_FMT<string opstr, bits<6> op> : MMDSPInst<opstr> {
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bits<5> rt;
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bits<5> rs;
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bits<4> sa;
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let Inst{31-26} = 0b000000;
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let Inst{25-21} = rt;
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let Inst{20-16} = rs;
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let Inst{15-12} = sa;
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let Inst{11-6} = op;
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let Inst{5-0} = 0b111100;
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}
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class POOL32A_1RIMM5AC_FMT<string opstr, bits<8> funct> : MMDSPInst<opstr> {
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bits<5> rt;
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bits<5> imm;
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bits<2> ac;
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let Inst{31-26} = 0b000000;
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let Inst{25-21} = rt;
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let Inst{20-16} = imm;
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let Inst{15-14} = ac;
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let Inst{13-6} = funct;
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let Inst{5-0} = 0b111100;
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}
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class POOL32A_2RSA5_FMT<string opstr, bits<11> op> : MMDSPInst<opstr> {
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bits<5> rt;
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bits<5> rs;
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bits<5> sa;
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let Inst{31-26} = 0b000000;
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let Inst{25-21} = rt;
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let Inst{20-16} = rs;
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let Inst{15-11} = sa;
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let Inst{10-0} = op;
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}
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class POOL32A_1RMEMB0_FMT<string opstr, bits<10> funct> : MMDSPInst<opstr> {
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bits<5> index;
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bits<5> base;
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bits<5> rd;
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let Inst{31-26} = 0;
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let Inst{25-21} = index;
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let Inst{20-16} = base;
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let Inst{15-11} = rd;
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let Inst{10} = 0b0;
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let Inst{9-0} = funct;
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}
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class POOL32A_1RAC_FMT<string instr_asm, bits<8> funct> : MMDSPInst<instr_asm> {
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bits<5> rs;
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bits<2> ac;
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let Inst{31-26} = 0;
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let Inst{25-21} = 0;
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let Inst{20-16} = rs;
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let Inst{15-14} = ac;
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let Inst{13-6} = funct;
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let Inst{5-0} = 0b111100;
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}
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class POOL32A_1RMASK7_FMT<string opstr, bits<8> op> : MMDSPInst<opstr> {
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bits<5> rt;
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bits<7> mask;
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let Inst{31-26} = 0b000000;
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let Inst{25-21} = rt;
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let Inst{20-14} = mask;
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let Inst{13-6} = op;
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let Inst{5-0} = 0b111100;
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}
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class POOL32A_1RIMM10_FMT<string opstr, bits<10> op> : MMDSPInst<opstr> {
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bits<5> rd;
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bits<10> imm;
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let Inst{31-26} = 0;
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let Inst{25-16} = imm;
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let Inst{15-11} = rd;
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let Inst{10} = 0;
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let Inst{9-0} = op;
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}
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class POOL32A_1RIMM8_FMT<string opstr, bits<6> op> : MMDSPInst<opstr> {
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bits<5> rt;
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bits<8> imm;
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let Inst{31-26} = 0;
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let Inst{25-21} = rt;
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let Inst{20-13} = imm;
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let Inst{12} = 0;
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let Inst{11-6} = op;
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let Inst{5-0} = 0b111100;
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}
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class POOL32A_4B0SHIFT6AC4B0_FMT<string opstr, bits<10> op> : MMDSPInst<opstr> {
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bits<6> shift;
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bits<2> ac;
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let Inst{31-26} = 0b000000;
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let Inst{25-22} = 0b0000;
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let Inst{21-16} = shift;
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let Inst{15-14} = ac;
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let Inst{13-10} = 0b0000;
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let Inst{9-0} = op;
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}
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class POOL32A_5B01RAC_FMT<string opstr, bits<8> op> : MMDSPInst<opstr> {
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bits<5> rs;
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bits<2> ac;
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let Inst{31-26} = 0b000000;
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let Inst{25-21} = 0b00000;
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let Inst{20-16} = rs;
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let Inst{15-14} = ac;
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let Inst{13-6} = op;
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let Inst{5-0} = 0b111100;
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}
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class POOL32I_IMMB0_FMT<string opstr, bits<5> op> : MMDSPInst<opstr> {
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bits<16> offset;
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let Inst{31-26} = 0b010000;
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let Inst{25-21} = op;
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let Inst{20-16} = 0;
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let Inst{15-0} = offset;
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}
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class POOL32A_2RBP_FMT<string opstr> : MMDSPInst<opstr> {
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bits<5> rt;
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bits<5> rs;
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bits<2> bp;
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let Inst{31-26} = 0;
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let Inst{25-21} = rt;
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let Inst{20-16} = rs;
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let Inst{15-14} = bp;
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let Inst{13-6} = 0b00100010;
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let Inst{5-0} = 0b111100;
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}
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class POOL32A_2RB0_FMT<string opstr, bits<10> op> : MMDSPInst<opstr> {
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bits<5> rt;
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bits<5> rs;
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let Inst{31-26} = 0;
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let Inst{25-21} = rt;
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let Inst{20-16} = rs;
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let Inst{15-10} = 0;
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let Inst{9-0} = op;
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}
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class POOL32S_3RB0_FMT<string opstr, bits<10> op> : MMDSPInst<opstr> {
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bits<5> rt;
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bits<5> rs;
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bits<5> rd;
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let Inst{31-26} = 0b010110;
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let Inst{25-21} = rt;
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let Inst{20-16} = rs;
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let Inst{15-11} = rd;
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let Inst{10} = 0b0;
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let Inst{9-0} = op;
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}
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class POOL32A_2R2B0_FMT<string opstr, bits<10> op> : MMDSPInst<opstr> {
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bits<5> rt;
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bits<5> rs;
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let Inst{31-26} = 0;
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let Inst{25-21} = rt;
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let Inst{20-16} = rs;
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let Inst{15-11} = 0;
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let Inst{10} = 0;
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let Inst{9-0} = op;
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}
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