ff0cc061ec
preserve our customizations, where necessary.
55 lines
1.8 KiB
C++
55 lines
1.8 KiB
C++
//===- X86DisassemblerShared.h - Emitter shared header ----------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_UTILS_TABLEGEN_X86DISASSEMBLERSHARED_H
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#define LLVM_UTILS_TABLEGEN_X86DISASSEMBLERSHARED_H
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#include <cstring>
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#include <string>
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#include "../../lib/Target/X86/Disassembler/X86DisassemblerDecoderCommon.h"
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struct InstructionSpecifier {
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llvm::X86Disassembler::OperandSpecifier
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operands[llvm::X86Disassembler::X86_MAX_OPERANDS];
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llvm::X86Disassembler::InstructionContext insnContext;
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std::string name;
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InstructionSpecifier() {
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insnContext = llvm::X86Disassembler::IC;
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name = "";
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memset(operands, 0, sizeof(operands));
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}
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};
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/// Specifies whether a ModR/M byte is needed and (if so) which
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/// instruction each possible value of the ModR/M byte corresponds to. Once
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/// this information is known, we have narrowed down to a single instruction.
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struct ModRMDecision {
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uint8_t modrm_type;
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llvm::X86Disassembler::InstrUID instructionIDs[256];
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};
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/// Specifies which set of ModR/M->instruction tables to look at
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/// given a particular opcode.
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struct OpcodeDecision {
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ModRMDecision modRMDecisions[256];
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};
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/// Specifies which opcode->instruction tables to look at given
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/// a particular context (set of attributes). Since there are many possible
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/// contexts, the decoder first uses CONTEXTS_SYM to determine which context
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/// applies given a specific set of attributes. Hence there are only IC_max
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/// entries in this table, rather than 2^(ATTR_max).
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struct ContextDecision {
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OpcodeDecision opcodeDecisions[llvm::X86Disassembler::IC_max];
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};
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#endif
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