e1ef781113
The QUICC engine is found on various Freescale parts including MPC85xx, and provides multiple generic time-division serial channel resources, which are in turn muxed/demuxed by the Serial Communications Controller (SCC). Along with core QUICC/SCC functionality a uart(4)-compliant device driver is provided which allows for serial ports over QUICC/SCC. Approved by: cognet (mentor) Obtained from: Juniper MFp4: e500
119 lines
3.3 KiB
C
119 lines
3.3 KiB
C
/*-
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* Copyright (c) 2004-2006 Marcel Moolenaar
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/conf.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <machine/bus.h>
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#include <sys/rman.h>
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#include <machine/resource.h>
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#include <dev/scc/scc_bus.h>
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#include <dev/uart/uart.h>
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#include <dev/uart/uart_bus.h>
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static int uart_scc_attach(device_t dev);
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static int uart_scc_probe(device_t dev);
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static device_method_t uart_scc_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, uart_scc_probe),
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DEVMETHOD(device_attach, uart_scc_attach),
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DEVMETHOD(device_detach, uart_bus_detach),
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/* Serdev interface */
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DEVMETHOD(serdev_ihand, uart_bus_ihand),
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DEVMETHOD(serdev_sysdev, uart_bus_sysdev),
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{ 0, 0 }
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};
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static driver_t uart_scc_driver = {
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uart_driver_name,
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uart_scc_methods,
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sizeof(struct uart_softc),
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};
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static int
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uart_scc_attach(device_t dev)
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{
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device_t parent;
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struct uart_softc *sc;
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uintptr_t mtx;
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parent = device_get_parent(dev);
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sc = device_get_softc(dev);
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if (BUS_READ_IVAR(parent, dev, SCC_IVAR_HWMTX, &mtx))
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return (ENXIO);
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sc->sc_hwmtx = (struct mtx *)(void *)mtx;
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return (uart_bus_attach(dev));
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}
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static int
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uart_scc_probe(device_t dev)
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{
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device_t parent;
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struct uart_softc *sc;
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uintptr_t ch, cl, md, rs;
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parent = device_get_parent(dev);
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sc = device_get_softc(dev);
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if (BUS_READ_IVAR(parent, dev, SCC_IVAR_MODE, &md) ||
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BUS_READ_IVAR(parent, dev, SCC_IVAR_CLASS, &cl))
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return (ENXIO);
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if (md != SCC_MODE_ASYNC)
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return (ENXIO);
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switch (cl) {
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case SCC_CLASS_QUICC:
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sc->sc_class = &uart_quicc_class;
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break;
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case SCC_CLASS_SAB82532:
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sc->sc_class = &uart_sab82532_class;
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break;
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case SCC_CLASS_Z8530:
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sc->sc_class = &uart_z8530_class;
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break;
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default:
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return (ENXIO);
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}
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if (BUS_READ_IVAR(parent, dev, SCC_IVAR_CHANNEL, &ch) ||
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BUS_READ_IVAR(parent, dev, SCC_IVAR_CLOCK, &cl) ||
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BUS_READ_IVAR(parent, dev, SCC_IVAR_REGSHFT, &rs))
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return (ENXIO);
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return (uart_bus_probe(dev, rs, cl, 0, ch));
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}
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DRIVER_MODULE(uart, scc, uart_scc_driver, uart_devclass, 0, 0);
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