Ryan Libby ee47a12a49 dmar: reserve memory windows of PCIe root port ... PCI memory address space is shared between memory-mapped devices (MMIO) and host memory (which may be remapped by an IOMMU). Device accesses to an address within a memory aperture in a PCIe root port will be treated as peer-to-peer and not forwarded to an IOMMU. To avoid this, reserve the address space of the root port's memory apertures in the address space used by the IOMMU for remapping. Reviewed by: kib, tychon Discussed with: Anton Rang <rang@acm.org> Tested by: tychon Sponsored by: Dell EMC Isilon Differential Revision: https://reviews.freebsd.org/D27503		2020-12-09 18:43:58 +00:00
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intel_ctx.c	dmar: reserve memory windows of PCIe root port	2020-12-09 18:43:58 +00:00
intel_dmar.h	Move the rid variable to the generic iommu context.	2020-09-10 14:12:25 +00:00
intel_drv.c	Add device_t member to struct iommu.	2020-11-16 15:29:52 +00:00
intel_fault.c	Move the Intel DMAR busdma backend to a generic place so	2020-07-21 10:38:51 +00:00
intel_idpgtbl.c	x86: clean up empty lines in .c and .h files	2020-09-01 21:23:59 +00:00
intel_intrmap.c	o Don't include headers from iommu.h, include them from the header	2020-07-29 22:08:54 +00:00
intel_qi.c	o Don't include headers from iommu.h, include them from the header	2020-07-29 22:08:54 +00:00
intel_quirks.c	Add a few macroses for conversion between DMAR unit, domain, ctx	2020-08-04 20:51:05 +00:00
intel_reg.h	o Move iommu_test_boundary() to sys/iommu.h	2020-07-18 13:10:31 +00:00
intel_utils.c	o Don't include headers from iommu.h, include them from the header	2020-07-29 22:08:54 +00:00
iommu_intrmap.h