088fc97186
2. Added Flash Read/Update Support 3. Fixed TSO Handling Submitted by: David C Somayajulu (davidcs@freebsd.org) Reviewed by: George Neville-Neil (gnn@freebsd.org) Approved by: George Neville-Neil (gnn@freebsd.org)
417 lines
9.7 KiB
C
417 lines
9.7 KiB
C
/*
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* Copyright (c) 2011-2013 Qlogic Corporation
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* File: qla_isr.c
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* Author : David C Somayajulu, Qlogic Corporation, Aliso Viejo, CA 92656.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include "qla_os.h"
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#include "qla_reg.h"
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#include "qla_hw.h"
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#include "qla_def.h"
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#include "qla_inline.h"
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#include "qla_ver.h"
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#include "qla_glbl.h"
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#include "qla_dbg.h"
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static void qla_replenish_normal_rx(qla_host_t *ha, qla_sds_t *sdsp);
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static void qla_replenish_jumbo_rx(qla_host_t *ha, qla_sds_t *sdsp);
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/*
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* Name: qla_rx_intr
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* Function: Handles normal ethernet frames received
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*/
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static void
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qla_rx_intr(qla_host_t *ha, uint64_t data, uint32_t sds_idx,
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struct lro_ctrl *lro)
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{
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uint32_t idx, length, status, ring;
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qla_rx_buf_t *rxb;
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struct mbuf *mp;
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struct ifnet *ifp = ha->ifp;
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qla_sds_t *sdsp;
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struct ether_vlan_header *eh;
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sdsp = &ha->hw.sds[sds_idx];
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ring = (uint32_t)Q8_STAT_DESC_TYPE(data);
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idx = (uint32_t)Q8_STAT_DESC_HANDLE(data);
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length = (uint32_t)Q8_STAT_DESC_TOTAL_LENGTH(data);
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status = (uint32_t)Q8_STAT_DESC_STATUS(data);
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if (ring == 0) {
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if ((idx >= NUM_RX_DESCRIPTORS) || (length > MCLBYTES)) {
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device_printf(ha->pci_dev, "%s: ring[%d] index[0x%08x]"
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" len[0x%08x] invalid\n",
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__func__, ring, idx, length);
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return;
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}
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} else {
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if ((idx >= NUM_RX_JUMBO_DESCRIPTORS)||(length > MJUM9BYTES)) {
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device_printf(ha->pci_dev, "%s: ring[%d] index[0x%08x]"
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" len[0x%08x] invalid\n",
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__func__, ring, idx, length);
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return;
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}
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}
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if (ring == 0)
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rxb = &ha->rx_buf[idx];
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else
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rxb = &ha->rx_jbuf[idx];
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QL_ASSERT((rxb != NULL),\
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("%s: [r, i, sds_idx]=[%d, 0x%x, %d] rxb != NULL\n",\
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__func__, ring, idx, sds_idx));
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mp = rxb->m_head;
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QL_ASSERT((mp != NULL),\
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("%s: [r,i,rxb, sds_idx]=[%d, 0x%x, %p, %d] mp != NULL\n",\
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__func__, ring, idx, rxb, sds_idx));
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bus_dmamap_sync(ha->rx_tag, rxb->map, BUS_DMASYNC_POSTREAD);
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if (ring == 0) {
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rxb->m_head = NULL;
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rxb->next = sdsp->rxb_free;
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sdsp->rxb_free = rxb;
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sdsp->rx_free++;
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} else {
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rxb->m_head = NULL;
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rxb->next = sdsp->rxjb_free;
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sdsp->rxjb_free = rxb;
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sdsp->rxj_free++;
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}
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mp->m_len = length;
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mp->m_pkthdr.len = length;
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mp->m_pkthdr.rcvif = ifp;
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eh = mtod(mp, struct ether_vlan_header *);
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if (eh->evl_encap_proto == htons(ETHERTYPE_VLAN)) {
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uint32_t *data = (uint32_t *)eh;
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mp->m_pkthdr.ether_vtag = ntohs(eh->evl_tag);
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mp->m_flags |= M_VLANTAG;
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*(data + 3) = *(data + 2);
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*(data + 2) = *(data + 1);
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*(data + 1) = *data;
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m_adj(mp, ETHER_VLAN_ENCAP_LEN);
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}
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if (status == Q8_STAT_DESC_STATUS_CHKSUM_OK) {
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mp->m_pkthdr.csum_flags = (CSUM_IP_CHECKED | CSUM_IP_VALID);
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} else {
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mp->m_pkthdr.csum_flags = 0;
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}
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if (lro->lro_cnt && (tcp_lro_rx(lro, mp, 0) == 0)) {
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/* LRO packet has been successfuly queued */
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} else {
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(*ifp->if_input)(ifp, mp);
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}
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if (sdsp->rx_free > std_replenish)
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qla_replenish_normal_rx(ha, sdsp);
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if (sdsp->rxj_free > jumbo_replenish)
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qla_replenish_jumbo_rx(ha, sdsp);
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return;
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}
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static void
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qla_replenish_jumbo_rx(qla_host_t *ha, qla_sds_t *sdsp)
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{
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qla_rx_buf_t *rxb;
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int count = jumbo_replenish;
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uint32_t rxj_next;
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if (!mtx_trylock(&ha->rxj_lock))
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return;
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rxj_next = ha->hw.rxj_next;
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while (count--) {
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rxb = sdsp->rxjb_free;
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if (rxb == NULL)
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break;
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sdsp->rxjb_free = rxb->next;
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sdsp->rxj_free--;
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if (qla_get_mbuf(ha, rxb, NULL, RDS_RING_INDEX_JUMBO) == 0) {
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qla_set_hw_rcv_desc(ha, RDS_RING_INDEX_JUMBO,
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ha->hw.rxj_in, rxb->handle, rxb->paddr,
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(rxb->m_head)->m_pkthdr.len);
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ha->hw.rxj_in++;
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if (ha->hw.rxj_in == NUM_RX_JUMBO_DESCRIPTORS)
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ha->hw.rxj_in = 0;
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ha->hw.rxj_next++;
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if (ha->hw.rxj_next == NUM_RX_JUMBO_DESCRIPTORS)
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ha->hw.rxj_next = 0;
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} else {
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device_printf(ha->pci_dev,
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"%s: qla_get_mbuf [1,(%d),(%d)] failed\n",
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__func__, ha->hw.rxj_in, rxb->handle);
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rxb->m_head = NULL;
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rxb->next = sdsp->rxjb_free;
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sdsp->rxjb_free = rxb;
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sdsp->rxj_free++;
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break;
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}
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}
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if (rxj_next != ha->hw.rxj_next) {
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QL_UPDATE_RDS_PRODUCER_INDEX(ha, 1, ha->hw.rxj_next);
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}
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mtx_unlock(&ha->rxj_lock);
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}
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static void
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qla_replenish_normal_rx(qla_host_t *ha, qla_sds_t *sdsp)
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{
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qla_rx_buf_t *rxb;
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int count = std_replenish;
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uint32_t rx_next;
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if (!mtx_trylock(&ha->rx_lock))
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return;
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rx_next = ha->hw.rx_next;
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while (count--) {
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rxb = sdsp->rxb_free;
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if (rxb == NULL)
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break;
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sdsp->rxb_free = rxb->next;
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sdsp->rx_free--;
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if (qla_get_mbuf(ha, rxb, NULL, RDS_RING_INDEX_NORMAL) == 0) {
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qla_set_hw_rcv_desc(ha, RDS_RING_INDEX_NORMAL,
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ha->hw.rx_in, rxb->handle, rxb->paddr,
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(rxb->m_head)->m_pkthdr.len);
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ha->hw.rx_in++;
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if (ha->hw.rx_in == NUM_RX_DESCRIPTORS)
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ha->hw.rx_in = 0;
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ha->hw.rx_next++;
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if (ha->hw.rx_next == NUM_RX_DESCRIPTORS)
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ha->hw.rx_next = 0;
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} else {
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device_printf(ha->pci_dev,
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"%s: qla_get_mbuf [0,(%d),(%d)] failed\n",
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__func__, ha->hw.rx_in, rxb->handle);
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rxb->m_head = NULL;
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rxb->next = sdsp->rxb_free;
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sdsp->rxb_free = rxb;
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sdsp->rx_free++;
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break;
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}
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}
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if (rx_next != ha->hw.rx_next) {
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QL_UPDATE_RDS_PRODUCER_INDEX(ha, 0, ha->hw.rx_next);
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}
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mtx_unlock(&ha->rx_lock);
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}
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/*
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* Name: qla_isr
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* Function: Main Interrupt Service Routine
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*/
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static uint32_t
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qla_rcv_isr(qla_host_t *ha, uint32_t sds_idx, uint32_t count)
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{
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device_t dev;
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qla_hw_t *hw;
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uint32_t comp_idx, desc_count;
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q80_stat_desc_t *sdesc;
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struct lro_ctrl *lro;
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struct lro_entry *queued;
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uint32_t ret = 0;
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dev = ha->pci_dev;
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hw = &ha->hw;
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hw->sds[sds_idx].rcv_active = 1;
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if (ha->flags.stop_rcv) {
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hw->sds[sds_idx].rcv_active = 0;
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return 0;
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}
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QL_DPRINT2((dev, "%s: [%d]enter\n", __func__, sds_idx));
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/*
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* receive interrupts
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*/
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comp_idx = hw->sds[sds_idx].sdsr_next;
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lro = &hw->sds[sds_idx].lro;
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while (count--) {
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sdesc = (q80_stat_desc_t *)
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&hw->sds[sds_idx].sds_ring_base[comp_idx];
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if (Q8_STAT_DESC_OWNER((sdesc->data[0])) !=
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Q8_STAT_DESC_OWNER_HOST) {
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QL_DPRINT2((dev, "%s: data %p sdsr_next 0x%08x\n",
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__func__, (void *)sdesc->data[0], comp_idx));
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break;
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}
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desc_count = Q8_STAT_DESC_COUNT((sdesc->data[0]));
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switch (Q8_STAT_DESC_OPCODE((sdesc->data[0]))) {
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case Q8_STAT_DESC_OPCODE_RCV_PKT:
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case Q8_STAT_DESC_OPCODE_SYN_OFFLOAD:
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qla_rx_intr(ha, (sdesc->data[0]), sds_idx, lro);
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break;
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default:
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device_printf(dev, "%s: default 0x%llx!\n", __func__,
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(long long unsigned int)sdesc->data[0]);
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break;
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}
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while (desc_count--) {
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sdesc->data[0] =
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Q8_STAT_DESC_SET_OWNER(Q8_STAT_DESC_OWNER_FW);
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comp_idx = (comp_idx + 1) & (NUM_STATUS_DESCRIPTORS-1);
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sdesc = (q80_stat_desc_t *)
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&hw->sds[sds_idx].sds_ring_base[comp_idx];
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}
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}
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while((!SLIST_EMPTY(&lro->lro_active))) {
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queued = SLIST_FIRST(&lro->lro_active);
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SLIST_REMOVE_HEAD(&lro->lro_active, next);
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tcp_lro_flush(lro, queued);
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}
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if (hw->sds[sds_idx].sdsr_next != comp_idx) {
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QL_UPDATE_SDS_CONSUMER_INDEX(ha, sds_idx, comp_idx);
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}
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hw->sds[sds_idx].sdsr_next = comp_idx;
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sdesc = (q80_stat_desc_t *)&hw->sds[sds_idx].sds_ring_base[comp_idx];
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if ((sds_idx == 0) && (Q8_STAT_DESC_OWNER((sdesc->data[0])) ==
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Q8_STAT_DESC_OWNER_HOST)) {
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ret = -1;
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}
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hw->sds[sds_idx].rcv_active = 0;
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return (ret);
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}
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void
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qla_isr(void *arg)
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{
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qla_ivec_t *ivec = arg;
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qla_host_t *ha;
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uint32_t sds_idx;
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uint32_t ret;
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ha = ivec->ha;
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sds_idx = ivec->irq_rid - 1;
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if (sds_idx >= ha->hw.num_sds_rings) {
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device_printf(ha->pci_dev, "%s: bogus sds_idx 0x%x\n", __func__,
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sds_idx);
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return;
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}
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if (sds_idx == 0)
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taskqueue_enqueue(ha->tx_tq, &ha->tx_task);
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ret = qla_rcv_isr(ha, sds_idx, rcv_pkt_thres);
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if (sds_idx == 0)
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taskqueue_enqueue(ha->tx_tq, &ha->tx_task);
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if (ret) {
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taskqueue_enqueue(ha->irq_vec[sds_idx].rcv_tq,
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&ha->irq_vec[sds_idx].rcv_task);
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} else {
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QL_ENABLE_INTERRUPTS(ha, sds_idx);
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}
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}
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void
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qla_rcv(void *context, int pending)
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{
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qla_ivec_t *ivec = context;
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qla_host_t *ha;
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device_t dev;
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qla_hw_t *hw;
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uint32_t sds_idx;
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uint32_t ret;
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struct ifnet *ifp;
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ha = ivec->ha;
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dev = ha->pci_dev;
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hw = &ha->hw;
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sds_idx = ivec->irq_rid - 1;
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ifp = ha->ifp;
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do {
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if (sds_idx == 0) {
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if (qla_le32_to_host(*(hw->tx_cons)) != hw->txr_comp) {
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taskqueue_enqueue(ha->tx_tq, &ha->tx_task);
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} else if ((ifp->if_snd.ifq_head != NULL) &&
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QL_RUNNING(ifp)) {
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taskqueue_enqueue(ha->tx_tq, &ha->tx_task);
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}
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}
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ret = qla_rcv_isr(ha, sds_idx, rcv_pkt_thres_d);
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} while (ret);
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if (sds_idx == 0)
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taskqueue_enqueue(ha->tx_tq, &ha->tx_task);
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QL_ENABLE_INTERRUPTS(ha, sds_idx);
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}
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