c645e17a12
on all architectures. Sparc64 does not implement them.
295 lines
8.8 KiB
Groff
295 lines
8.8 KiB
Groff
.\" Copyright (c) 2000-2001 John H. Baldwin <jhb@FreeBSD.org>
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.\" All rights reserved.
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.\"
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.\" Redistribution and use in source and binary forms, with or without
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.\" modification, are permitted provided that the following conditions
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.\" are met:
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.\" 1. Redistributions of source code must retain the above copyright
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.\" notice, this list of conditions and the following disclaimer.
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.\" 2. Redistributions in binary form must reproduce the above copyright
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.\" notice, this list of conditions and the following disclaimer in the
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.\" documentation and/or other materials provided with the distribution.
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.\"
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.\" THIS SOFTWARE IS PROVIDED BY THE DEVELOPERS ``AS IS'' AND ANY EXPRESS OR
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.\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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.\" OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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.\" IN NO EVENT SHALL THE DEVELOPERS BE LIABLE FOR ANY DIRECT, INDIRECT,
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.\" INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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.\" NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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.\" DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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.\" THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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.\" (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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.\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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.\"
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.\" $FreeBSD$
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.\"
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.Dd October 27, 2000
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.Os
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.Dt ATOMIC 9
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.Sh NAME
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.Nm atomic_add ,
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.Nm atomic_clear ,
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.Nm atomic_cmpset ,
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.Nm atomic_load ,
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.Nm atomic_readandclear ,
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.Nm atomic_set ,
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.Nm atomic_subtract ,
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.Nm atomic_store
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.Nd atomic operations
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.Sh SYNOPSIS
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.In sys/types.h
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.In machine/atomic.h
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.Ft void
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.Fn atomic_add_{acq_,rel_,}<type> "volatile <type> *p" "<type> v"
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.Ft void
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.Fn atomic_clear_{acq_,rel_,}<type> "volatile <type> *p" "<type> v"
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.Ft int
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.Fo atomic_cmpset_{acq_,rel_,}<type>
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.Fa "volatile <type> *dst"
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.Fa "<type> old"
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.Fa "<type> new"
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.Fc
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.Ft <type>
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.Fn atomic_load_acq_<type> "volatile <type> *p"
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.Ft <type>
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.Fn atomic_readandclear_<type> "volatile <type> *p"
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.Ft void
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.Fn atomic_set_{acq_,rel_,}<type> "volatile <type> *p" "<type> v"
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.Ft void
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.Fn atomic_subtract_{acq_,rel_,}<type> "volatile <type> *p" "<type> v"
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.Ft void
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.Fn atomic_store_rel_<type> "volatile <type> *p" "<type> v"
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.Sh DESCRIPTION
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Each of the atomic operations is guaranteed to be atomic in the presence of
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interrupts.
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They can be used to implement reference counts or as building blocks for more
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advanced synchronization primitives such as mutexes.
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.Ss Types
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Each atomic operation operates on a specific type.
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The type to use is indicated in the function name.
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The available types that can be used are:
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.Bl -tag -offset indent -width short
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.It int
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unsigned integer
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.It long
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unsigned long integer
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.It ptr
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unsigned integer the size of a pointer
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.It 32
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unsigned 32-bit integer
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.It 64
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unsigned 64-bit integer
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.El
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.Pp
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For example, the function to atomically add two integers is called
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.Fn atomic_add_int .
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.Pp
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Certain architectures also provide operations for types smaller than int.
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.Bl -tag -offset indent -width short
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.It char
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unsigned character
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.It short
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unsigned short integer
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.It 8
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unsigned 8-bit integer
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.It 16
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unsigned 16-bit integer
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.El
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.Pp
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These must not be used in MI code because the instructions to implement them
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efficiently may not be available.
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.Ss Memory Barriers
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Memory barriers are used to guarantee the order the order of data accesses in
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two ways.
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First, they specify hints to the compiler to not re-order or optimize the
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operations.
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Secondly, on architectures that do not guarantee ordered data accesses,
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special instructions or special variants of instructions are used to indicate
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to the processor that data accesses need to occur in a certain order.
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As a result, most of the atomic operations have three variants in order to
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include optional memory barriers.
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The first form just performs the operation without any explicit barriers.
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The second form uses a read memory barrier, and the final variant uses a write
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memory barrier.
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.Pp
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The second variant of each operation includes a read memory barrier.
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This barrier ensures that the effects of this operation are completed before the
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effects of any later data accesses.
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As a result, the operation is said to have acquire semantics as it acquires a
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pseudo-lock requiring further operations to wait until it has completed.
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To denote this, the suffix
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.Dq _acq
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is inserted into the function name immediately prior to the
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.Em _type
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suffix.
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For example, to subtract two integers ensuring that any later writes will
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happen after the subtraction is performed, use
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.Fn atomic_subtract_acq_int .
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.Pp
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The third variant of each operation includes a write memory barrier.
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This ensures that all effects of all previous data accesses are completed
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before this operation takes place.
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As a result, the operation is said to have release semantics as it releases
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any pending data accesses to be completed before its operation is performed.
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To denote this, the suffix
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.Dq _rel
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is inserted into the function name immediately prior to the
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.Em _type
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suffix.
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For example, to add two long integers ensuring that all previous
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writes will happen first, use
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.Fn atomic_add_rel_long .
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.Pp
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A practical example of using memory barriers is to ensure that data accesses
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that are protected by a lock are all performed while the lock is held.
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To achieve this, one would use a read barrier when acquiring the lock to
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guarantee that the lock is held before any protected operations are performed.
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Finally, one would use a write barrier when releasing the lock to ensure that
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all of the protected operations are completed before the lock is released.
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.Pp
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.Ss Multiple Processors
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The current set of atomic operations do not necessarily guarantee atomicity
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across multiple processors.
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To guarantee atomicity across processors, not only does the individual
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operation need to be atomic on the processor performing the operation, but
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the result of the operation needs to be pushed out to stable storage and the
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caches of all other processors on the system need to invalidate any cache
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lines that include the affected memory region.
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On the
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.Tn i386
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architecture, the cache coherency model requires that the hardware perform
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this task, thus the atomic operations are atomic across multiple processors.
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On the
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.Tn ia64
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architecture, coherency is only guaranteed for pages that are configured to
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using a caching policy of either uncached or write back.
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.Ss Semantics
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This section describes the semantics of each operation using a C like notation.
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.Bl -hang
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.It Fn atomic_add "p" "v"
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.Bd -literal
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*p += v;
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.Ed
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.It Fn atomic_clear "p" "v"
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.Bd -literal
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*p &= ~v;
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.Ed
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.It Fn atomic_cmpset "dst" "old" "new"
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.Bd -literal
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if (*dst == old) {
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*dst = new;
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return 1;
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} else
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return 0;
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.Ed
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.El
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.Pp
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The
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.Fn atomic_cmpset
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functions are not implemented for the types char, short, 8, and 16.
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.Bl -hang
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.It Fn atomic_load "addr"
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.Bd -literal
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return (*addr)
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.Ed
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.El
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.Pp
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The
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.Fn atomic_load
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functions always have acquire semantics.
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.Bl -hang
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.It Fn atomic_readandclear "addr"
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.Bd -literal
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temp = *addr;
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*addr = 0;
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return (temp);
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.Ed
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.El
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.Pp
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The
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.Fn atomic_readandclear
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functions are not implemented for the types char, short, ptr, 8, and 16 and do
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not have any variants with memory barriers at this time.
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.Bl -hang
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.It Fn atomic_set "p" "v"
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.Bd -literal
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*p |= v;
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.Ed
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.It Fn atomic_subtract "p" "v"
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.Bd -literal
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*p -= v;
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.Ed
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.It Fn atomic_store "p" "v"
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.Bd -literal
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*p = v;
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.Ed
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.El
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.Pp
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The
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.Fn atomic_store
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functions always have release semantics.
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.Pp
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The type
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.Dq 64
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is currently not implemented for any of the atomic operations on the
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.Tn i386
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architecture.
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.Sh RETURN VALUES
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.Fn atomic_cmpset
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returns the result of the compare operation.
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.Fn atomic_load
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and
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.Fn atomic_readandclear
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return the value at the specified address.
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.Sh EXAMPLES
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This example uses the
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.Fn atomic_cmpset_acq_ptr
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and
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.Fn atomic_set_ptr
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functions to obtain a sleep mutex and handle recursion.
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Since the
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.Va mtx_lock
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member of a
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.Li struct mtx
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is a pointer, the
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.Dq ptr
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type is used.
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.Bd -literal
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#define _obtain_lock(mp, tid) \\
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atomic_cmpset_acq_ptr(&(mp)->mtx_lock, (void *)MTX_UNOWNED, (tid))
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/* Get a sleep lock, deal with recursion inline. */
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#define _getlock_sleep(mp, tid, type) do { \\
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if (!_obtain_lock(mp, tid)) { \\
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if (((mp)->mtx_lock & MTX_FLAGMASK) != ((uintptr_t)(tid)))\\
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mtx_enter_hard(mp, (type) & MTX_HARDOPTS, 0); \\
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else { \\
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atomic_set_ptr(&(mp)->mtx_lock, MTX_RECURSE); \\
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(mp)->mtx_recurse++; \\
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} \\
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} \\
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} while (0)
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.Ed
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.Sh HISTORY
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The
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.Fn atomic_add ,
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.Fn atomic_clear ,
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.Fn atomic_set ,
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and
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.Fn atomic_subtract
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operations were first introduced in
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.Fx 3.0 .
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This first set only suppored the types char, short, int, and long.
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The
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.Fn atomic_cmpset ,
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.Fn atomic_load ,
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.Fn atomic_readandclear ,
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and
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.Fn atomic_store
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operations were added in
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.Fx 5.0 .
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The types 8, 16, 32, 64, and ptr and all of the acquire and release variants
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were added in
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.Fx 5.0
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as well.
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