e67f80fd20
o ixp425 support o NPE network driver (requires Intel microcode) o h/w qmgr support o True IDE compact flash over expansion bus o pci (ath and hifn795x parts tested) o xscale watchdog timer o ds1672 RTC on i2c bus o ad7418 voltage + temp monitoring on i2c bus o uart Work done together with cognet, kevlo, and jmg. Parts of the ixp425 support obtaine/derived from netbsd. Reviewed by: cognet, imp MFC after: 1 month
216 lines
5.4 KiB
C
216 lines
5.4 KiB
C
/* $NetBSD: ixp425_space.c,v 1.6 2006/04/10 03:36:03 simonb Exp $ */
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/*
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* Copyright (c) 2003
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* Ichiro FUKUHARA <ichiro@ichiro.org>.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Ichiro FUKUHARA.
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* 4. The name of the company nor the name of the author may be used to
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* endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY ICHIRO FUKUHARA ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL ICHIRO FUKUHARA OR THE VOICES IN HIS HEAD BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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/*
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* bus_space I/O functions for ixp425
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <machine/pcb.h>
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#include <vm/vm.h>
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#include <vm/vm_kern.h>
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#include <vm/pmap.h>
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#include <vm/vm_page.h>
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#include <vm/vm_extern.h>
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#include <machine/bus.h>
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#include <arm/xscale/ixp425/ixp425reg.h>
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#include <arm/xscale/ixp425/ixp425var.h>
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/* Proto types for all the bus_space structure functions */
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bs_protos(ixp425);
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bs_protos(generic);
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bs_protos(generic_armv4);
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struct bus_space ixp425_bs_tag = {
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/* cookie */
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.bs_cookie = (void *) 0,
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/* mapping/unmapping */
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.bs_map = ixp425_bs_map,
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.bs_unmap = ixp425_bs_unmap,
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.bs_subregion = ixp425_bs_subregion,
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/* allocation/deallocation */
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.bs_alloc = ixp425_bs_alloc,
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.bs_free = ixp425_bs_free,
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/* barrier */
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.bs_barrier = ixp425_bs_barrier,
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/* read (single) */
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.bs_r_1 = generic_bs_r_1,
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.bs_r_2 = generic_armv4_bs_r_2,
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.bs_r_4 = generic_bs_r_4,
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.bs_r_8 = NULL,
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/* read multiple */
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.bs_rm_1 = generic_bs_rm_1,
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.bs_rm_2 = generic_armv4_bs_rm_2,
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.bs_rm_4 = generic_bs_rm_4,
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.bs_rm_8 = NULL,
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/* read region */
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.bs_rr_1 = generic_bs_rr_1,
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.bs_rr_2 = generic_armv4_bs_rr_2,
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.bs_rr_4 = generic_bs_rr_4,
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.bs_rr_8 = NULL,
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/* write (single) */
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.bs_w_1 = generic_bs_w_1,
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.bs_w_2 = generic_armv4_bs_w_2,
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.bs_w_4 = generic_bs_w_4,
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.bs_w_8 = NULL,
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/* write multiple */
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.bs_wm_1 = generic_bs_wm_1,
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.bs_wm_2 = generic_armv4_bs_wm_2,
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.bs_wm_4 = generic_bs_wm_4,
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.bs_wm_8 = NULL,
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/* write region */
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.bs_wr_1 = generic_bs_wr_1,
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.bs_wr_2 = generic_armv4_bs_wr_2,
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.bs_wr_4 = generic_bs_wr_4,
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.bs_wr_8 = NULL,
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/* set multiple */
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/* XXX not implemented */
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/* set region */
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.bs_sr_1 = NULL,
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.bs_sr_2 = generic_armv4_bs_sr_2,
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.bs_sr_4 = generic_bs_sr_4,
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.bs_sr_8 = NULL,
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/* copy */
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.bs_c_1 = NULL,
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.bs_c_2 = generic_armv4_bs_c_2,
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.bs_c_4 = NULL,
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.bs_c_8 = NULL,
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};
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int
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ixp425_bs_map(void *t, bus_addr_t bpa, bus_size_t size,
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int cacheable, bus_space_handle_t *bshp)
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{
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const struct pmap_devmap *pd;
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vm_paddr_t startpa, endpa, pa, offset;
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vm_offset_t va;
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pt_entry_t *pte;
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if ((pd = pmap_devmap_find_pa(bpa, size)) != NULL) {
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/* Device was statically mapped. */
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*bshp = pd->pd_va + (bpa - pd->pd_pa);
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return (0);
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}
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endpa = round_page(bpa + size);
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offset = bpa & PAGE_MASK;
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startpa = trunc_page(bpa);
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va = kmem_alloc(kernel_map, endpa - startpa);
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if (va == 0)
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return (ENOMEM);
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*bshp = va + offset;
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for (pa = startpa; pa < endpa; pa += PAGE_SIZE, va += PAGE_SIZE) {
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pmap_kenter(va, pa);
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pte = vtopte(va);
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*pte &= ~L2_S_CACHE_MASK;
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PTE_SYNC(pte);
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}
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return (0);
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}
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void
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ixp425_bs_unmap(void *t, bus_space_handle_t h, bus_size_t size)
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{
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vm_offset_t va, endva;
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if (pmap_devmap_find_va((vm_offset_t)t, size) != NULL) {
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/* Device was statically mapped; nothing to do. */
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return;
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}
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endva = round_page((vm_offset_t)t + size);
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va = trunc_page((vm_offset_t)t);
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while (va < endva) {
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pmap_kremove(va);
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va += PAGE_SIZE;
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}
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kmem_free(kernel_map, va, endva - va);
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}
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int
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ixp425_bs_alloc(void *t, bus_addr_t rstart, bus_addr_t rend,
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bus_size_t size, bus_size_t alignment, bus_size_t boundary, int cacheable,
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bus_addr_t *bpap, bus_space_handle_t *bshp)
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{
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panic("ixp425_bs_alloc(): not implemented");
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}
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void
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ixp425_bs_free(void *t, bus_space_handle_t bsh, bus_size_t size)
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{
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panic("ixp425_bs_free(): not implemented");
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}
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int
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ixp425_bs_subregion(void *t, bus_space_handle_t bsh, bus_size_t offset,
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bus_size_t size, bus_space_handle_t *nbshp)
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{
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*nbshp = bsh + offset;
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return (0);
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}
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void
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ixp425_bs_barrier(void *t, bus_space_handle_t bsh, bus_size_t offset,
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bus_size_t len, int flags)
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{
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/* Nothing to do. */
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}
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