4a5470eebd
it now really gets in the way. This allows us to fix several problems- not least of which was problems of ordering about when you'd have a device softc for an miibus child available or not. Move some steps of things around. Put the ifnet/arpcom structure at the head of the softc (PR 29249). Don't do tx gc in the interrupt service routine- that seems to make things a bit more efficient. Enable jumbo support by default- but this version of 'jumbo' is broken because it really is just using multiple tfd/rfd's to match a packet, which will never be > CLSIZE anyway. This should begin the first steps toward cleaning this driver up. PR: 29249 MFC after: 1 week
278 lines
7.9 KiB
C
278 lines
7.9 KiB
C
/* $FreeBSD$ */
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/*
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* Principal Author: Matthew Jacob
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* Copyright (c) 1999, 2001 by Traakan Software
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice unmodified, this list of conditions, and the following
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* disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* Additional Copyright (c) 2001 by Parag Patel
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* under same licence for MII PHY code.
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*/
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/*
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* Softc definitions for the Intel Gigabit Ethernet driver.
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*
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* Guidance and inspiration from David Greenman's
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* if_fxp driver gratefully acknowledged here.
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*/
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/*
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* Platform specific defines and inline functions go here.
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* Look further below for more generic structures.
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*/
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/*
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* Enable for FreeBSD 5.0 SMP code
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*/
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#define SMPNG 1
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/mbuf.h>
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#include <sys/protosw.h>
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#include <sys/socket.h>
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#include <sys/malloc.h>
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#include <sys/kernel.h>
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#include <net/if.h>
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#include <net/if_dl.h>
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#include <net/if_media.h>
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#ifdef NS
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#include <netns/ns.h>
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#include <netns/ns_if.h>
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#endif
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#include <net/bpf.h>
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#include <sys/sockio.h>
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#include <sys/bus.h>
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#include <machine/bus.h>
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#include <sys/rman.h>
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#include <machine/resource.h>
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#include <net/ethernet.h>
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#include <net/if_arp.h>
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#include <vm/vm.h>
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#include <vm/pmap.h>
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#include <machine/clock.h>
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#include <pci/pcivar.h>
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#include <pci/pcireg.h>
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#include <pci/if_wxreg.h>
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#include <dev/mii/mii.h>
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#include <dev/mii/miivar.h>
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#define NBPFILTER 1
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MODULE_DEPEND(wx, miibus, 1, 1, 1);
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#include "miibus_if.h"
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#include "opt_bdg.h"
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#ifdef BRIDGE
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#include <net/if_types.h>
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#include <net/bridge.h>
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#endif
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struct wxmdvar {
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/*
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* arpcom must be first
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*/
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struct arpcom arpcom; /* per-interface network data */
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struct device * dev; /* backpointer to device */
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struct resource * mem; /* resource descriptor for registers */
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struct resource * irq; /* resource descriptor for interrupt */
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void * ih; /* interrupt handler cookie */
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u_int16_t cmdw;
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struct callout_handle sch; /* handle for timeouts */
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char name[8];
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bus_space_tag_t st; /* bus space tag */
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bus_space_handle_t sh; /* bus space handle */
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struct ifmedia ifm;
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device_t miibus;
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struct wx_softc * next;
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#ifdef SMPNG
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struct mtx wxmtx;
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#else
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int spl;
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#endif
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};
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#define wx_dev w.dev
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#define wx_enaddr w.arpcom.ac_enaddr
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#define wx_cmdw w.cmdw
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#define wx_media w.ifm
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#define wx_next w.next
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#define wx_if w.arpcom.ac_if
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#define wx_name w.name
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#define wx_mtx w.wxmtx
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#define IOCTL_CMD_TYPE u_long
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#define WXMALLOC(len) malloc(len, M_DEVBUF, M_NOWAIT)
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#define WXFREE(ptr) free(ptr, M_DEVBUF)
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#define SOFTC_IFP(ifp) ifp->if_softc
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#define WX_BPFTAP_ARG(ifp) ifp
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#define VTIMEOUT(sc, func, arg, time) (void) timeout(func, arg, time)
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#define TIMEOUT(sc, func, arg, time) (sc)->w.sch = timeout(func, arg, time)
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#define UNTIMEOUT(f, arg, sc) untimeout(f, arg, (sc)->w.sch)
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#define INLINE __inline
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#ifdef SMPNG
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#define WX_LOCK(_sc) mtx_lock(&(_sc)->wx_mtx)
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#define WX_UNLOCK(_sc) mtx_unlock(&(_sc)->wx_mtx)
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#define WX_ILOCK(_sc) mtx_lock(&(_sc)->wx_mtx)
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#define WX_IUNLK(_sc) mtx_unlock(&(_sc)->wx_mtx)
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#else
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#define WX_LOCK(_sc) _sc->w.spl = splimp()
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#define WX_UNLOCK(_sc) splx(_sc->w.spl)
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#define WX_ILOCK(_sc)
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#define WX_IUNLK(_sc)
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#endif
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#define WX_SOFTC_FROM_MII_ARG(x) device_get_softc(x)
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#define WX_MII_FROM_SOFTC(x) device_get_softc((x)->w.miibus)
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#define READ_CSR(sc, reg) \
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bus_space_read_4((sc)->w.st, (sc)->w.sh, (reg))
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#define WRITE_CSR(sc, reg, val) \
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bus_space_write_4((sc)->w.st, (sc)->w.sh, (reg), (val))
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/*
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* Transmit soft descriptor, used to manage packets as they come in.
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*/
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typedef struct rxpkt {
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struct mbuf *dptr; /* pointer to receive frame */
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u_int32_t dma_addr; /* dma address */
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} rxpkt_t;
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/*
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* Transmit soft descriptor, used to manage packets as they are transmitted.
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*/
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typedef struct txpkt {
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struct txpkt *next; /* next in a chain */
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struct mbuf *dptr; /* pointer to mbuf being sent */
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u_int32_t sidx; /* start index */
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u_int32_t eidx; /* end index */
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} txpkt_t;
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typedef struct wx_softc {
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/*
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* OS dependent storage... must be first...
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*/
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struct wxmdvar w;
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/*
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* misc goodies
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*/
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u_int32_t : 23,
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wx_mii : 1, /* non-zero if we have a PHY */
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wx_no_flow : 1,
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wx_ilos : 1,
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wx_no_ilos : 1,
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wx_verbose : 1,
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wx_debug : 1,
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ane_failed : 1,
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linkup : 1,
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all_mcasts : 1;
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u_int32_t wx_idnrev; /* chip revision && PCI ID */
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u_int16_t wx_cfg1;
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u_int16_t wx_txint_delay;
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u_int32_t wx_ienable; /* current ienable to use */
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u_int32_t wx_dcr; /* dcr used */
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u_int32_t wx_icr; /* last icr */
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/*
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* Statistics, soft && hard
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*/
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u_int32_t wx_intr;
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u_int32_t wx_linkintr;
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u_int32_t wx_rxintr;
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u_int32_t wx_xmitgc;
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u_int32_t wx_xmitpullup;
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u_int32_t wx_xmitcluster;
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u_int32_t wx_xmitputback;
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u_int32_t wx_xmitwanted;
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u_int32_t wx_xmitblocked;
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u_int32_t wx_xmitblocked1;
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u_int32_t wx_xmitrunt;
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u_int32_t wx_rxnobuf;
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/*
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* Soft copies of multicast addresses. We're only
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* using (right now) the rest of the receive address
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* registers- not the hashed multicast table.
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*/
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u_int8_t wx_mcaddr[WX_RAL_TAB_SIZE-1][6];
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u_int8_t wx_nmca; /* # active multicast addrs */
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/*
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* Receive Management
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* We have software and shared memory rings in a buddy store format.
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*/
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wxrd_t *rdescriptors; /* receive descriptor ring */
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rxpkt_t *rbase; /* base of soft rdesc list */
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u_int16_t rnxt; /* next descriptor to check */
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u_int16_t _pad;
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struct mbuf *rpending; /* pending partial packet */
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/*
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* Transmit Management
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* We have software and shared memory rings in a buddy store format.
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*/
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txpkt_t *tbase; /* base of soft soft management */
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txpkt_t *tbsyf, *tbsyl; /* linked busy list */
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wxtd_t *tdescriptors; /* transmit descriptor ring */
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u_int16_t tnxtfree; /* next free index (circular) */
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u_int16_t tactive; /* # active */
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} wx_softc_t;
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/*
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* We offset the the receive frame header by two bytes so that the actual
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* payload is 32 bit aligned. On platforms that require strict structure
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* alignment, this means that the ethernet frame header may have to be shifted
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* to align it at interrupt time, but because it's such a small amount
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* (fourteen bytes) and processors have gotten pretty fast, that's okay.
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* It may even turn out on some platforms that this doesn't have to happen.
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*/
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#define WX_RX_OFFSET_VALUE 2
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/*
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* Tunable Parameters.
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*
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* Descriptor lengths must be in multiples of 8.
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*/
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#define WX_MAX_TDESC 256 /* number of transmit descriptors */
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#define T_NXT_IDX(x) ((x + 1) & (WX_MAX_TDESC - 1))
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#define T_PREV_IDX(x) ((x - 1) & (WX_MAX_TDESC - 1))
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#define WX_MAX_RDESC 256 /* number of receive descriptors */
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#ifdef PADDED_CELL
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#define RXINCR 2
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#else
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#define RXINCR 1
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#endif
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#define R_NXT_IDX(x) ((x + RXINCR) & (WX_MAX_RDESC - 1))
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#define R_PREV_IDX(x) ((x - RXINCR) & (WX_MAX_RDESC - 1))
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/*
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* Link Up timeout, in milliseconds.
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*/
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#define WX_LINK_UP_TIMEOUT 500
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