19c749625f
ISDN4BSD is the work of our brand-new comitter: Hellmuth Michaelis, who has done a tremendous amount of work to bring us this far. There are still some outstanding issues and files to bring into the tree, and for now it will be needed to pick up all the extra docs from the isdn4bsd release. It is probably also a very good idea to subscribe to the isdn@freebsd.org mailing list before you try this out. These files correspond to release "beta Version 0.70.00 / December 1998" from Hellmuth.
431 lines
12 KiB
C
431 lines
12 KiB
C
/*
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* Copyright (c) 1998 Martin Husemann <martin@rumolt.teuto.de>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. The name of the author may not be used to endorse or promote products
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* derived from this software withough specific prior written permission
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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*---------------------------------------------------------------------------
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*
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* i4b_itk_ix1.c - ITK ix1 micro passive card driver for isdn4bsd
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* --------------------------------------------------------------
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*
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* $Id: i4b_itk_ix1.c,v 1.1 1998/12/16 13:43:20 hm Exp $
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*
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* last edit-date: [Wed Dec 16 14:46:36 1998]
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*
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*---------------------------------------------------------------------------
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*
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* The ITK ix1 micro ISDN card is an ISA card with one region
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* of four io ports mapped and a fixed irq all jumpered on the card.
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* Access to the board is straight forward and simmilar to
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* the ELSA and DYNALINK cards. If a PCI version of this card
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* exists all we need is probably a pci-bus attachment, all
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* this low level routines should work imediately.
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*
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* To reset the card:
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* - write 0x01 to ITK_CONFIG
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* - wait >= 10 ms
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* - write 0x00 to ITK_CONFIG
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*
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* To read or write data:
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* - write address to ITK_ALE port
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* - read data from or write data to ITK_ISAC_DATA port or ITK_HSCX_DATA port
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* The two HSCX channel registers are offset by HSCXA (0x00) and HSCXB (0x40).
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*
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* XXX - A reasonable probe routine has to be written.
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*
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*---------------------------------------------------------------------------*/
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#if defined(__FreeBSD__)
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#include "isic.h"
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#include "opt_i4b.h"
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#else
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#define NISIC 1
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#endif
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#if NISIC > 0 && defined(ITKIX1)
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#include <sys/param.h>
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#if defined(__FreeBSD__) && __FreeBSD__ >= 3
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#include <sys/ioccom.h>
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#else
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#include <sys/ioctl.h>
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#endif
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#include <sys/kernel.h>
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#include <sys/systm.h>
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#include <sys/mbuf.h>
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#ifdef __FreeBSD__
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#include <machine/clock.h>
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#include <i386/isa/isa_device.h>
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#else
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#include <machine/bus.h>
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#include <sys/device.h>
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#endif
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#include <sys/socket.h>
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#include <net/if.h>
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#ifdef __FreeBSD__
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#include <machine/i4b_debug.h>
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#include <machine/i4b_ioctl.h>
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#else
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#include <i4b/i4b_debug.h>
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#include <i4b/i4b_ioctl.h>
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#endif
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#include <i4b/layer1/i4b_l1.h>
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#include <i4b/layer1/i4b_isac.h>
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#include <i4b/layer1/i4b_hscx.h>
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#include <i4b/include/i4b_global.h>
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#define ITK_ISAC_DATA 0
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#define ITK_HSCX_DATA 1
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#define ITK_ALE 2
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#define ITK_CONFIG 3
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#define ITK_IO_SIZE 4
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#define HSCXA 0
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#define HSCXB 0x40
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#ifndef __FreeBSD__
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static void itkix1_read_fifo(struct isic_softc *sc, int what, void *buf, size_t size);
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static void itkix1_write_fifo(struct isic_softc *sc, int what, const void *buf, size_t size);
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static void itkix1_write_reg(struct isic_softc *sc, int what, bus_size_t offs, u_int8_t data);
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static u_int8_t itkix1_read_reg(struct isic_softc *sc, int what, bus_size_t offs);
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#else
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static u_char itkix1_read_reg(u_char *base, u_int offset);
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static void itkix1_write_reg(u_char *base, u_int offset, u_int v);
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static void itkix1_read_fifo(void *base, const void *buf, size_t len);
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static void itkix1_write_fifo(void *base, const void *buf, size_t len);
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#endif
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/*
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* Probe for card
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*/
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#ifdef __FreeBSD__
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int
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isic_probe_itkix1(struct isa_device *dev)
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{
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u_int8_t hd, cd;
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int ret;
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hd = inb(dev->id_iobase + ITK_HSCX_DATA);
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cd = inb(dev->id_iobase + ITK_CONFIG);
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ret = (hd == 0 && cd == 0xfc);
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#define ITK_PROBE_DEBUG
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#ifdef ITK_PROBE_DEBUG
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printf("\nITK ix1 micro probe: hscx = 0x%02x, config = 0x%02x, would have %s\n",
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hd, cd, ret ? "succeeded" : "failed");
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return 1;
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#else
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return ret;
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#endif
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}
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#else
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int
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isic_probe_itkix1(struct isic_attach_args *ia)
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{
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bus_space_tag_t t = ia->ia_maps[0].t;
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bus_space_handle_t h = ia->ia_maps[0].h;
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u_int8_t hd, cd;
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int ret;
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hd = bus_space_read_1(t, h, ITK_HSCX_DATA);
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cd = bus_space_read_1(t, h, ITK_CONFIG);
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ret = (hd == 0 && cd == 0xfc);
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#define ITK_PROBE_DEBUG
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#ifdef ITK_PROBE_DEBUG
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printf("\nITK ix1 micro probe: hscx = 0x%02x, config = 0x%02x, would have %s\n",
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hd, cd, ret ? "succeeded" : "failed");
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return 1;
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#else
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return ret;
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#endif
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}
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#endif
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/*
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* Attach card
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*/
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#ifdef __FreeBSD__
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int
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isic_attach_itkix1(struct isa_device *dev)
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{
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struct isic_softc *sc = &isic_sc[dev->id_unit];
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sc->sc_irq = dev->id_irq;
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dev->id_msize = 0;
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/* check if we got an iobase */
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sc->sc_port = dev->id_iobase;
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/* setup access routines */
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sc->clearirq = NULL;
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sc->readreg = itkix1_read_reg;
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sc->writereg = itkix1_write_reg;
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sc->readfifo = itkix1_read_fifo;
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sc->writefifo = itkix1_write_fifo;
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/* setup card type */
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sc->sc_cardtyp = CARD_TYPEP_ITKIX1;
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/* setup IOM bus type */
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sc->sc_bustyp = BUS_TYPE_IOM2;
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sc->sc_ipac = 0;
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sc->sc_bfifolen = HSCX_FIFO_LEN;
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/* setup ISAC and HSCX base addr */
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ISAC_BASE = (caddr_t) sc->sc_port;
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HSCX_A_BASE = (caddr_t) sc->sc_port + 1;
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HSCX_B_BASE = (caddr_t) sc->sc_port + 2;
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/* Read HSCX A/B VSTR. Expected value is 0x05 (V2.1). */
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if( ((HSCX_READ(0, H_VSTR) & 0xf) != 0x5) || ((HSCX_READ(1, H_VSTR) & 0xf) != 0x5) )
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{
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printf("isic%d: HSCX VSTR test failed for ITK ix1 micro\n",
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dev->id_unit);
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printf("isic%d: HSC0: VSTR: %#x\n",
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dev->id_unit, HSCX_READ(0, H_VSTR));
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printf("isic%d: HSC1: VSTR: %#x\n",
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dev->id_unit, HSCX_READ(1, H_VSTR));
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return (0);
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}
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outb((dev->id_iobase)+ITK_CONFIG, 1);
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DELAY(SEC_DELAY / 10);
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outb((dev->id_iobase)+ITK_CONFIG, 0);
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DELAY(SEC_DELAY / 10);
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return(1);
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}
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#else
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int isic_attach_itkix1(struct isic_softc *sc)
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{
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/* setup access routines */
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sc->clearirq = NULL;
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sc->readreg = itkix1_read_reg;
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sc->writereg = itkix1_write_reg;
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sc->readfifo = itkix1_read_fifo;
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sc->writefifo = itkix1_write_fifo;
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/* setup card type */
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sc->sc_cardtyp = CARD_TYPEP_ITKIX1;
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/* setup IOM bus type */
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sc->sc_bustyp = BUS_TYPE_IOM2;
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sc->sc_ipac = 0;
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sc->sc_bfifolen = HSCX_FIFO_LEN;
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/* Read HSCX A/B VSTR. Expected value is 0x05 (V2.1). */
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if( ((HSCX_READ(0, H_VSTR) & 0xf) != 0x5) || ((HSCX_READ(1, H_VSTR) & 0xf) != 0x5) )
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{
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printf("%s: HSCX VSTR test failed for ITK ix1 micro\n",
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sc->sc_dev.dv_xname);
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printf("%s: HSC0: VSTR: %#x\n",
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sc->sc_dev.dv_xname, HSCX_READ(0, H_VSTR));
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printf("%s: HSC1: VSTR: %#x\n",
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sc->sc_dev.dv_xname, HSCX_READ(1, H_VSTR));
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return 0;
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}
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bus_space_write_1(sc->sc_maps[0].t, sc->sc_maps[0].h, ITK_CONFIG, 1);
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DELAY(SEC_DELAY / 10);
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bus_space_write_1(sc->sc_maps[0].t, sc->sc_maps[0].h, ITK_CONFIG, 0);
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DELAY(SEC_DELAY / 10);
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return 1;
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}
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#endif
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#ifdef __FreeBSD__
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static void
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itkix1_read_fifo(void *buf, const void *base, size_t len)
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{
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int port = (u_long)base & ~0x0003;
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switch ((u_long)base & 3) {
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case 0: /* ISAC */
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outb(port+ITK_ALE, 0);
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insb(port+ITK_ISAC_DATA, (u_char *)buf, (u_int)len);
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break;
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case 1: /* HSCXA */
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outb(port+ITK_ALE, HSCXA);
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insb(port+ITK_HSCX_DATA, (u_char *)buf, (u_int)len);
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break;
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case 2: /* HSCXB */
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outb(port+ITK_ALE, HSCXB);
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insb(port+ITK_HSCX_DATA, (u_char *)buf, (u_int)len);
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break;
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}
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}
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#else
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static void
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itkix1_read_fifo(struct isic_softc *sc, int what, void *buf, size_t size)
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{
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bus_space_tag_t t = sc->sc_maps[0].t;
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bus_space_handle_t h = sc->sc_maps[0].h;
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switch (what) {
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case ISIC_WHAT_ISAC:
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bus_space_write_1(t, h, ITK_ALE, 0);
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bus_space_read_multi_1(t, h, ITK_ISAC_DATA, buf, size);
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break;
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case ISIC_WHAT_HSCXA:
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bus_space_write_1(t, h, ITK_ALE, HSCXA);
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bus_space_read_multi_1(t, h, ITK_HSCX_DATA, buf, size);
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break;
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case ISIC_WHAT_HSCXB:
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bus_space_write_1(t, h, ITK_ALE, HSCXB);
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bus_space_read_multi_1(t, h, ITK_HSCX_DATA, buf, size);
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break;
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}
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}
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#endif
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#ifdef __FreeBSD__
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static void
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itkix1_write_fifo(void *base, const void *buf, size_t len)
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{
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int port = (u_long)base & ~0x0003;
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switch ((u_long)base & 3) {
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case 0: /* ISAC */
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outb(port+ITK_ALE, 0);
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outsb(port+ITK_ISAC_DATA, (u_char *)buf, (u_int)len);
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break;
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case 1: /* HSCXA */
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outb(port+ITK_ALE, HSCXA);
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outsb(port+ITK_HSCX_DATA, (u_char *)buf, (u_int)len);
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break;
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case 2: /* HSCXB */
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outb(port+ITK_ALE, HSCXB);
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outsb(port+ITK_HSCX_DATA, (u_char *)buf, (u_int)len);
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break;
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}
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}
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#else
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static void itkix1_write_fifo(struct isic_softc *sc, int what, const void *buf, size_t size)
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{
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bus_space_tag_t t = sc->sc_maps[0].t;
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bus_space_handle_t h = sc->sc_maps[0].h;
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switch (what) {
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case ISIC_WHAT_ISAC:
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bus_space_write_1(t, h, ITK_ALE, 0);
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bus_space_write_multi_1(t, h, ITK_ISAC_DATA, (u_int8_t*)buf, size);
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break;
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case ISIC_WHAT_HSCXA:
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bus_space_write_1(t, h, ITK_ALE, HSCXA);
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bus_space_write_multi_1(t, h, ITK_HSCX_DATA, (u_int8_t*)buf, size);
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break;
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case ISIC_WHAT_HSCXB:
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bus_space_write_1(t, h, ITK_ALE, HSCXB);
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bus_space_write_multi_1(t, h, ITK_HSCX_DATA, (u_int8_t*)buf, size);
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break;
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}
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}
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#endif
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#ifdef __FreeBSD__
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static void
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itkix1_write_reg(u_char *base, u_int offset, u_int v)
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{
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int port = (u_long)base & ~0x0003;
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switch ((u_long)base & 3) {
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case 0: /* ISAC */
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outb(port+ITK_ALE, offset);
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outb(port+ITK_ISAC_DATA, (u_char)v);
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break;
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case 1: /* HSCXA */
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outb(port+ITK_ALE, HSCXA+offset);
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outb(port+ITK_HSCX_DATA, (u_char)v);
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break;
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case 2: /* HSCXB */
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outb(port+ITK_ALE, HSCXB+offset);
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outb(port+ITK_HSCX_DATA, (u_char)v);
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break;
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}
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}
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#else
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static void itkix1_write_reg(struct isic_softc *sc, int what, bus_size_t offs, u_int8_t data)
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{
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bus_space_tag_t t = sc->sc_maps[0].t;
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bus_space_handle_t h = sc->sc_maps[0].h;
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switch (what) {
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case ISIC_WHAT_ISAC:
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bus_space_write_1(t, h, ITK_ALE, offs);
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bus_space_write_1(t, h, ITK_ISAC_DATA, data);
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break;
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case ISIC_WHAT_HSCXA:
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bus_space_write_1(t, h, ITK_ALE, HSCXA+offs);
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bus_space_write_1(t, h, ITK_HSCX_DATA, data);
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break;
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case ISIC_WHAT_HSCXB:
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bus_space_write_1(t, h, ITK_ALE, HSCXB+offs);
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bus_space_write_1(t, h, ITK_HSCX_DATA, data);
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break;
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}
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}
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#endif
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#ifdef __FreeBSD__
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static u_char
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itkix1_read_reg(u_char *base, u_int offset)
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{
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int port = (u_long)base & ~0x0003;
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switch ((u_long)base & 3) {
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case 0: /* ISAC */
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outb(port+ITK_ALE, offset);
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return (inb(port+ITK_ISAC_DATA));
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case 1: /* HSCXA */
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outb(port+ITK_ALE, HSCXA+offset);
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return (inb(port+ITK_HSCX_DATA));
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case 2: /* HSCXB */
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outb(port+ITK_ALE, HSCXB+offset);
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return (inb(port+ITK_HSCX_DATA));
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}
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}
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#else
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static u_int8_t itkix1_read_reg(struct isic_softc *sc, int what, bus_size_t offs)
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{
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bus_space_tag_t t = sc->sc_maps[0].t;
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bus_space_handle_t h = sc->sc_maps[0].h;
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switch (what) {
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case ISIC_WHAT_ISAC:
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bus_space_write_1(t, h, ITK_ALE, offs);
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return bus_space_read_1(t, h, ITK_ISAC_DATA);
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case ISIC_WHAT_HSCXA:
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bus_space_write_1(t, h, ITK_ALE, HSCXA+offs);
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return bus_space_read_1(t, h, ITK_HSCX_DATA);
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case ISIC_WHAT_HSCXB:
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bus_space_write_1(t, h, ITK_ALE, HSCXB+offs);
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return bus_space_read_1(t, h, ITK_HSCX_DATA);
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}
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return 0;
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}
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#endif
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#endif /* ITKIX1 */
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