Conrad Meyer 10386b56ad pmap_invalidate_range: For very large ranges, flush the whole TLB ... Typical TLBs have 40-512 entries available. At some point, iterating every single page in a requested invalidation range and issuing invlpg on it is more expensive than flushing the TLB and allowing it to reload on demand. Broadwell CPUs have 1536 L2 TLB entries, so I've picked the arbitrary number 4096 entries as a hueristic at which point we flush TLB rather than invalidating every single potential page. Reviewed by: alc Feedback from: jhb, kib MFC notes: Depends on r291688 Sponsored by: EMC / Isilon Storage Division Differential Revision: https://reviews.freebsd.org/D4280		2015-12-06 17:39:13 +00:00
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acpica	If x86 CPU implementation of the MWAIT instruction reasonably	2015-05-09 12:28:48 +00:00
amd64	pmap_invalidate_range: For very large ranges, flush the whole TLB	2015-12-06 17:39:13 +00:00
cloudabi64	Refactoring: move out generic bits from cloudabi64_sysvec.c.	2015-10-22 09:07:53 +00:00
conf	Fix whitespace on addition of IPSEC option	2015-11-26 21:35:50 +00:00
ia32	Remove several write-only variables, all reported by the gcc 4.9	2015-05-29 13:24:17 +00:00
include	For amd64 non-PCID machines, and for i386 machines with support for	2015-12-03 11:14:14 +00:00
linux	Remove sv_prepsyscall, sv_sigsize and sv_sigtbl members of the struct	2015-11-28 08:49:07 +00:00
linux32	Remove sv_prepsyscall, sv_sigsize and sv_sigtbl members of the struct	2015-11-28 08:49:07 +00:00
pci	Pull in r267961 and r267973 again. Fix for issues reported will follow.	2014-06-28 03:56:17 +00:00
vmm	Move the 'devmem' device nodes from /dev/vmm to /dev/vmm.io	2015-07-06 19:41:43 +00:00
Makefile	Bring the tags and links entries for amd64 up to date.	2015-10-27 22:59:24 +00:00