190cc7cf25
Terasic DE-4, and Terasic tPad Altera-based boards. Sponsored by: DARPA, AFRL
59 lines
1.3 KiB
Plaintext
59 lines
1.3 KiB
Plaintext
#
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# BERI_TEMPLATE -- a template kernel configuration for the SRI/Cambridge
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# "BERI" (Bluespec Extensible RISC Implementation) FPGA soft core CPU. This
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# kernel configuration file will be included by other board-specific files,
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# and so contains only BERI features common across all board targets.
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#
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# $FreeBSD$
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#
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ident BERI_TEMPLATE
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machine mips mips64
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cpu CPU_BERI
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options HZ=200
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makeoptions ARCH_FLAGS="-march=mips64 -mabi=64"
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makeoptions KERNLOADADDR=0xffffffff80100000
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include "../beri/std.beri"
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makeoptions DEBUG=-g #Build kernel with gdb(1) debug symbols
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makeoptions MODULES_OVERRIDE=""
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options DDB
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options KDB
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options ALT_BREAK_TO_DEBUGGER
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options KTRACE
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options CAPABILITY_MODE
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options CAPABILITIES
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options SCHED_ULE
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options FFS #Berkeley Fast Filesystem
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options INET
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options INET6
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options NFSCL
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options NFS_ROOT
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# Debugging for use in -current
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#options DEADLKRES #Enable the deadlock resolver
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options INVARIANTS #Enable calls of extra sanity checking
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options INVARIANT_SUPPORT #Extra sanity checks of internal structures, required by INVARIANTS
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#options WITNESS #Enable checks to detect deadlocks and cycles
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#options WITNESS_SKIPSPIN #Don't run witness on spinlocks for speed
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device geom_map
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device md
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device ether
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device loop
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device random
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device snp
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