b50d8083ab
ar724x_pci.c. * Move out the code which populates the firmware into ar71xx_fixup.c * Shuffle around the ar724x fixup code to match what the ar71xx fixup code does. I've validated this on an AR7240 with AR9285 on-board NIC. It doesn't yet load, as the AR9285 EEPROM code needs to be made "flash aware." TODO: * Validate that I haven't broken AR71xx * Test AR9285/AR9287 onboard NICs, complete with EEPROM code changes * Port over the needed BAR hacks for AR7240, AR7241 and AR7242 from Linux OpenWRT. The current WAR has only been tested on the AR7240 and I'm not sure the way the BAR register is treated is "right". The "fixup" method here is right when setting the BAR for local access - ie, the BAR address is either 0xffff (AR7240) or 0x1000ffff (AR7241/AR7242), but the ath9k-fixup.c code (Linux OpenWRT) does this when setting the initial "fixup" BAR. It then restores the original BAR. I'll have to read the ar724x PCI bus glue to see what other special cases await.
154 lines
4.6 KiB
C
154 lines
4.6 KiB
C
/*-
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* Copyright (c) 2009, Oleksandr Tymoshenko <gonzo@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice unmodified, this list of conditions, and the following
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* disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include "opt_ar71xx.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/interrupt.h>
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#include <sys/malloc.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/rman.h>
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#include <sys/lock.h>
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#include <sys/mutex.h>
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#include <vm/vm.h>
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#include <vm/pmap.h>
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#include <vm/vm_extern.h>
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#include <machine/bus.h>
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#include <machine/cpu.h>
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#include <machine/intr_machdep.h>
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#include <machine/pmap.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcib_private.h>
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#include "pcib_if.h"
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#include <mips/atheros/ar71xxreg.h>
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#include <mips/atheros/ar71xx_pci_bus_space.h>
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#include <mips/atheros/ar71xx_cpudef.h>
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#include <sys/linker.h>
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#include <sys/firmware.h>
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#include <mips/atheros/ar71xx_fixup.h>
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/*
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* Take a copy of the EEPROM contents and squirrel it away in a firmware.
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* The SPI flash will eventually cease to be memory-mapped, so we need
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* to take a copy of this before the SPI driver initialises.
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*/
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void
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ar71xx_pci_slot_create_eeprom_firmware(device_t dev, u_int bus, u_int slot,
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u_int func, long int flash_addr, int size)
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{
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char buf[64];
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uint16_t *cal_data = (uint16_t *) MIPS_PHYS_TO_KSEG1(flash_addr);
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void *eeprom = NULL;
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const struct firmware *fw = NULL;
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device_printf(dev, "EEPROM firmware: 0x%lx @ %d bytes\n",
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flash_addr, size);
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eeprom = malloc(size, M_DEVBUF, M_WAITOK | M_ZERO);
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if (! eeprom) {
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device_printf(dev,
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"%s: malloc failed for '%s', aborting EEPROM\n",
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__func__, buf);
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return;
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}
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memcpy(eeprom, cal_data, size);
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/*
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* Generate a flash EEPROM 'firmware' from the given memory
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* region. Since the SPI controller will eventually
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* go into port-IO mode instead of memory-mapped IO
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* mode, a copy of the EEPROM contents is required.
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*/
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snprintf(buf, sizeof(buf), "%s.%d.bus.%d.%d.%d.eeprom_firmware",
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device_get_name(dev), device_get_unit(dev), bus, slot, func);
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fw = firmware_register(buf, eeprom, size, 1, NULL);
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if (fw == NULL) {
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device_printf(dev, "%s: firmware_register (%s) failed\n",
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__func__, buf);
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free(eeprom, M_DEVBUF);
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return;
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}
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device_printf(dev, "device EEPROM '%s' registered\n", buf);
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}
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#if 0
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static void
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ar71xx_pci_slot_fixup(device_t dev, u_int bus, u_int slot, u_int func)
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{
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long int flash_addr;
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char buf[64];
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int size;
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/*
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* Check whether the given slot has a hint to poke.
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*/
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if (bootverbose)
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device_printf(dev, "%s: checking dev %s, %d/%d/%d\n",
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__func__, device_get_nameunit(dev), bus, slot, func);
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snprintf(buf, sizeof(buf), "bus.%d.%d.%d.ath_fixup_addr",
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bus, slot, func);
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if (resource_long_value(device_get_name(dev), device_get_unit(dev),
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buf, &flash_addr) == 0) {
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snprintf(buf, sizeof(buf), "bus.%d.%d.%d.ath_fixup_size",
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bus, slot, func);
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if (resource_int_value(device_get_name(dev),
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device_get_unit(dev), buf, &size) != 0) {
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device_printf(dev,
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"%s: missing hint '%s', aborting EEPROM\n",
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__func__, buf);
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return;
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}
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device_printf(dev, "found EEPROM at 0x%lx on %d.%d.%d\n",
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flash_addr, bus, slot, func);
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ar71xx_pci_fixup(dev, bus, slot, func, flash_addr, size);
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ar71xx_pci_slot_create_eeprom_firmware(dev, bus, slot, func,
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flash_addr, size);
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}
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}
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#endif /* 0 */
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