0b407da766
altera_avgen(4). Fix white space nit that must have arisen during the merge from Perforce. Submitted by: brooks Sponsored by: DARPA, AFRL
112 lines
2.7 KiB
Plaintext
112 lines
2.7 KiB
Plaintext
# $FreeBSD$
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#
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# Altera JTAG UARTs configured for console, debugging, and data putput on the
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# Terasic DE-4.
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#
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hint.altera_jtag_uart.0.at="nexus0"
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hint.altera_jtag_uart.0.maddr=0x7f000000
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hint.altera_jtag_uart.0.msize=0x40
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hint.altera_jtag_uart.0.irq=0
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hint.altera_jtag_uart.1.at="nexus0"
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hint.altera_jtag_uart.1.maddr=0x7f001000
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hint.altera_jtag_uart.1.msize=0x40
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hint.altera_jtag_uart.2.at="nexus0"
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hint.altera_jtag_uart.2.maddr=0x7f002000
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hint.altera_jtag_uart.2.msize=0x40
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#
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# On-board DE4 and tPad SD Card IP core
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#
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hint.altera_sdcardc.0.at="nexus0"
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hint.altera_sdcardc.0.maddr=0x7f008000
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hint.altera_sdcardc.0.msize=0x400
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#
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# On-board DE4 8-element LED
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#
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hint.terasic_de4led.0.at="nexus0"
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hint.terasic_de4led.0.maddr=0x7f006000
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hint.terasic_de4led.0.msize=1
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hint.terasic_de4led.0.de4led_0_cmd="f9"
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#
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# Terasic Multi-touch LCD (MTL), an optional feature in DE-4 configurations.
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#
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hint.terasic_mtl.0.at="nexus0"
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hint.terasic_mtl.0.reg_maddr=0x70400000
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hint.terasic_mtl.0.reg_msize=0x1000
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hint.terasic_mtl.0.pixel_maddr=0x70000000
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hint.terasic_mtl.0.pixel_msize=0x177000
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hint.terasic_mtl.0.text_maddr=0x70177000
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hint.terasic_mtl.0.text_msize=0x2000
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#
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# BERI Hardware Version ROM
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#
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hint.altera_avgen.0.at="nexus0"
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hint.altera_avgen.0.maddr=0x7F00A000
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hint.altera_avgen.0.msize=20
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hint.altera_avgen.0.width=4
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hint.altera_avgen.0.fileio="rw"
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hint.altera_avgen.0.devname="berirom"
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#
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# Expose the DE4 flash via an Avalon "generic" device.
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# This is incompatible with the isf(4) driver.
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#
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#hint.altera_avgen.0.at="nexus0"
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#hint.altera_avgen.0.maddr=0x74000000
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#hint.altera_avgen.0.msize=0x4000000
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#hint.altera_avgen.0.width=2
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#hint.altera_avgen.0.fileio="rw"
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#hint.altera_avgen.0.mmapio="rwx"
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#hint.altera_avgen.0.devname="de4flash"
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#
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# Expose the DE4 buttons and switches via an Avalon "generic" device.
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#
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hint.altera_avgen.0.at="nexus0"
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hint.altera_avgen.0.maddr=0x7f009000
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hint.altera_avgen.0.msize=2
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hint.altera_avgen.0.width=1
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hint.altera_avgen.0.fileio="r"
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hint.altera_avgen.0.devname="de4bsw"
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#
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# General Intel StrataFlash driver
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#
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hint.isf.0.at="nexus0"
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hint.isf.0.maddr=0x74000000
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hint.isf.0.msize=0x2000000
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hint.isf.1.at="nexus0"
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hint.isf.1.maddr=0x76000000
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hint.isf.1.msize=0x2000000
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# Reserved configuration blocks. Don't touch.
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hint.map.0.at="isf0"
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hint.map.0.start=0x00000000
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hint.map.0.end=0x00020000
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hint.map.0.name="config"
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hint.map.0.readonly=1
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# Hardwired location of bitfile
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hint.map.1.at="isf0"
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hint.map.1.start=0x00020000
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hint.map.1.end=0x01820000
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hint.map.1.name="fpga"
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# Kernel on first chip
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hint.map.2.at="isf0"
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hint.map.2.start=0x01820000
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hint.map.2.end=0x02000000
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hint.map.2.name="reserved"
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# The second chip
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hint.map.3.at="isf1"
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hint.map.3.start=0x00000000
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hint.map.3.end=0x02000000
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hint.map.3.name="kernel"
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