f7a5c9d346
This is a MIPS4KC CPU with various embedded peripherals, including wireless and ethernet support. This commit includes the platform, UART, ethernet MAC and GPIO support. The interrupt-driven GPIO code is disabled for now pending GPIO changes from the submitter. Submitted by: Aleksandr Rybalko <ray@dlink.ua>
83 lines
2.6 KiB
C
83 lines
2.6 KiB
C
/*-
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* Copyright (c) 2006 Wojciech A. Koszek <wkoszek@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $Id$
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*/
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/*
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* Skeleton of this file was based on respective code for ARM
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* code written by Olivier Houchard.
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*/
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/*
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* XXXMIPS: This file is hacked from arm/... . XXXMIPS here means this file is
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* experimental and was written for MIPS32 port.
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*/
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#include "opt_uart.h"
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/cons.h>
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#include <machine/bus.h>
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#include <dev/uart/uart.h>
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#include <dev/uart/uart_cpu.h>
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#include <mips/rt305x/rt305xreg.h>
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extern struct uart_class uart_rt305x_uart_class;
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bus_space_tag_t uart_bus_space_io;
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bus_space_tag_t uart_bus_space_mem;
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int
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uart_cpu_eqres(struct uart_bas *b1, struct uart_bas *b2)
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{
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return ((b1->bsh == b2->bsh && b1->bst == b2->bst) ? 1 : 0);
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}
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int
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uart_cpu_getdev(int devtype, struct uart_devinfo *di)
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{
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di->ops = uart_getops(&uart_rt305x_uart_class);
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di->bas.chan = 0;
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di->bas.bst = mips_bus_space_generic;
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di->bas.regshft = 2;
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di->bas.rclk = SYSTEM_CLOCK;
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di->baudrate = 115200;
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di->databits = 8;
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di->stopbits = 1;
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di->parity = UART_PARITY_NONE;
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uart_bus_space_io = NULL;
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uart_bus_space_mem = mips_bus_space_generic;
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di->bas.bsh = MIPS_PHYS_TO_KSEG1(UARTLITE_BASE);
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return (0);
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}
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