80 lines
3.2 KiB
C
80 lines
3.2 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright (c) 2012 Oleksandr Tymoshenko <gonzo@freebsd.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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/*
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* Defines for converting physical address to VideoCore bus address and back
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*/
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#ifndef _BCM2835_VCBUS_H_
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#define _BCM2835_VCBUS_H_
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#define BCM2835_VCBUS_SDRAM_CACHED 0x40000000
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#define BCM2835_VCBUS_SDRAM_UNCACHED 0xC0000000
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#define BCM2835_ARM_IO_BASE 0x20000000
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#define BCM2835_VCBUS_IO_BASE 0x7E000000
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#define BCM2835_VCBUS_SDRAM_BASE BCM2835_VCBUS_SDRAM_CACHED
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#define BCM2836_ARM_IO_BASE 0x3f000000
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#define BCM2836_VCBUS_IO_BASE BCM2835_VCBUS_IO_BASE
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#define BCM2836_VCBUS_SDRAM_BASE BCM2835_VCBUS_SDRAM_UNCACHED
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#define BCM2837_ARM_IO_BASE BCM2836_ARM_IO_BASE
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#define BCM2837_VCBUS_IO_BASE BCM2835_VCBUS_IO_BASE
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#define BCM2837_VCBUS_SDRAM_BASE BCM2835_VCBUS_SDRAM_UNCACHED
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#define BCM2838_ARM_IO_BASE 0xfe000000
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#define BCM2838_VCBUS_IO_BASE BCM2835_VCBUS_IO_BASE
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#define BCM2838_VCBUS_SDRAM_BASE BCM2835_VCBUS_SDRAM_UNCACHED
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/*
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* Max allowed SDRAM mapping for most peripherals. The Raspberry Pi 4 has more
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* than 1 GB of SDRAM, but only the lowest 1 GB is mapped into the "Legacy
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* Master view" of the address space accessible by the DMA engine. Technically,
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* we can slide this window around to whatever similarly sized range is
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* convenient, but this is the most useful window given how busdma(9) works and
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* that the window must be reconfigured for all channels in a given DMA engine.
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* The DMA lite engine's window can be configured separately from the 30-bit DMA
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* engine.
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*/
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#define BCM2838_PERIPH_MAXADDR 0x3fffffff
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#define BCM28XX_ARM_IO_SIZE 0x01000000
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vm_paddr_t bcm283x_armc_to_vcbus(vm_paddr_t pa);
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vm_paddr_t bcm283x_vcbus_to_armc(vm_paddr_t vca);
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bus_addr_t bcm283x_dmabus_peripheral_lowaddr(void);
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#define ARMC_TO_VCBUS(pa) bcm283x_armc_to_vcbus(pa)
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#define VCBUS_TO_ARMC(vca) bcm283x_vcbus_to_armc(vca)
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/* Compatibility name for vchiq arm interface. */
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#define PHYS_TO_VCBUS ARMC_TO_VCBUS
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#endif /* _BCM2835_VCBUS_H_ */
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