685dc743dc
Remove /^[\s*]*__FBSDID\("\$FreeBSD\$"\);?\s*\n/
633 lines
20 KiB
C
633 lines
20 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright (c) 2019,2020 Jeffrey Roberson <jeff@FreeBSD.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice unmodified, this list of conditions, and the following
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* disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/counter.h>
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#include <sys/kernel.h>
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#include <sys/limits.h>
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#include <sys/proc.h>
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#include <sys/smp.h>
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#include <sys/smr.h>
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#include <sys/sysctl.h>
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#include <vm/uma.h>
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/*
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* Global Unbounded Sequences (GUS)
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*
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* This is a novel safe memory reclamation technique inspired by
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* epoch based reclamation from Samy Al Bahra's concurrency kit which
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* in turn was based on work described in:
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* Fraser, K. 2004. Practical Lock-Freedom. PhD Thesis, University
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* of Cambridge Computing Laboratory.
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* And shares some similarities with:
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* Wang, Stamler, Parmer. 2016 Parallel Sections: Scaling System-Level
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* Data-Structures
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*
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* This is not an implementation of hazard pointers or related
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* techniques. The term safe memory reclamation is used as a
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* generic descriptor for algorithms that defer frees to avoid
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* use-after-free errors with lockless datastructures or as
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* a mechanism to detect quiescence for writer synchronization.
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*
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* The basic approach is to maintain a monotonic write sequence
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* number that is updated on some application defined granularity.
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* Readers record the most recent write sequence number they have
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* observed. A shared read sequence number records the lowest
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* sequence number observed by any reader as of the last poll. Any
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* write older than this value has been observed by all readers
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* and memory can be reclaimed. Like Epoch we also detect idle
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* readers by storing an invalid sequence number in the per-cpu
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* state when the read section exits. Like Parsec we establish
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* a global write clock that is used to mark memory on free.
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*
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* The write and read sequence numbers can be thought of as a two
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* handed clock with readers always advancing towards writers. GUS
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* maintains the invariant that all readers can safely access memory
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* that was visible at the time they loaded their copy of the sequence
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* number. Periodically the read sequence or hand is polled and
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* advanced as far towards the write sequence as active readers allow.
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* Memory which was freed between the old and new global read sequence
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* number can now be reclaimed. When the system is idle the two hands
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* meet and no deferred memory is outstanding. Readers never advance
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* any sequence number, they only observe them. The shared read
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* sequence number is consequently never higher than the write sequence.
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* A stored sequence number that falls outside of this range has expired
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* and needs no scan to reclaim.
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*
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* A notable distinction between GUS and Epoch, qsbr, rcu, etc. is
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* that advancing the sequence number is decoupled from detecting its
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* observation. That is to say, the delta between read and write
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* sequence numbers is not bound. This can be thought of as a more
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* generalized form of epoch which requires them at most one step
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* apart. This results in a more granular assignment of sequence
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* numbers even as read latencies prohibit all or some expiration.
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* It also allows writers to advance the sequence number and save the
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* poll for expiration until a later time when it is likely to
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* complete without waiting. The batch granularity and free-to-use
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* latency is dynamic and can be significantly smaller than in more
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* strict systems.
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*
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* This mechanism is primarily intended to be used in coordination with
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* UMA. By integrating with the allocator we avoid all of the callout
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* queue machinery and are provided with an efficient way to batch
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* sequence advancement and waiting. The allocator accumulates a full
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* per-cpu cache of memory before advancing the sequence. It then
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* delays waiting for this sequence to expire until the memory is
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* selected for reuse. In this way we only increment the sequence
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* value once for n=cache-size frees and the waits are done long
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* after the sequence has been expired so they need only be verified
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* to account for pathological conditions and to advance the read
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* sequence. Tying the sequence number to the bucket size has the
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* nice property that as the zone gets busier the buckets get larger
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* and the sequence writes become fewer. If the coherency of advancing
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* the write sequence number becomes too costly we can advance
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* it for every N buckets in exchange for higher free-to-use
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* latency and consequently higher memory consumption.
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*
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* If the read overhead of accessing the shared cacheline becomes
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* especially burdensome an invariant TSC could be used in place of the
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* sequence. The algorithm would then only need to maintain the minimum
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* observed tsc. This would trade potential cache synchronization
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* overhead for local serialization and cpu timestamp overhead.
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*/
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/*
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* A simplified diagram:
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*
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* 0 UINT_MAX
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* | -------------------- sequence number space -------------------- |
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* ^ rd seq ^ wr seq
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* | ----- valid sequence numbers ---- |
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* ^cpuA ^cpuC
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* | -- free -- | --------- deferred frees -------- | ---- free ---- |
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*
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*
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* In this example cpuA has the lowest sequence number and poll can
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* advance rd seq. cpuB is not running and is considered to observe
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* wr seq.
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*
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* Freed memory that is tagged with a sequence number between rd seq and
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* wr seq can not be safely reclaimed because cpuA may hold a reference to
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* it. Any other memory is guaranteed to be unreferenced.
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*
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* Any writer is free to advance wr seq at any time however it may busy
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* poll in pathological cases.
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*/
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static uma_zone_t smr_shared_zone;
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static uma_zone_t smr_zone;
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#ifndef INVARIANTS
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#define SMR_SEQ_INIT 1 /* All valid sequence numbers are odd. */
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#define SMR_SEQ_INCR 2
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/*
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* SMR_SEQ_MAX_DELTA is the maximum distance allowed between rd_seq and
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* wr_seq. For the modular arithmetic to work a value of UNIT_MAX / 2
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* would be possible but it is checked after we increment the wr_seq so
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* a safety margin is left to prevent overflow.
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*
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* We will block until SMR_SEQ_MAX_ADVANCE sequence numbers have progressed
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* to prevent integer wrapping. See smr_advance() for more details.
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*/
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#define SMR_SEQ_MAX_DELTA (UINT_MAX / 4)
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#define SMR_SEQ_MAX_ADVANCE (SMR_SEQ_MAX_DELTA - 1024)
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#else
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/* We want to test the wrapping feature in invariants kernels. */
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#define SMR_SEQ_INCR (UINT_MAX / 10000)
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#define SMR_SEQ_INIT (UINT_MAX - 100000)
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/* Force extra polls to test the integer overflow detection. */
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#define SMR_SEQ_MAX_DELTA (SMR_SEQ_INCR * 32)
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#define SMR_SEQ_MAX_ADVANCE SMR_SEQ_MAX_DELTA / 2
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#endif
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/*
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* The grace period for lazy (tick based) SMR.
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*
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* Hardclock is responsible for advancing ticks on a single CPU while every
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* CPU receives a regular clock interrupt. The clock interrupts are flushing
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* the store buffers and any speculative loads that may violate our invariants.
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* Because these interrupts are not synchronized we must wait one additional
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* tick in the future to be certain that all processors have had their state
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* synchronized by an interrupt.
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*
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* This assumes that the clock interrupt will only be delayed by other causes
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* that will flush the store buffer or prevent access to the section protected
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* data. For example, an idle processor, or an system management interrupt,
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* or a vm exit.
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*/
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#define SMR_LAZY_GRACE 2
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#define SMR_LAZY_INCR (SMR_LAZY_GRACE * SMR_SEQ_INCR)
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/*
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* The maximum sequence number ahead of wr_seq that may still be valid. The
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* sequence may not be advanced on write for lazy or deferred SMRs. In this
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* case poll needs to attempt to forward the sequence number if the goal is
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* within wr_seq + SMR_SEQ_ADVANCE.
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*/
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#define SMR_SEQ_ADVANCE SMR_LAZY_INCR
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static SYSCTL_NODE(_debug, OID_AUTO, smr, CTLFLAG_RW | CTLFLAG_MPSAFE, NULL,
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"SMR Stats");
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static COUNTER_U64_DEFINE_EARLY(advance);
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SYSCTL_COUNTER_U64(_debug_smr, OID_AUTO, advance, CTLFLAG_RW, &advance, "");
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static COUNTER_U64_DEFINE_EARLY(advance_wait);
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SYSCTL_COUNTER_U64(_debug_smr, OID_AUTO, advance_wait, CTLFLAG_RW, &advance_wait, "");
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static COUNTER_U64_DEFINE_EARLY(poll);
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SYSCTL_COUNTER_U64(_debug_smr, OID_AUTO, poll, CTLFLAG_RW, &poll, "");
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static COUNTER_U64_DEFINE_EARLY(poll_scan);
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SYSCTL_COUNTER_U64(_debug_smr, OID_AUTO, poll_scan, CTLFLAG_RW, &poll_scan, "");
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static COUNTER_U64_DEFINE_EARLY(poll_fail);
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SYSCTL_COUNTER_U64(_debug_smr, OID_AUTO, poll_fail, CTLFLAG_RW, &poll_fail, "");
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/*
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* Advance a lazy write sequence number. These move forward at the rate of
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* ticks. Grace is SMR_LAZY_INCR (2 ticks) in the future.
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*
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* This returns the goal write sequence number.
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*/
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static smr_seq_t
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smr_lazy_advance(smr_t smr, smr_shared_t s)
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{
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union s_wr s_wr, old;
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int t, d;
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CRITICAL_ASSERT(curthread);
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/*
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* Load the stored ticks value before the current one. This way the
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* current value can only be the same or larger.
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*/
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old._pair = s_wr._pair = atomic_load_acq_64(&s->s_wr._pair);
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t = ticks;
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/*
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* The most probable condition that the update already took place.
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*/
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d = t - s_wr.ticks;
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if (__predict_true(d == 0))
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goto out;
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/* Cap the rate of advancement and handle long idle periods. */
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if (d > SMR_LAZY_GRACE || d < 0)
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d = SMR_LAZY_GRACE;
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s_wr.ticks = t;
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s_wr.seq += d * SMR_SEQ_INCR;
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/*
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* This can only fail if another thread races to call advance().
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* Strong cmpset semantics mean we are guaranteed that the update
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* happened.
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*/
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atomic_cmpset_64(&s->s_wr._pair, old._pair, s_wr._pair);
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out:
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return (s_wr.seq + SMR_LAZY_INCR);
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}
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/*
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* Increment the shared write sequence by 2. Since it is initialized
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* to 1 this means the only valid values are odd and an observed value
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* of 0 in a particular CPU means it is not currently in a read section.
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*/
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static smr_seq_t
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smr_shared_advance(smr_shared_t s)
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{
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return (atomic_fetchadd_int(&s->s_wr.seq, SMR_SEQ_INCR) + SMR_SEQ_INCR);
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}
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/*
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* Advance the write sequence number for a normal smr section. If the
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* write sequence is too far behind the read sequence we have to poll
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* to advance rd_seq and prevent undetectable wraps.
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*/
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static smr_seq_t
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smr_default_advance(smr_t smr, smr_shared_t s)
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{
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smr_seq_t goal, s_rd_seq;
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CRITICAL_ASSERT(curthread);
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KASSERT((zpcpu_get(smr)->c_flags & SMR_LAZY) == 0,
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("smr_default_advance: called with lazy smr."));
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/*
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* Load the current read seq before incrementing the goal so
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* we are guaranteed it is always < goal.
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*/
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s_rd_seq = atomic_load_acq_int(&s->s_rd_seq);
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goal = smr_shared_advance(s);
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/*
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* Force a synchronization here if the goal is getting too
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* far ahead of the read sequence number. This keeps the
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* wrap detecting arithmetic working in pathological cases.
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*/
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if (SMR_SEQ_DELTA(goal, s_rd_seq) >= SMR_SEQ_MAX_DELTA) {
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counter_u64_add(advance_wait, 1);
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smr_wait(smr, goal - SMR_SEQ_MAX_ADVANCE);
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}
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counter_u64_add(advance, 1);
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return (goal);
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}
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/*
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* Deferred SMRs conditionally update s_wr_seq based on an
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* cpu local interval count.
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*/
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static smr_seq_t
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smr_deferred_advance(smr_t smr, smr_shared_t s, smr_t self)
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{
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if (++self->c_deferred < self->c_limit)
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return (smr_shared_current(s) + SMR_SEQ_INCR);
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self->c_deferred = 0;
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return (smr_default_advance(smr, s));
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}
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/*
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* Advance the write sequence and return the value for use as the
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* wait goal. This guarantees that any changes made by the calling
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* thread prior to this call will be visible to all threads after
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* rd_seq meets or exceeds the return value.
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*
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* This function may busy loop if the readers are roughly 1 billion
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* sequence numbers behind the writers.
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*
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* Lazy SMRs will not busy loop and the wrap happens every 25 days
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* at 1khz and 60 hours at 10khz. Readers can block for no longer
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* than half of this for SMR_SEQ_ macros to continue working.
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*/
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smr_seq_t
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smr_advance(smr_t smr)
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{
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smr_t self;
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smr_shared_t s;
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smr_seq_t goal;
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int flags;
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/*
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* It is illegal to enter while in an smr section.
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*/
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SMR_ASSERT_NOT_ENTERED(smr);
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/*
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* Modifications not done in a smr section need to be visible
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* before advancing the seq.
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*/
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atomic_thread_fence_rel();
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critical_enter();
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/* Try to touch the line once. */
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self = zpcpu_get(smr);
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s = self->c_shared;
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flags = self->c_flags;
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goal = SMR_SEQ_INVALID;
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if ((flags & (SMR_LAZY | SMR_DEFERRED)) == 0)
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goal = smr_default_advance(smr, s);
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else if ((flags & SMR_LAZY) != 0)
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goal = smr_lazy_advance(smr, s);
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else if ((flags & SMR_DEFERRED) != 0)
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goal = smr_deferred_advance(smr, s, self);
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critical_exit();
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return (goal);
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}
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/*
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* Poll to determine the currently observed sequence number on a cpu
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* and spinwait if the 'wait' argument is true.
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*/
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static smr_seq_t
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smr_poll_cpu(smr_t c, smr_seq_t s_rd_seq, smr_seq_t goal, bool wait)
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{
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smr_seq_t c_seq;
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c_seq = SMR_SEQ_INVALID;
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for (;;) {
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c_seq = atomic_load_int(&c->c_seq);
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if (c_seq == SMR_SEQ_INVALID)
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break;
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/*
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* There is a race described in smr.h:smr_enter that
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* can lead to a stale seq value but not stale data
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* access. If we find a value out of range here we
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* pin it to the current min to prevent it from
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* advancing until that stale section has expired.
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*
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* The race is created when a cpu loads the s_wr_seq
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* value in a local register and then another thread
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* advances s_wr_seq and calls smr_poll() which will
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* oberve no value yet in c_seq and advance s_rd_seq
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* up to s_wr_seq which is beyond the register
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* cached value. This is only likely to happen on
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* hypervisor or with a system management interrupt.
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*/
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if (SMR_SEQ_LT(c_seq, s_rd_seq))
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c_seq = s_rd_seq;
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/*
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* If the sequence number meets the goal we are done
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* with this cpu.
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*/
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if (SMR_SEQ_LEQ(goal, c_seq))
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break;
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if (!wait)
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break;
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cpu_spinwait();
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}
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return (c_seq);
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}
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/*
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* Loop until all cores have observed the goal sequence or have
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* gone inactive. Returns the oldest sequence currently active;
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*
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* This function assumes a snapshot of sequence values has
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* been obtained and validated by smr_poll().
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*/
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static smr_seq_t
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smr_poll_scan(smr_t smr, smr_shared_t s, smr_seq_t s_rd_seq,
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smr_seq_t s_wr_seq, smr_seq_t goal, bool wait)
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{
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smr_seq_t rd_seq, c_seq;
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int i;
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CRITICAL_ASSERT(curthread);
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counter_u64_add_protected(poll_scan, 1);
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/*
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* The read sequence can be no larger than the write sequence at
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* the start of the poll.
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*/
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rd_seq = s_wr_seq;
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CPU_FOREACH(i) {
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/*
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* Query the active sequence on this cpu. If we're not
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* waiting and we don't meet the goal we will still scan
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* the rest of the cpus to update s_rd_seq before returning
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* failure.
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*/
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c_seq = smr_poll_cpu(zpcpu_get_cpu(smr, i), s_rd_seq, goal,
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wait);
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/*
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* Limit the minimum observed rd_seq whether we met the goal
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* or not.
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*/
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if (c_seq != SMR_SEQ_INVALID)
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rd_seq = SMR_SEQ_MIN(rd_seq, c_seq);
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}
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/*
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* Advance the rd_seq as long as we observed a more recent value.
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*/
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s_rd_seq = atomic_load_int(&s->s_rd_seq);
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if (SMR_SEQ_GT(rd_seq, s_rd_seq)) {
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atomic_cmpset_int(&s->s_rd_seq, s_rd_seq, rd_seq);
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s_rd_seq = rd_seq;
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}
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return (s_rd_seq);
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}
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/*
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* Poll to determine whether all readers have observed the 'goal' write
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* sequence number.
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*
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* If wait is true this will spin until the goal is met.
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*
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* This routine will updated the minimum observed read sequence number in
|
|
* s_rd_seq if it does a scan. It may not do a scan if another call has
|
|
* advanced s_rd_seq beyond the callers goal already.
|
|
*
|
|
* Returns true if the goal is met and false if not.
|
|
*/
|
|
bool
|
|
smr_poll(smr_t smr, smr_seq_t goal, bool wait)
|
|
{
|
|
smr_shared_t s;
|
|
smr_t self;
|
|
smr_seq_t s_wr_seq, s_rd_seq;
|
|
smr_delta_t delta;
|
|
int flags;
|
|
bool success;
|
|
|
|
/*
|
|
* It is illegal to enter while in an smr section.
|
|
*/
|
|
KASSERT(!wait || !SMR_ENTERED(smr),
|
|
("smr_poll: Blocking not allowed in a SMR section."));
|
|
KASSERT(!wait || (zpcpu_get(smr)->c_flags & SMR_LAZY) == 0,
|
|
("smr_poll: Blocking not allowed on lazy smrs."));
|
|
|
|
/*
|
|
* Use a critical section so that we can avoid ABA races
|
|
* caused by long preemption sleeps.
|
|
*/
|
|
success = true;
|
|
critical_enter();
|
|
/* Attempt to load from self only once. */
|
|
self = zpcpu_get(smr);
|
|
s = self->c_shared;
|
|
flags = self->c_flags;
|
|
counter_u64_add_protected(poll, 1);
|
|
|
|
/*
|
|
* Conditionally advance the lazy write clock on any writer
|
|
* activity.
|
|
*/
|
|
if ((flags & SMR_LAZY) != 0)
|
|
smr_lazy_advance(smr, s);
|
|
|
|
/*
|
|
* Acquire barrier loads s_wr_seq after s_rd_seq so that we can not
|
|
* observe an updated read sequence that is larger than write.
|
|
*/
|
|
s_rd_seq = atomic_load_acq_int(&s->s_rd_seq);
|
|
|
|
/*
|
|
* If we have already observed the sequence number we can immediately
|
|
* return success. Most polls should meet this criterion.
|
|
*/
|
|
if (SMR_SEQ_LEQ(goal, s_rd_seq))
|
|
goto out;
|
|
|
|
/*
|
|
* wr_seq must be loaded prior to any c_seq value so that a
|
|
* stale c_seq can only reference time after this wr_seq.
|
|
*/
|
|
s_wr_seq = atomic_load_acq_int(&s->s_wr.seq);
|
|
|
|
/*
|
|
* This is the distance from s_wr_seq to goal. Positive values
|
|
* are in the future.
|
|
*/
|
|
delta = SMR_SEQ_DELTA(goal, s_wr_seq);
|
|
|
|
/*
|
|
* Detect a stale wr_seq.
|
|
*
|
|
* This goal may have come from a deferred advance or a lazy
|
|
* smr. If we are not blocking we can not succeed but the
|
|
* sequence number is valid.
|
|
*/
|
|
if (delta > 0 && delta <= SMR_SEQ_ADVANCE &&
|
|
(flags & (SMR_LAZY | SMR_DEFERRED)) != 0) {
|
|
if (!wait) {
|
|
success = false;
|
|
goto out;
|
|
}
|
|
/* LAZY is always !wait. */
|
|
s_wr_seq = smr_shared_advance(s);
|
|
delta = 0;
|
|
}
|
|
|
|
/*
|
|
* Detect an invalid goal.
|
|
*
|
|
* The goal must be in the range of s_wr_seq >= goal >= s_rd_seq for
|
|
* it to be valid. If it is not then the caller held on to it and
|
|
* the integer wrapped. If we wrapped back within range the caller
|
|
* will harmlessly scan.
|
|
*/
|
|
if (delta > 0)
|
|
goto out;
|
|
|
|
/* Determine the lowest visible sequence number. */
|
|
s_rd_seq = smr_poll_scan(smr, s, s_rd_seq, s_wr_seq, goal, wait);
|
|
success = SMR_SEQ_LEQ(goal, s_rd_seq);
|
|
out:
|
|
if (!success)
|
|
counter_u64_add_protected(poll_fail, 1);
|
|
critical_exit();
|
|
|
|
/*
|
|
* Serialize with smr_advance()/smr_exit(). The caller is now free
|
|
* to modify memory as expected.
|
|
*/
|
|
atomic_thread_fence_acq();
|
|
|
|
KASSERT(success || !wait, ("%s: blocking poll failed", __func__));
|
|
return (success);
|
|
}
|
|
|
|
smr_t
|
|
smr_create(const char *name, int limit, int flags)
|
|
{
|
|
smr_t smr, c;
|
|
smr_shared_t s;
|
|
int i;
|
|
|
|
s = uma_zalloc(smr_shared_zone, M_WAITOK);
|
|
smr = uma_zalloc_pcpu(smr_zone, M_WAITOK);
|
|
|
|
s->s_name = name;
|
|
s->s_rd_seq = s->s_wr.seq = SMR_SEQ_INIT;
|
|
s->s_wr.ticks = ticks;
|
|
|
|
/* Initialize all CPUS, not just those running. */
|
|
for (i = 0; i <= mp_maxid; i++) {
|
|
c = zpcpu_get_cpu(smr, i);
|
|
c->c_seq = SMR_SEQ_INVALID;
|
|
c->c_shared = s;
|
|
c->c_deferred = 0;
|
|
c->c_limit = limit;
|
|
c->c_flags = flags;
|
|
}
|
|
atomic_thread_fence_seq_cst();
|
|
|
|
return (smr);
|
|
}
|
|
|
|
void
|
|
smr_destroy(smr_t smr)
|
|
{
|
|
|
|
smr_synchronize(smr);
|
|
uma_zfree(smr_shared_zone, smr->c_shared);
|
|
uma_zfree_pcpu(smr_zone, smr);
|
|
}
|
|
|
|
/*
|
|
* Initialize the UMA slab zone.
|
|
*/
|
|
void
|
|
smr_init(void)
|
|
{
|
|
|
|
smr_shared_zone = uma_zcreate("SMR SHARED", sizeof(struct smr_shared),
|
|
NULL, NULL, NULL, NULL, (CACHE_LINE_SIZE * 2) - 1, 0);
|
|
smr_zone = uma_zcreate("SMR CPU", sizeof(struct smr),
|
|
NULL, NULL, NULL, NULL, (CACHE_LINE_SIZE * 2) - 1, UMA_ZONE_PCPU);
|
|
}
|