1ed3fed743
to gem_attach() as the former access softc members not yet initialized at that time and gem_reset() actually is enough to stop the chip. [1] o Revise the use of gem_bitwait(); add bus_barrier() calls before calling gem_bitwait() to ensure the respective bit has been written before we starting polling on it and poll for the right bits to change, f.e. even though we only reset RX we have to actually wait for both GEM_RESET_RX and GEM_RESET_TX to clear. Add some additional gem_bitwait() calls in places we've been missing them according to the GEM documentation. Along with this some excessive DELAYs, which probably only were added because of bugs in gem_bitwait() and its use in the first place, as well as as have of an gem_bitwait() reimplementation in gem_reset_tx() were removed. o Add gem_reset_rxdma() and use it to deal with GEM_MAC_RX_OVERFLOW errors more gracefully as unlike gem_init_locked() it resets the RX DMA engine only, causing no link loss and the FIFOs not to be cleared. Also use it deal with GEM_INTR_RX_TAG_ERR errors, with previously were unhandled. This was based on information obtained from the Linux GEM and OpenSolaris ERI drivers. o Turn on workarounds for silicon bugs in the Apple GMAC variants. This was based on information obtained from the Darwin GMAC and Linux GEM drivers. o Turn on "infinite" (i.e. maximum 31 * 64 bytes in length) DMA bursts. This greatly improves especially RX performance. o Optimize the RX path, this consists of: - kicking the receiver as soon as we've a spare descriptor in gem_rint() again instead of just once after all the ready ones have been handled; - kicking the receiver the right way, i.e. as outlined in the GEM documentation in batches of 4 and by pointing it to the descriptor after the last valid one; - calling gem_rint() before gem_tint() in gem_intr() as gem_tint() may take quite a while; - doubling the size of the RX ring to 256 descriptors. Overall the RX performance of a GEM in a 1GHz Sun Fire V210 was improved from ~100Mbit/s to ~850Mbit/s. o In gem_add_rxbuf() don't assign the newly allocated mbuf to rxs_mbuf before calling bus_dmamap_load_mbuf_sg(), if bus_dmamap_load_mbuf_sg() fails we'll free the newly allocated mbuf, unable to recycle the previous one but a NULL pointer dereference instead. o In gem_init_locked() honor the return value of gem_meminit(). o Simplify gem_ringsize() and dont' return garbage in the default case. Based on OpenBSD. o Don't turn on MAC control, MIF and PCS interrupts unless GEM_DEBUG is defined as we don't need/use these interrupts for operation. o In gem_start_locked() sync the DMA maps of the descriptor rings before every kick of the transmitter and not just once after enqueuing all packets as the NIC might instantly start transmitting after we kicked it the first time. o Keep state of the link state and use it to enable or disable the MAC in gem_mii_statchg() accordingly as well as to return early from gem_start_locked() in case the link is down. [3] o Initialize the maximum frame size to a sane value. o In gem_mii_statchg() enable carrier extension if appropriate. o Increment if_ierrors in case of an GEM_MAC_RX_OVERFLOW error and in gem_eint(). [3] o Handle IFF_ALLMULTI correctly; don't set it if we've turned promiscuous group mode on and don't clear the flag if we've disabled promiscuous group mode (these were mostly NOPs though). [2] o Let gem_eint() also report GEM_INTR_PERR errors. o Move setting sc_variant from gem_pci_probe() to gem_pci_attach() as device probe methods are not supposed to touch the softc. o Collapse sc_inited and sc_pci into bits for sc_flags. o Add CTASSERTs ensuring that GEM_NRXDESC and GEM_NTXDESC are set to legal values. o Correctly set up for 802.3x flow control, though #ifdef out the code that actually enables it as this needs more testing and mainly a proper framework to support it. o Correct and add some conversions from hard-coded functions names to __func__ which were borked or forgotten in if_gem.c rev. 1.42. o Use PCIR_BAR instead of a homegrown macro. o Replace sc_enaddr[6] with sc_enaddr[ETHER_ADDR_LEN]. o In gem_pci_attach() in case attaching fails release the resources in the opposite order they were allocated. o Make gem_reset() static to if_gem.c as it's not needed outside that module. o Remove the GEM_GIGABIT flag and the associated code; GEM_GIGABIT was never set and the associated code was in the wrong place. o Remove sc_mif_config; it was only used to cache the contents of the respective register within gem_attach(). o Remove the #ifdef'ed out NetBSD/OpenBSD code for establishing a suspend hook as it will never be used on FreeBSD. o Also probe Apple Intrepid 2 GMAC and Apple Shasta GMAC, add support for Apple K2 GMAC. Based on OpenBSD. o Add support for Sun GBE/P cards, or in other words actually add support for cards based on GEM to gem(4). This mainly consists of adding support for the TBI of these chips. Along with this the PHY selection code was rewritten to hardcode the PHY number for certain configurations as for example the PHY of the on-board ERI of Blade 1000 shows up twice causing no link as the second incarnation is isolated. These changes were ported from OpenBSD with some additional improvements and modulo some bugs. o Add code to if_gem_pci.c allowing to read the MAC-address from the VPD on systems without Open Firmware. This is an improved version of my variant of the respective code in if_hme_pci.c o Now that gem(4) is MI enable it for all archs. Pointed out by: yongari [1] Suggested by: rwatson [2], yongari [3] Tested on: i386 (GEM), powerpc (GMACs by marcel and yongari), sparc64 (ERI and GEM) Reviewed by: yongari Approved by: re (kensmith)
327 lines
9.5 KiB
C
327 lines
9.5 KiB
C
/*-
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* Copyright (C) 2001 Eduardo Horvath.
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* All rights reserved.
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*
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* from: NetBSD: if_gem_pci.c,v 1.7 2001/10/18 15:09:15 thorpej Exp
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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/*
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* PCI bindings for Apple GMAC, Sun ERI and Sun GEM Ethernet controllers
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <sys/lock.h>
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#include <sys/module.h>
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#include <sys/mutex.h>
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#include <sys/resource.h>
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#include <sys/rman.h>
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#include <sys/socket.h>
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#include <net/ethernet.h>
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#include <net/if.h>
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#include <machine/bus.h>
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#if defined(__powerpc__) || defined(__sparc64__)
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#include <dev/ofw/openfirm.h>
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#include <machine/ofw_machdep.h>
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#endif
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#include <machine/resource.h>
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#include <dev/gem/if_gemreg.h>
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#include <dev/gem/if_gemvar.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcivar.h>
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#include "miibus_if.h"
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static int gem_pci_probe(device_t);
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static int gem_pci_attach(device_t);
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static int gem_pci_detach(device_t);
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static int gem_pci_suspend(device_t);
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static int gem_pci_resume(device_t);
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static device_method_t gem_pci_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, gem_pci_probe),
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DEVMETHOD(device_attach, gem_pci_attach),
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DEVMETHOD(device_detach, gem_pci_detach),
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DEVMETHOD(device_suspend, gem_pci_suspend),
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DEVMETHOD(device_resume, gem_pci_resume),
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/* Use the suspend handler here, it is all that is required. */
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DEVMETHOD(device_shutdown, gem_pci_suspend),
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/* bus interface */
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DEVMETHOD(bus_print_child, bus_generic_print_child),
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DEVMETHOD(bus_driver_added, bus_generic_driver_added),
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/* MII interface */
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DEVMETHOD(miibus_readreg, gem_mii_readreg),
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DEVMETHOD(miibus_writereg, gem_mii_writereg),
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DEVMETHOD(miibus_statchg, gem_mii_statchg),
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{ 0, 0 }
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};
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static driver_t gem_pci_driver = {
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"gem",
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gem_pci_methods,
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sizeof(struct gem_softc)
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};
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DRIVER_MODULE(gem, pci, gem_pci_driver, gem_devclass, 0, 0);
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MODULE_DEPEND(gem, pci, 1, 1, 1);
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MODULE_DEPEND(gem, ether, 1, 1, 1);
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static const struct gem_pci_dev {
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uint32_t gpd_devid;
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int gpd_variant;
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const char *gpd_desc;
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} gem_pci_devlist[] = {
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{ 0x1101108e, GEM_SUN_ERI, "Sun ERI 10/100 Ethernet" },
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{ 0x2bad108e, GEM_SUN_GEM, "Sun GEM Gigabit Ethernet" },
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{ 0x0021106b, GEM_APPLE_GMAC, "Apple UniNorth GMAC Ethernet" },
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{ 0x0024106b, GEM_APPLE_GMAC, "Apple Pangea GMAC Ethernet" },
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{ 0x0032106b, GEM_APPLE_GMAC, "Apple UniNorth2 GMAC Ethernet" },
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{ 0x004c106b, GEM_APPLE_K2_GMAC,"Apple K2 GMAC Ethernet" },
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{ 0x0051106b, GEM_APPLE_GMAC, "Apple Shasta GMAC Ethernet" },
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{ 0x006b106b, GEM_APPLE_GMAC, "Apple Intrepid 2 GMAC Ethernet" },
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{ 0, 0, NULL }
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};
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static int
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gem_pci_probe(dev)
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device_t dev;
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{
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int i;
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for (i = 0; gem_pci_devlist[i].gpd_desc != NULL; i++) {
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if (pci_get_devid(dev) == gem_pci_devlist[i].gpd_devid) {
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device_set_desc(dev, gem_pci_devlist[i].gpd_desc);
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return (BUS_PROBE_DEFAULT);
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}
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}
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return (ENXIO);
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}
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static struct resource_spec gem_pci_res_spec[] = {
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{ SYS_RES_MEMORY, PCIR_BAR(0), RF_ACTIVE },
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{ SYS_RES_IRQ, 0, RF_SHAREABLE | RF_ACTIVE },
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{ -1, 0 }
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};
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static int
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gem_pci_attach(dev)
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device_t dev;
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{
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struct gem_softc *sc;
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int i;
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#if !(defined(__powerpc__) || defined(__sparc64__))
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int j;
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#endif
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sc = device_get_softc(dev);
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sc->sc_variant = GEM_UNKNOWN;
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for (i = 0; gem_pci_devlist[i].gpd_desc != NULL; i++) {
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if (pci_get_devid(dev) == gem_pci_devlist[i].gpd_devid) {
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sc->sc_variant = gem_pci_devlist[i].gpd_variant;
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break;
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}
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}
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if (sc->sc_variant == GEM_UNKNOWN) {
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device_printf(dev, "unknown adaptor\n");
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return (ENXIO);
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}
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pci_enable_busmaster(dev);
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/*
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* Some Sun GEMs/ERIs do have their intpin register bogusly set to 0,
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* although it should be 1. correct that.
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*/
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if (pci_get_intpin(dev) == 0)
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pci_set_intpin(dev, 1);
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sc->sc_dev = dev;
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sc->sc_flags |= GEM_PCI; /* XXX */
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if (bus_alloc_resources(dev, gem_pci_res_spec, sc->sc_res)) {
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device_printf(dev, "failed to allocate resources\n");
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bus_release_resources(dev, gem_pci_res_spec, sc->sc_res);
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return (ENXIO);
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}
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GEM_LOCK_INIT(sc, device_get_nameunit(dev));
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#if defined(__powerpc__) || defined(__sparc64__)
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OF_getetheraddr(dev, sc->sc_enaddr);
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#else
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/*
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* Dig out VPD (vital product data) and read NA (network address).
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* The VPD of GEM resides in the PCI Expansion ROM (PCI FCode) and
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* can't be accessed via the PCI capability pointer.
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* ``Writing FCode 3.x Programs'' (newer ones, dated 1997 and later)
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* chapter 2 describes the data structure.
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*/
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#define PCI_ROMHDR_SIZE 0x1c
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#define PCI_ROMHDR_SIG 0x00
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#define PCI_ROMHDR_SIG_MAGIC 0xaa55 /* little endian */
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#define PCI_ROMHDR_PTR_DATA 0x18
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#define PCI_ROM_SIZE 0x18
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#define PCI_ROM_SIG 0x00
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#define PCI_ROM_SIG_MAGIC 0x52494350 /* "PCIR", endian */
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/* reversed */
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#define PCI_ROM_VENDOR 0x04
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#define PCI_ROM_DEVICE 0x06
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#define PCI_ROM_PTR_VPD 0x08
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#define PCI_VPDRES_BYTE0 0x00
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#define PCI_VPDRES_ISLARGE(x) ((x) & 0x80)
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#define PCI_VPDRES_LARGE_NAME(x) ((x) & 0x7f)
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#define PCI_VPDRES_TYPE_VPD 0x10 /* large */
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#define PCI_VPDRES_LARGE_LEN_LSB 0x01
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#define PCI_VPDRES_LARGE_LEN_MSB 0x02
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#define PCI_VPDRES_LARGE_DATA 0x03
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#define PCI_VPD_SIZE 0x03
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#define PCI_VPD_KEY0 0x00
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#define PCI_VPD_KEY1 0x01
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#define PCI_VPD_LEN 0x02
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#define PCI_VPD_DATA 0x03
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#define GEM_ROM_READ_N(n, sc, offs) \
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bus_read_ ## n ((sc)->sc_res[0], GEM_PCI_ROM_OFFSET + (offs))
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#define GEM_ROM_READ_1(sc, offs) GEM_ROM_READ_N(1, (sc), (offs))
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#define GEM_ROM_READ_2(sc, offs) GEM_ROM_READ_N(2, (sc), (offs))
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#define GEM_ROM_READ_4(sc, offs) GEM_ROM_READ_N(4, (sc), (offs))
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/* Read PCI Expansion ROM header. */
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if (GEM_ROM_READ_2(sc, PCI_ROMHDR_SIG) != PCI_ROMHDR_SIG_MAGIC ||
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(i = GEM_ROM_READ_2(sc, PCI_ROMHDR_PTR_DATA)) < PCI_ROMHDR_SIZE) {
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device_printf(dev, "unexpected PCI Expansion ROM header\n");
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goto fail;
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}
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/* Read PCI Expansion ROM data. */
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if (GEM_ROM_READ_4(sc, i + PCI_ROM_SIG) != PCI_ROM_SIG_MAGIC ||
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GEM_ROM_READ_2(sc, i + PCI_ROM_VENDOR) != pci_get_vendor(dev) ||
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GEM_ROM_READ_2(sc, i + PCI_ROM_DEVICE) != pci_get_device(dev) ||
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(j = GEM_ROM_READ_2(sc, i + PCI_ROM_PTR_VPD)) < i + PCI_ROM_SIZE) {
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device_printf(dev, "unexpected PCI Expansion ROM data\n");
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goto fail;
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}
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/*
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* Read PCI VPD.
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* SUNW,pci-gem cards have a single large resource VPD-R tag
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* containing one NA. The VPD used is not in PCI 2.2 standard
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* format however. The length in the resource header is in big
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* endian and the end tag is non-standard (0x79) and followed
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* by an all-zero "checksum" byte. Sun calls this a "Fresh
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* Choice Ethernet" VPD...
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*/
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if (PCI_VPDRES_ISLARGE(GEM_ROM_READ_1(sc, j + PCI_VPDRES_BYTE0)) == 0 ||
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PCI_VPDRES_LARGE_NAME(GEM_ROM_READ_1(sc, j + PCI_VPDRES_BYTE0)) !=
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PCI_VPDRES_TYPE_VPD ||
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(GEM_ROM_READ_1(sc, j + PCI_VPDRES_LARGE_LEN_LSB) << 8 |
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GEM_ROM_READ_1(sc, j + PCI_VPDRES_LARGE_LEN_MSB)) !=
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PCI_VPD_SIZE + ETHER_ADDR_LEN ||
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GEM_ROM_READ_1(sc, j + PCI_VPDRES_LARGE_DATA + PCI_VPD_KEY0) !=
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0x4e /* N */ ||
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GEM_ROM_READ_1(sc, j + PCI_VPDRES_LARGE_DATA + PCI_VPD_KEY1) !=
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0x41 /* A */ ||
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GEM_ROM_READ_1(sc, j + PCI_VPDRES_LARGE_DATA + PCI_VPD_LEN) !=
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ETHER_ADDR_LEN ||
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GEM_ROM_READ_1(sc, j + PCI_VPDRES_LARGE_DATA + PCI_VPD_DATA +
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ETHER_ADDR_LEN) != 0x79) {
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device_printf(dev, "unexpected PCI VPD\n");
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goto fail;
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}
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bus_read_region_1(sc->sc_res[0], GEM_PCI_ROM_OFFSET + j +
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PCI_VPDRES_LARGE_DATA + PCI_VPD_DATA, sc->sc_enaddr,
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ETHER_ADDR_LEN);
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#endif
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/*
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* call the main configure
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*/
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if (gem_attach(sc) != 0) {
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device_printf(dev, "could not be configured\n");
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goto fail;
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}
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if (bus_setup_intr(dev, sc->sc_res[1], INTR_TYPE_NET | INTR_MPSAFE,
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NULL, gem_intr, sc, &sc->sc_ih) != 0) {
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device_printf(dev, "failed to set up interrupt\n");
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gem_detach(sc);
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goto fail;
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}
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return (0);
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fail:
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GEM_LOCK_DESTROY(sc);
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bus_release_resources(dev, gem_pci_res_spec, sc->sc_res);
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return (ENXIO);
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}
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static int
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gem_pci_detach(dev)
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device_t dev;
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{
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struct gem_softc *sc = device_get_softc(dev);
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bus_teardown_intr(dev, sc->sc_res[1], sc->sc_ih);
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gem_detach(sc);
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GEM_LOCK_DESTROY(sc);
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bus_release_resources(dev, gem_pci_res_spec, sc->sc_res);
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return (0);
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}
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static int
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gem_pci_suspend(dev)
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device_t dev;
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{
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struct gem_softc *sc = device_get_softc(dev);
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gem_suspend(sc);
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return (0);
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}
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static int
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gem_pci_resume(dev)
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device_t dev;
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{
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struct gem_softc *sc = device_get_softc(dev);
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gem_resume(sc);
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return (0);
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}
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