d76a1ef4e1
console, it calls the grab functions. These functions should turn off the RX interrupts, and any others that interfere. This makes mountroot prompt work again. If there's more generalized need other than prompting, many of these routines should be expanded to do those new things. Should have been part of r260889, but waasn't due to command line typo. Reviewed by: bde (with reservations)
451 lines
9.9 KiB
C
451 lines
9.9 KiB
C
/*-
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* Copyright (c) 2012 The FreeBSD Foundation
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* All rights reserved.
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*
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* This software was developed by Oleksandr Rybalko under sponsorship
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* from the FreeBSD Foundation.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include "opt_ddb.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/conf.h>
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#include <sys/kdb.h>
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#include <machine/bus.h>
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#include <machine/fdt.h>
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#include <dev/uart/uart.h>
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#include <dev/uart/uart_cpu.h>
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#include <dev/uart/uart_bus.h>
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#include <dev/uart/uart_dev_imx5xx.h>
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#include "uart_if.h"
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/*
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* Low-level UART interface.
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*/
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static int imx_uart_probe(struct uart_bas *bas);
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static void imx_uart_init(struct uart_bas *bas, int, int, int, int);
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static void imx_uart_term(struct uart_bas *bas);
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static void imx_uart_putc(struct uart_bas *bas, int);
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static int imx_uart_rxready(struct uart_bas *bas);
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static int imx_uart_getc(struct uart_bas *bas, struct mtx *);
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static struct uart_ops uart_imx_uart_ops = {
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.probe = imx_uart_probe,
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.init = imx_uart_init,
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.term = imx_uart_term,
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.putc = imx_uart_putc,
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.rxready = imx_uart_rxready,
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.getc = imx_uart_getc,
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};
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static int
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imx_uart_probe(struct uart_bas *bas)
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{
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return (0);
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}
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static void
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imx_uart_init(struct uart_bas *bas, int baudrate, int databits,
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int stopbits, int parity)
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{
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}
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static void
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imx_uart_term(struct uart_bas *bas)
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{
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}
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static void
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imx_uart_putc(struct uart_bas *bas, int c)
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{
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while (!(IS(bas, USR2, TXFE)))
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;
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SETREG(bas, REG(UTXD), c);
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}
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static int
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imx_uart_rxready(struct uart_bas *bas)
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{
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return ((IS(bas, USR2, RDR)) ? 1 : 0);
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}
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static int
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imx_uart_getc(struct uart_bas *bas, struct mtx *hwmtx)
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{
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int c;
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uart_lock(hwmtx);
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while (!(IS(bas, USR2, RDR)))
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;
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c = GETREG(bas, REG(URXD));
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uart_unlock(hwmtx);
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#if defined(KDB)
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if (c & FLD(URXD, BRK)) {
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if (kdb_break())
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return (0);
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}
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#endif
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return (c & 0xff);
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}
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/*
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* High-level UART interface.
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*/
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struct imx_uart_softc {
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struct uart_softc base;
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};
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static int imx_uart_bus_attach(struct uart_softc *);
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static int imx_uart_bus_detach(struct uart_softc *);
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static int imx_uart_bus_flush(struct uart_softc *, int);
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static int imx_uart_bus_getsig(struct uart_softc *);
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static int imx_uart_bus_ioctl(struct uart_softc *, int, intptr_t);
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static int imx_uart_bus_ipend(struct uart_softc *);
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static int imx_uart_bus_param(struct uart_softc *, int, int, int, int);
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static int imx_uart_bus_probe(struct uart_softc *);
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static int imx_uart_bus_receive(struct uart_softc *);
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static int imx_uart_bus_setsig(struct uart_softc *, int);
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static int imx_uart_bus_transmit(struct uart_softc *);
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static void imx_uart_bus_grab(struct uart_softc *);
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static void imx_uart_bus_ungrab(struct uart_softc *);
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static kobj_method_t imx_uart_methods[] = {
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KOBJMETHOD(uart_attach, imx_uart_bus_attach),
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KOBJMETHOD(uart_detach, imx_uart_bus_detach),
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KOBJMETHOD(uart_flush, imx_uart_bus_flush),
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KOBJMETHOD(uart_getsig, imx_uart_bus_getsig),
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KOBJMETHOD(uart_ioctl, imx_uart_bus_ioctl),
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KOBJMETHOD(uart_ipend, imx_uart_bus_ipend),
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KOBJMETHOD(uart_param, imx_uart_bus_param),
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KOBJMETHOD(uart_probe, imx_uart_bus_probe),
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KOBJMETHOD(uart_receive, imx_uart_bus_receive),
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KOBJMETHOD(uart_setsig, imx_uart_bus_setsig),
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KOBJMETHOD(uart_transmit, imx_uart_bus_transmit),
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KOBJMETHOD(uart_grab, imx_uart_bus_grab),
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KOBJMETHOD(uart_ungrab, imx_uart_bus_ungrab),
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{ 0, 0 }
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};
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struct uart_class uart_imx_class = {
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"imx",
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imx_uart_methods,
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sizeof(struct imx_uart_softc),
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.uc_ops = &uart_imx_uart_ops,
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.uc_range = 0x100,
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.uc_rclk = 24000000 /* TODO: get value from CCM */
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};
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#define SIGCHG(c, i, s, d) \
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if (c) { \
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i |= (i & s) ? s : s | d; \
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} else { \
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i = (i & s) ? (i & ~s) | d : i; \
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}
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static int
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imx_uart_bus_attach(struct uart_softc *sc)
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{
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struct uart_bas *bas;
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struct uart_devinfo *di;
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bas = &sc->sc_bas;
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if (sc->sc_sysdev != NULL) {
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di = sc->sc_sysdev;
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imx_uart_init(bas, di->baudrate, di->databits, di->stopbits,
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di->parity);
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} else {
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imx_uart_init(bas, 115200, 8, 1, 0);
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}
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(void)imx_uart_bus_getsig(sc);
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ENA(bas, UCR4, DREN);
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DIS(bas, UCR1, RRDYEN);
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DIS(bas, UCR1, IDEN);
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DIS(bas, UCR3, RXDSEN);
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DIS(bas, UCR2, ATEN);
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DIS(bas, UCR1, TXMPTYEN);
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DIS(bas, UCR1, TRDYEN);
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DIS(bas, UCR4, TCEN);
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DIS(bas, UCR4, OREN);
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ENA(bas, UCR4, BKEN);
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DIS(bas, UCR4, WKEN);
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DIS(bas, UCR1, ADEN);
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DIS(bas, UCR3, ACIEN);
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DIS(bas, UCR2, ESCI);
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DIS(bas, UCR4, ENIRI);
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DIS(bas, UCR3, AIRINTEN);
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DIS(bas, UCR3, AWAKEN);
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DIS(bas, UCR3, FRAERREN);
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DIS(bas, UCR3, PARERREN);
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DIS(bas, UCR1, RTSDEN);
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DIS(bas, UCR2, RTSEN);
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DIS(bas, UCR3, DTREN);
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DIS(bas, UCR3, RI);
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DIS(bas, UCR3, DCD);
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DIS(bas, UCR3, DTRDEN);
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/* ACK all interrupts */
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SETREG(bas, REG(USR1), 0xffff);
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SETREG(bas, REG(USR2), 0xffff);
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return (0);
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}
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static int
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imx_uart_bus_detach(struct uart_softc *sc)
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{
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SETREG(&sc->sc_bas, REG(UCR4), 0);
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return (0);
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}
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static int
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imx_uart_bus_flush(struct uart_softc *sc, int what)
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{
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/* TODO */
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return (0);
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}
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static int
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imx_uart_bus_getsig(struct uart_softc *sc)
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{
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uint32_t new, old, sig;
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uint8_t bes;
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do {
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old = sc->sc_hwsig;
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sig = old;
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uart_lock(sc->sc_hwmtx);
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bes = GETREG(&sc->sc_bas, REG(USR2));
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uart_unlock(sc->sc_hwmtx);
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/* XXX: chip can show delta */
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SIGCHG(bes & FLD(USR2, DCDIN), sig, SER_DCD, SER_DDCD);
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new = sig & ~SER_MASK_DELTA;
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} while (!atomic_cmpset_32(&sc->sc_hwsig, old, new));
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return (sig);
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}
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static int
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imx_uart_bus_ioctl(struct uart_softc *sc, int request, intptr_t data)
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{
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struct uart_bas *bas;
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int error;
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bas = &sc->sc_bas;
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error = 0;
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uart_lock(sc->sc_hwmtx);
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switch (request) {
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case UART_IOCTL_BREAK:
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/* TODO */
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break;
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case UART_IOCTL_BAUD:
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/* TODO */
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*(int*)data = 115200;
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break;
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default:
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error = EINVAL;
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break;
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}
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uart_unlock(sc->sc_hwmtx);
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return (error);
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}
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static int
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imx_uart_bus_ipend(struct uart_softc *sc)
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{
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struct uart_bas *bas;
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int ipend;
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uint32_t usr1, usr2;
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uint32_t ucr1, ucr4;
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bas = &sc->sc_bas;
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ipend = 0;
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uart_lock(sc->sc_hwmtx);
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/* Read pending interrupts */
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usr1 = GETREG(bas, REG(USR1));
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usr2 = GETREG(bas, REG(USR2));
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/* ACK interrupts */
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SETREG(bas, REG(USR1), usr1);
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SETREG(bas, REG(USR2), usr2);
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ucr1 = GETREG(bas, REG(UCR1));
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ucr4 = GETREG(bas, REG(UCR4));
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if ((usr2 & FLD(USR2, TXFE)) && (ucr1 & FLD(UCR1, TXMPTYEN))) {
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DIS(bas, UCR1, TXMPTYEN);
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/* Continue TXing */
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ipend |= SER_INT_TXIDLE;
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}
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if ((usr2 & FLD(USR2, RDR)) && (ucr4 & FLD(UCR4, DREN))) {
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DIS(bas, UCR4, DREN);
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/* Wow, new char on input */
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ipend |= SER_INT_RXREADY;
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}
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if ((usr2 & FLD(USR2, BRCD)) && (ucr4 & FLD(UCR4, BKEN)))
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ipend |= SER_INT_BREAK;
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uart_unlock(sc->sc_hwmtx);
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return (ipend);
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}
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static int
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imx_uart_bus_param(struct uart_softc *sc, int baudrate, int databits,
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int stopbits, int parity)
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{
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uart_lock(sc->sc_hwmtx);
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imx_uart_init(&sc->sc_bas, baudrate, databits, stopbits, parity);
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uart_unlock(sc->sc_hwmtx);
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return (0);
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}
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static int
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imx_uart_bus_probe(struct uart_softc *sc)
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{
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int error;
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error = imx_uart_probe(&sc->sc_bas);
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if (error)
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return (error);
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sc->sc_rxfifosz = 1;
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sc->sc_txfifosz = 1;
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device_set_desc(sc->sc_dev, "imx_uart");
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return (0);
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}
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static int
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imx_uart_bus_receive(struct uart_softc *sc)
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{
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struct uart_bas *bas;
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int xc, out;
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bas = &sc->sc_bas;
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uart_lock(sc->sc_hwmtx);
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/* Read while we have anything in FIFO */
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while (IS(bas, USR2, RDR)) {
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if (uart_rx_full(sc)) {
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/* No space left in input buffer */
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sc->sc_rxbuf[sc->sc_rxput] = UART_STAT_OVERRUN;
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break;
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}
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out = 0;
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xc = GETREG(bas, REG(URXD));
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/* We have valid char */
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if (xc & FLD(URXD, CHARRDY))
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out = xc & 0x000000ff;
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if (xc & FLD(URXD, FRMERR))
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out |= UART_STAT_FRAMERR;
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if (xc & FLD(URXD, PRERR))
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out |= UART_STAT_PARERR;
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if (xc & FLD(URXD, OVRRUN))
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out |= UART_STAT_OVERRUN;
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if (xc & FLD(URXD, BRK))
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out |= UART_STAT_BREAK;
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uart_rx_put(sc, out);
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}
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/* Reenable Data Ready interrupt */
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ENA(bas, UCR4, DREN);
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uart_unlock(sc->sc_hwmtx);
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return (0);
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}
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static int
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imx_uart_bus_setsig(struct uart_softc *sc, int sig)
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{
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return (0);
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}
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static int
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imx_uart_bus_transmit(struct uart_softc *sc)
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{
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struct uart_bas *bas = &sc->sc_bas;
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int i;
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bas = &sc->sc_bas;
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uart_lock(sc->sc_hwmtx);
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/* Fill TX FIFO */
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for (i = 0; i < sc->sc_txdatasz; i++) {
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SETREG(bas, REG(UTXD), sc->sc_txbuf[i] & 0xff);
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}
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sc->sc_txbusy = 1;
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/* Call me when ready */
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ENA(bas, UCR1, TXMPTYEN);
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uart_unlock(sc->sc_hwmtx);
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return (0);
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}
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static void
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imx_uart_bus_grab(struct uart_softc *sc)
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{
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struct uart_bas *bas = &sc->sc_bas;
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bas = &sc->sc_bas;
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uart_lock(sc->sc_hwmtx);
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DIS(bas, UCR4, DREN);
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uart_unlock(sc->sc_hwmtx);
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}
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static void
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imx_uart_bus_ungrab(struct uart_softc *sc)
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{
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struct uart_bas *bas = &sc->sc_bas;
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bas = &sc->sc_bas;
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uart_lock(sc->sc_hwmtx);
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ENA(bas, UCR4, DREN);
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uart_unlock(sc->sc_hwmtx);
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}
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