af3dc4a7ca
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339 lines
7.8 KiB
C
339 lines
7.8 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
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*
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* Copyright (c) 2014 Ruslan Bukin <br@bsdpad.com>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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/*
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* Vybrid Family Enhanced Direct Memory Access Controller (eDMA)
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* Chapter 21, Vybrid Reference Manual, Rev. 5, 07/2013
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/malloc.h>
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#include <sys/rman.h>
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#include <sys/timeet.h>
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#include <sys/timetc.h>
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#include <sys/watchdog.h>
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#include <dev/ofw/openfirm.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include <machine/bus.h>
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#include <machine/cpu.h>
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#include <machine/intr.h>
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#include <arm/freescale/vybrid/vf_edma.h>
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#include <arm/freescale/vybrid/vf_dmamux.h>
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#include <arm/freescale/vybrid/vf_common.h>
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struct edma_channel {
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uint32_t enabled;
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uint32_t mux_num;
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uint32_t mux_src;
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uint32_t mux_chn;
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uint32_t (*ih) (void *, int);
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void *ih_user;
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};
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static struct edma_channel edma_map[EDMA_NUM_CHANNELS];
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static struct resource_spec edma_spec[] = {
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{ SYS_RES_MEMORY, 0, RF_ACTIVE },
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{ SYS_RES_MEMORY, 1, RF_ACTIVE }, /* TCD */
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{ SYS_RES_IRQ, 0, RF_ACTIVE }, /* Transfer complete */
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{ SYS_RES_IRQ, 1, RF_ACTIVE }, /* Error Interrupt */
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{ -1, 0 }
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};
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static int
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edma_probe(device_t dev)
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{
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if (!ofw_bus_status_okay(dev))
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return (ENXIO);
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if (!ofw_bus_is_compatible(dev, "fsl,mvf600-edma"))
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return (ENXIO);
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device_set_desc(dev, "Vybrid Family eDMA Controller");
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return (BUS_PROBE_DEFAULT);
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}
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static void
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edma_transfer_complete_intr(void *arg)
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{
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struct edma_channel *ch;
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struct edma_softc *sc;
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int interrupts;
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int i;
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sc = arg;
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interrupts = READ4(sc, DMA_INT);
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WRITE1(sc, DMA_CINT, CINT_CAIR);
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for (i = 0; i < EDMA_NUM_CHANNELS; i++) {
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if (interrupts & (0x1 << i)) {
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ch = &edma_map[i];
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if (ch->enabled == 1) {
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if (ch->ih != NULL) {
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ch->ih(ch->ih_user, i);
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}
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}
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}
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}
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}
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static void
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edma_err_intr(void *arg)
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{
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struct edma_softc *sc;
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int reg;
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sc = arg;
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reg = READ4(sc, DMA_ERR);
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#if 0
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device_printf(sc->dev, "DMA_ERR 0x%08x, ES 0x%08x\n",
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reg, READ4(sc, DMA_ES));
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#endif
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WRITE1(sc, DMA_CERR, CERR_CAEI);
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}
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static int
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channel_free(struct edma_softc *sc, int chnum)
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{
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struct edma_channel *ch;
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ch = &edma_map[chnum];
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ch->enabled = 0;
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dmamux_configure(ch->mux_num, ch->mux_src, ch->mux_chn, 0);
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return (0);
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}
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static int
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channel_configure(struct edma_softc *sc, int mux_grp, int mux_src)
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{
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struct edma_channel *ch;
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int channel_first;
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int mux_num;
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int chnum;
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int i;
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if ((sc->device_id == 0 && mux_grp == 1) || \
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(sc->device_id == 1 && mux_grp == 0)) {
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channel_first = NCHAN_PER_MUX;
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mux_num = (sc->device_id * 2) + 1;
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} else {
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channel_first = 0;
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mux_num = sc->device_id * 2;
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}
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/* Take first unused eDMA channel */
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ch = NULL;
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for (i = channel_first; i < (channel_first + NCHAN_PER_MUX); i++) {
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ch = &edma_map[i];
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if (ch->enabled == 0) {
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break;
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}
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ch = NULL;
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}
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if (ch == NULL) {
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/* Can't find free channel */
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return (-1);
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}
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chnum = i;
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ch->enabled = 1;
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ch->mux_num = mux_num;
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ch->mux_src = mux_src;
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ch->mux_chn = (chnum - channel_first); /* 0 to 15 */
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dmamux_configure(ch->mux_num, ch->mux_src, ch->mux_chn, 1);
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return (chnum);
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}
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static int
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dma_stop(struct edma_softc *sc, int chnum)
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{
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int reg;
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reg = READ4(sc, DMA_ERQ);
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reg &= ~(0x1 << chnum);
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WRITE4(sc, DMA_ERQ, reg);
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return (0);
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}
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static int
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dma_setup(struct edma_softc *sc, struct tcd_conf *tcd)
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{
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struct edma_channel *ch;
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int chnum;
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int reg;
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chnum = tcd->channel;
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ch = &edma_map[chnum];
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ch->ih = tcd->ih;
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ch->ih_user = tcd->ih_user;
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TCD_WRITE4(sc, DMA_TCDn_SADDR(chnum), tcd->saddr);
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TCD_WRITE4(sc, DMA_TCDn_DADDR(chnum), tcd->daddr);
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reg = (tcd->smod << TCD_ATTR_SMOD_SHIFT);
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reg |= (tcd->dmod << TCD_ATTR_DMOD_SHIFT);
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reg |= (tcd->ssize << TCD_ATTR_SSIZE_SHIFT);
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reg |= (tcd->dsize << TCD_ATTR_DSIZE_SHIFT);
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TCD_WRITE2(sc, DMA_TCDn_ATTR(chnum), reg);
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TCD_WRITE2(sc, DMA_TCDn_SOFF(chnum), tcd->soff);
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TCD_WRITE2(sc, DMA_TCDn_DOFF(chnum), tcd->doff);
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TCD_WRITE4(sc, DMA_TCDn_SLAST(chnum), tcd->slast);
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TCD_WRITE4(sc, DMA_TCDn_DLASTSGA(chnum), tcd->dlast_sga);
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TCD_WRITE4(sc, DMA_TCDn_NBYTES_MLOFFYES(chnum), tcd->nbytes);
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reg = tcd->nmajor; /* Current Major Iteration Count */
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TCD_WRITE2(sc, DMA_TCDn_CITER_ELINKNO(chnum), reg);
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TCD_WRITE2(sc, DMA_TCDn_BITER_ELINKNO(chnum), reg);
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reg = (TCD_CSR_INTMAJOR);
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if(tcd->majorelink == 1) {
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reg |= TCD_CSR_MAJORELINK;
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reg |= (tcd->majorelinkch << TCD_CSR_MAJORELINKCH_SHIFT);
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}
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TCD_WRITE2(sc, DMA_TCDn_CSR(chnum), reg);
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/* Enable requests */
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reg = READ4(sc, DMA_ERQ);
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reg |= (0x1 << chnum);
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WRITE4(sc, DMA_ERQ, reg);
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/* Enable error interrupts */
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reg = READ4(sc, DMA_EEI);
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reg |= (0x1 << chnum);
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WRITE4(sc, DMA_EEI, reg);
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return (0);
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}
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static int
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dma_request(struct edma_softc *sc, int chnum)
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{
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int reg;
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/* Start */
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reg = TCD_READ2(sc, DMA_TCDn_CSR(chnum));
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reg |= TCD_CSR_START;
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TCD_WRITE2(sc, DMA_TCDn_CSR(chnum), reg);
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return (0);
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}
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static int
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edma_attach(device_t dev)
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{
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struct edma_softc *sc;
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phandle_t node;
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int dts_value;
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int len;
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sc = device_get_softc(dev);
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sc->dev = dev;
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if ((node = ofw_bus_get_node(sc->dev)) == -1)
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return (ENXIO);
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if ((len = OF_getproplen(node, "device-id")) <= 0)
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return (ENXIO);
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OF_getencprop(node, "device-id", &dts_value, len);
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sc->device_id = dts_value;
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sc->dma_stop = dma_stop;
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sc->dma_setup = dma_setup;
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sc->dma_request = dma_request;
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sc->channel_configure = channel_configure;
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sc->channel_free = channel_free;
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if (bus_alloc_resources(dev, edma_spec, sc->res)) {
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device_printf(dev, "could not allocate resources\n");
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return (ENXIO);
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}
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/* Memory interface */
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sc->bst = rman_get_bustag(sc->res[0]);
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sc->bsh = rman_get_bushandle(sc->res[0]);
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sc->bst_tcd = rman_get_bustag(sc->res[1]);
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sc->bsh_tcd = rman_get_bushandle(sc->res[1]);
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/* Setup interrupt handlers */
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if (bus_setup_intr(dev, sc->res[2], INTR_TYPE_BIO | INTR_MPSAFE,
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NULL, edma_transfer_complete_intr, sc, &sc->tc_ih)) {
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device_printf(dev, "Unable to alloc DMA intr resource.\n");
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return (ENXIO);
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}
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if (bus_setup_intr(dev, sc->res[3], INTR_TYPE_BIO | INTR_MPSAFE,
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NULL, edma_err_intr, sc, &sc->err_ih)) {
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device_printf(dev, "Unable to alloc DMA Err intr resource.\n");
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return (ENXIO);
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}
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return (0);
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}
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static device_method_t edma_methods[] = {
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DEVMETHOD(device_probe, edma_probe),
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DEVMETHOD(device_attach, edma_attach),
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{ 0, 0 }
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};
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static driver_t edma_driver = {
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"edma",
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edma_methods,
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sizeof(struct edma_softc),
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};
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static devclass_t edma_devclass;
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DRIVER_MODULE(edma, simplebus, edma_driver, edma_devclass, 0, 0);
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