Re-implement clocks for these SoC by using now standard extres/clk framework. This is necessary for future expansion of these. The new implementation is (due to the size of the patch) only the initial (minimum) version. It will be updated/expanded with a subsequent set of particular patches. This patch is also not tested on OMAP4 based boards (BeagleBone), so all possible issues should be (and will be) fixed by ASAP once identified. Submited by: Oskar Holmlund (oskar.holmlund@ohdata.se) Differential Revision: https://reviews.freebsd.org/D25118
622 lines
17 KiB
C
622 lines
17 KiB
C
/*-
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* Copyright (c) 2015 Ian lepore <ian@freebsd.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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/*
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* AM335x PPS driver using DMTimer capture.
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*
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* Note that this PPS driver does not use an interrupt. Instead it uses the
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* hardware's ability to latch the timer's count register in response to a
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* signal on an IO pin. Each of timers 4-7 have an associated pin, and this
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* code allows any one of those to be used.
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*
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* The timecounter routines in kern_tc.c call the pps poll routine periodically
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* to see if a new counter value has been latched. When a new value has been
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* latched, the only processing done in the poll routine is to capture the
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* current set of timecounter timehands (done with pps_capture()) and the
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* latched value from the timer. The remaining work (done by pps_event() while
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* holding a mutex) is scheduled to be done later in a non-interrupt context.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include "opt_platform.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/conf.h>
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#include <sys/kernel.h>
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#include <sys/lock.h>
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#include <sys/module.h>
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#include <sys/malloc.h>
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#include <sys/mutex.h>
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#include <sys/rman.h>
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#include <sys/timepps.h>
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#include <sys/timetc.h>
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#include <machine/bus.h>
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#include <dev/ofw/openfirm.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include <dev/extres/clk/clk.h>
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#include <arm/ti/ti_sysc.h>
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#include <arm/ti/ti_pinmux.h>
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#include <arm/ti/am335x/am335x_scm_padconf.h>
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#include "am335x_dmtreg.h"
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#define PPS_CDEV_NAME "dmtpps"
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struct dmtpps_softc {
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device_t dev;
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int mem_rid;
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struct resource * mem_res;
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int tmr_num; /* N from hwmod str "timerN" */
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char tmr_name[12]; /* "DMTimerN" */
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uint32_t tclr; /* Cached TCLR register. */
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struct timecounter tc;
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int pps_curmode; /* Edge mode now set in hw. */
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struct cdev * pps_cdev;
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struct pps_state pps_state;
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struct mtx pps_mtx;
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clk_t clk_fck;
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uint64_t sysclk_freq;
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};
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static int dmtpps_tmr_num; /* Set by probe() */
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/* List of compatible strings for FDT tree */
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static struct ofw_compat_data compat_data[] = {
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{"ti,am335x-timer", 1},
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{"ti,am335x-timer-1ms", 1},
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{NULL, 0},
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};
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SIMPLEBUS_PNP_INFO(compat_data);
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/*
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* A table relating pad names to the hardware timer number they can be mux'd to.
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*/
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struct padinfo {
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char * ballname;
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int tmr_num;
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};
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static struct padinfo dmtpps_padinfo[] = {
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{"GPMC_ADVn_ALE", 4},
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{"I2C0_SDA", 4},
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{"MII1_TX_EN", 4},
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{"XDMA_EVENT_INTR0", 4},
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{"GPMC_BEn0_CLE", 5},
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{"MDC", 5},
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{"MMC0_DAT3", 5},
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{"UART1_RTSn", 5},
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{"GPMC_WEn", 6},
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{"MDIO", 6},
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{"MMC0_DAT2", 6},
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{"UART1_CTSn", 6},
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{"GPMC_OEn_REn", 7},
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{"I2C0_SCL", 7},
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{"UART0_CTSn", 7},
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{"XDMA_EVENT_INTR1", 7},
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{NULL, 0}
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};
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/*
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* This is either brilliantly user-friendly, or utterly lame...
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*
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* The am335x chip is used on the popular Beaglebone boards. Those boards have
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* pins for all four capture-capable timers available on the P8 header. Allow
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* users to configure the input pin by giving the name of the header pin.
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*/
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struct nicknames {
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const char * nick;
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const char * name;
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};
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static struct nicknames dmtpps_pin_nicks[] = {
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{"P8-7", "GPMC_ADVn_ALE"},
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{"P8-9", "GPMC_BEn0_CLE"},
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{"P8-10", "GPMC_WEn"},
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{"P8-8", "GPMC_OEn_REn",},
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{NULL, NULL}
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};
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#define DMTIMER_READ4(sc, reg) bus_read_4((sc)->mem_res, (reg))
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#define DMTIMER_WRITE4(sc, reg, val) bus_write_4((sc)->mem_res, (reg), (val))
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/*
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* Translate a short friendly case-insensitive name to its canonical name.
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*/
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static const char *
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dmtpps_translate_nickname(const char *nick)
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{
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struct nicknames *nn;
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for (nn = dmtpps_pin_nicks; nn->nick != NULL; nn++)
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if (strcasecmp(nick, nn->nick) == 0)
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return nn->name;
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return (nick);
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}
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/*
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* See if our tunable is set to the name of the input pin. If not, that's NOT
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* an error, return 0. If so, try to configure that pin as a timer capture
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* input pin, and if that works, then we have our timer unit number and if it
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* fails that IS an error, return -1.
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*/
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static int
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dmtpps_find_tmr_num_by_tunable(void)
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{
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struct padinfo *pi;
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char iname[20];
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char muxmode[12];
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const char * ballname;
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int err;
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if (!TUNABLE_STR_FETCH("hw.am335x_dmtpps.input", iname, sizeof(iname)))
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return (0);
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ballname = dmtpps_translate_nickname(iname);
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for (pi = dmtpps_padinfo; pi->ballname != NULL; pi++) {
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if (strcmp(ballname, pi->ballname) != 0)
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continue;
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snprintf(muxmode, sizeof(muxmode), "timer%d", pi->tmr_num);
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err = ti_pinmux_padconf_set(pi->ballname, muxmode,
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PADCONF_INPUT);
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if (err != 0) {
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printf("am335x_dmtpps: unable to configure capture pin "
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"for %s to input mode\n", muxmode);
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return (-1);
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} else if (bootverbose) {
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printf("am335x_dmtpps: configured pin %s as input "
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"for %s\n", iname, muxmode);
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}
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return (pi->tmr_num);
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}
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/* Invalid name in the tunable, that's an error. */
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printf("am335x_dmtpps: unknown pin name '%s'\n", iname);
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return (-1);
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}
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/*
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* Ask the pinmux driver whether any pin has been configured as a TIMER4..TIMER7
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* input pin. If so, return the timer number, if not return 0.
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*/
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static int
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dmtpps_find_tmr_num_by_padconf(void)
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{
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int err;
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unsigned int padstate;
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const char * padmux;
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struct padinfo *pi;
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char muxmode[12];
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for (pi = dmtpps_padinfo; pi->ballname != NULL; pi++) {
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err = ti_pinmux_padconf_get(pi->ballname, &padmux, &padstate);
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snprintf(muxmode, sizeof(muxmode), "timer%d", pi->tmr_num);
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if (err == 0 && (padstate & RXACTIVE) != 0 &&
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strcmp(muxmode, padmux) == 0)
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return (pi->tmr_num);
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}
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/* Nothing found, not an error. */
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return (0);
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}
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/*
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* Figure out which hardware timer number to use based on input pin
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* configuration. This is done just once, the first time probe() runs.
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*/
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static int
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dmtpps_find_tmr_num(void)
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{
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int tmr_num;
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if ((tmr_num = dmtpps_find_tmr_num_by_tunable()) == 0)
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tmr_num = dmtpps_find_tmr_num_by_padconf();
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if (tmr_num <= 0) {
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printf("am335x_dmtpps: PPS driver not enabled: unable to find "
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"or configure a capture input pin\n");
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tmr_num = -1; /* Must return non-zero to prevent re-probing. */
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}
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return (tmr_num);
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}
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static void
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dmtpps_set_hw_capture(struct dmtpps_softc *sc, bool force_off)
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{
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int newmode;
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if (force_off)
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newmode = 0;
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else
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newmode = sc->pps_state.ppsparam.mode & PPS_CAPTUREASSERT;
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if (newmode == sc->pps_curmode)
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return;
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sc->pps_curmode = newmode;
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if (newmode == PPS_CAPTUREASSERT)
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sc->tclr |= DMT_TCLR_CAPTRAN_LOHI;
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else
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sc->tclr &= ~DMT_TCLR_CAPTRAN_MASK;
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DMTIMER_WRITE4(sc, DMT_TCLR, sc->tclr);
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}
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static unsigned
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dmtpps_get_timecount(struct timecounter *tc)
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{
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struct dmtpps_softc *sc;
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sc = tc->tc_priv;
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return (DMTIMER_READ4(sc, DMT_TCRR));
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}
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static void
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dmtpps_poll(struct timecounter *tc)
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{
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struct dmtpps_softc *sc;
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sc = tc->tc_priv;
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/*
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* If a new value has been latched we've got a PPS event. Capture the
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* timecounter data, then override the capcount field (pps_capture()
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* populates it from the current DMT_TCRR register) with the latched
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* value from the TCAR1 register.
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*
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* Note that we don't have the TCAR interrupt enabled, but the hardware
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* still provides the status bits in the "RAW" status register even when
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* they're masked from generating an irq. However, when clearing the
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* TCAR status to re-arm the capture for the next second, we have to
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* write to the IRQ status register, not the RAW register. Quirky.
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*
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* We do not need to hold a lock while capturing the pps data, because
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* it is captured into an area of the pps_state struct which is read
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* only by pps_event(). We do need to hold a lock while calling
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* pps_event(), because it manipulates data which is also accessed from
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* the ioctl(2) context by userland processes.
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*/
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if (DMTIMER_READ4(sc, DMT_IRQSTATUS_RAW) & DMT_IRQ_TCAR) {
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pps_capture(&sc->pps_state);
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sc->pps_state.capcount = DMTIMER_READ4(sc, DMT_TCAR1);
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DMTIMER_WRITE4(sc, DMT_IRQSTATUS, DMT_IRQ_TCAR);
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mtx_lock_spin(&sc->pps_mtx);
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pps_event(&sc->pps_state, PPS_CAPTUREASSERT);
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mtx_unlock_spin(&sc->pps_mtx);
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}
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}
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static int
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dmtpps_open(struct cdev *dev, int flags, int fmt,
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struct thread *td)
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{
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struct dmtpps_softc *sc;
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sc = dev->si_drv1;
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/*
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* Begin polling for pps and enable capture in the hardware whenever the
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* device is open. Doing this stuff again is harmless if this isn't the
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* first open.
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*/
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sc->tc.tc_poll_pps = dmtpps_poll;
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dmtpps_set_hw_capture(sc, false);
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return 0;
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}
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static int
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dmtpps_close(struct cdev *dev, int flags, int fmt,
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struct thread *td)
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{
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struct dmtpps_softc *sc;
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sc = dev->si_drv1;
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/*
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* Stop polling and disable capture on last close. Use the force-off
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* flag to override the configured mode and turn off the hardware.
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*/
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sc->tc.tc_poll_pps = NULL;
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dmtpps_set_hw_capture(sc, true);
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return 0;
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}
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static int
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dmtpps_ioctl(struct cdev *dev, u_long cmd, caddr_t data,
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int flags, struct thread *td)
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{
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struct dmtpps_softc *sc;
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int err;
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sc = dev->si_drv1;
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/* Let the kernel do the heavy lifting for ioctl. */
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mtx_lock_spin(&sc->pps_mtx);
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err = pps_ioctl(cmd, data, &sc->pps_state);
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mtx_unlock_spin(&sc->pps_mtx);
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if (err != 0)
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return (err);
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/*
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* The capture mode could have changed, set the hardware to whatever
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* mode is now current. Effectively a no-op if nothing changed.
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*/
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dmtpps_set_hw_capture(sc, false);
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return (err);
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}
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static struct cdevsw dmtpps_cdevsw = {
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.d_version = D_VERSION,
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.d_open = dmtpps_open,
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.d_close = dmtpps_close,
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.d_ioctl = dmtpps_ioctl,
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.d_name = PPS_CDEV_NAME,
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};
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static int
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dmtpps_probe(device_t dev)
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{
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char strbuf[64];
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int tmr_num;
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uint64_t rev_address;
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if (!ofw_bus_status_okay(dev))
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return (ENXIO);
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if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
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return (ENXIO);
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/*
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* If we haven't chosen which hardware timer to use yet, go do that now.
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* We need to know that to decide whether to return success for this
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* hardware timer instance or not.
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*/
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if (dmtpps_tmr_num == 0)
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dmtpps_tmr_num = dmtpps_find_tmr_num();
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/*
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* Figure out which hardware timer is being probed and see if it matches
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* the configured timer number determined earlier.
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*/
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rev_address = ti_sysc_get_rev_address(device_get_parent(dev));
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switch (rev_address) {
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case DMTIMER1_1MS_REV:
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tmr_num = 1;
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break;
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case DMTIMER2_REV:
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tmr_num = 2;
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break;
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case DMTIMER3_REV:
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tmr_num = 3;
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break;
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case DMTIMER4_REV:
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tmr_num = 4;
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break;
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case DMTIMER5_REV:
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tmr_num = 5;
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break;
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case DMTIMER6_REV:
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tmr_num = 6;
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break;
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case DMTIMER7_REV:
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tmr_num = 7;
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break;
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default:
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return (ENXIO);
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}
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if (dmtpps_tmr_num != tmr_num)
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return (ENXIO);
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snprintf(strbuf, sizeof(strbuf), "AM335x PPS-Capture DMTimer%d",
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tmr_num);
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device_set_desc_copy(dev, strbuf);
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return(BUS_PROBE_DEFAULT);
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}
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static int
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dmtpps_attach(device_t dev)
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{
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struct dmtpps_softc *sc;
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struct make_dev_args mda;
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int err;
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clk_t sys_clkin;
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uint64_t rev_address;
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sc = device_get_softc(dev);
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sc->dev = dev;
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/* Figure out which hardware timer this is and set the name string. */
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rev_address = ti_sysc_get_rev_address(device_get_parent(dev));
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switch (rev_address) {
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case DMTIMER1_1MS_REV:
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sc->tmr_num = 1;
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break;
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case DMTIMER2_REV:
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sc->tmr_num = 2;
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break;
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case DMTIMER3_REV:
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sc->tmr_num = 3;
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break;
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case DMTIMER4_REV:
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sc->tmr_num = 4;
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break;
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case DMTIMER5_REV:
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sc->tmr_num = 5;
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break;
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case DMTIMER6_REV:
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sc->tmr_num = 6;
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break;
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case DMTIMER7_REV:
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sc->tmr_num = 7;
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break;
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}
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snprintf(sc->tmr_name, sizeof(sc->tmr_name), "DMTimer%d", sc->tmr_num);
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/* expect one clock */
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err = clk_get_by_ofw_index(dev, 0, 0, &sc->clk_fck);
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if (err != 0) {
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device_printf(dev, "Cant find clock index 0. err: %d\n", err);
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return (ENXIO);
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}
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err = clk_get_by_name(dev, "sys_clkin_ck@40", &sys_clkin);
|
|
if (err != 0) {
|
|
device_printf(dev, "Cant find sys_clkin_ck@40 err: %d\n", err);
|
|
return (ENXIO);
|
|
}
|
|
|
|
/* Select M_OSC as DPLL parent */
|
|
err = clk_set_parent_by_clk(sc->clk_fck, sys_clkin);
|
|
if (err != 0) {
|
|
device_printf(dev, "Cant set mux to CLK_M_OSC\n");
|
|
return (ENXIO);
|
|
}
|
|
|
|
/* Enable clocks and power on the device. */
|
|
err = ti_sysc_clock_enable(device_get_parent(dev));
|
|
if (err != 0) {
|
|
device_printf(dev, "Cant enable sysc clkctrl, err %d\n", err);
|
|
return (ENXIO);
|
|
}
|
|
|
|
/* Get the base clock frequency. */
|
|
err = clk_get_freq(sc->clk_fck, &sc->sysclk_freq);
|
|
if (err != 0) {
|
|
device_printf(dev, "Cant get sysclk frequency, err %d\n", err);
|
|
return (ENXIO);
|
|
}
|
|
/* Request the memory resources. */
|
|
sc->mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
|
|
&sc->mem_rid, RF_ACTIVE);
|
|
if (sc->mem_res == NULL) {
|
|
return (ENXIO);
|
|
}
|
|
|
|
/*
|
|
* Configure the timer pulse/capture pin to input/capture mode. This is
|
|
* required in addition to configuring the pin as input with the pinmux
|
|
* controller (which was done via fdt data or tunable at probe time).
|
|
*/
|
|
sc->tclr = DMT_TCLR_GPO_CFG;
|
|
DMTIMER_WRITE4(sc, DMT_TCLR, sc->tclr);
|
|
|
|
/* Set up timecounter hardware, start it. */
|
|
DMTIMER_WRITE4(sc, DMT_TSICR, DMT_TSICR_RESET);
|
|
while (DMTIMER_READ4(sc, DMT_TIOCP_CFG) & DMT_TIOCP_RESET)
|
|
continue;
|
|
|
|
sc->tclr |= DMT_TCLR_START | DMT_TCLR_AUTOLOAD;
|
|
DMTIMER_WRITE4(sc, DMT_TLDR, 0);
|
|
DMTIMER_WRITE4(sc, DMT_TCRR, 0);
|
|
DMTIMER_WRITE4(sc, DMT_TCLR, sc->tclr);
|
|
|
|
/* Register the timecounter. */
|
|
sc->tc.tc_name = sc->tmr_name;
|
|
sc->tc.tc_get_timecount = dmtpps_get_timecount;
|
|
sc->tc.tc_counter_mask = ~0u;
|
|
sc->tc.tc_frequency = sc->sysclk_freq;
|
|
sc->tc.tc_quality = 1000;
|
|
sc->tc.tc_priv = sc;
|
|
|
|
tc_init(&sc->tc);
|
|
|
|
/*
|
|
* Indicate our PPS capabilities. Have the kernel init its part of the
|
|
* pps_state struct and add its capabilities.
|
|
*
|
|
* While the hardware has a mode to capture each edge, it's not clear we
|
|
* can use it that way, because there's only a single interrupt/status
|
|
* bit to say something was captured, but not which edge it was. For
|
|
* now, just say we can only capture assert events (the positive-going
|
|
* edge of the pulse).
|
|
*/
|
|
mtx_init(&sc->pps_mtx, "dmtpps", NULL, MTX_SPIN);
|
|
sc->pps_state.flags = PPSFLAG_MTX_SPIN;
|
|
sc->pps_state.ppscap = PPS_CAPTUREASSERT;
|
|
sc->pps_state.driver_abi = PPS_ABI_VERSION;
|
|
sc->pps_state.driver_mtx = &sc->pps_mtx;
|
|
pps_init_abi(&sc->pps_state);
|
|
|
|
/* Create the PPS cdev. */
|
|
make_dev_args_init(&mda);
|
|
mda.mda_flags = MAKEDEV_WAITOK;
|
|
mda.mda_devsw = &dmtpps_cdevsw;
|
|
mda.mda_cr = NULL;
|
|
mda.mda_uid = UID_ROOT;
|
|
mda.mda_gid = GID_WHEEL;
|
|
mda.mda_mode = 0600;
|
|
mda.mda_unit = device_get_unit(dev);
|
|
mda.mda_si_drv1 = sc;
|
|
if ((err = make_dev_s(&mda, &sc->pps_cdev, PPS_CDEV_NAME)) != 0) {
|
|
device_printf(dev, "Failed to create cdev %s\n", PPS_CDEV_NAME);
|
|
return (err);
|
|
}
|
|
|
|
if (bootverbose)
|
|
device_printf(sc->dev, "Using %s for PPS device /dev/%s\n",
|
|
sc->tmr_name, PPS_CDEV_NAME);
|
|
|
|
return (0);
|
|
}
|
|
|
|
static int
|
|
dmtpps_detach(device_t dev)
|
|
{
|
|
|
|
/*
|
|
* There is no way to remove a timecounter once it has been registered,
|
|
* even if it's not in use, so we can never detach. If we were
|
|
* dynamically loaded as a module this will prevent unloading.
|
|
*/
|
|
return (EBUSY);
|
|
}
|
|
|
|
static device_method_t dmtpps_methods[] = {
|
|
DEVMETHOD(device_probe, dmtpps_probe),
|
|
DEVMETHOD(device_attach, dmtpps_attach),
|
|
DEVMETHOD(device_detach, dmtpps_detach),
|
|
{ 0, 0 }
|
|
};
|
|
|
|
static driver_t dmtpps_driver = {
|
|
"am335x_dmtpps",
|
|
dmtpps_methods,
|
|
sizeof(struct dmtpps_softc),
|
|
};
|
|
|
|
static devclass_t dmtpps_devclass;
|
|
|
|
DRIVER_MODULE(am335x_dmtpps, simplebus, dmtpps_driver, dmtpps_devclass, 0, 0);
|
|
MODULE_DEPEND(am335x_dmtpps, ti_sysc, 1, 1, 1);
|