94dfb28ee0
Requested by: kib Reviewed by: kib Sponsored by: Innovate DSbD Differential Revision: https://reviews.freebsd.org/D26859
219 lines
8.2 KiB
C
219 lines
8.2 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
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*
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* Copyright (c) 2013 The FreeBSD Foundation
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* All rights reserved.
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*
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* This software was developed by Konstantin Belousov <kib@FreeBSD.org>
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* under sponsorship from the FreeBSD Foundation.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _DEV_IOMMU_IOMMU_H_
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#define _DEV_IOMMU_IOMMU_H_
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#include <dev/iommu/iommu_types.h>
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struct bus_dma_tag_common;
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struct iommu_map_entry;
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TAILQ_HEAD(iommu_map_entries_tailq, iommu_map_entry);
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RB_HEAD(iommu_gas_entries_tree, iommu_map_entry);
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RB_PROTOTYPE(iommu_gas_entries_tree, iommu_map_entry, rb_entry,
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iommu_gas_cmp_entries);
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struct iommu_qi_genseq {
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u_int gen;
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uint32_t seq;
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};
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struct iommu_map_entry {
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iommu_gaddr_t start;
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iommu_gaddr_t end;
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iommu_gaddr_t first; /* Least start in subtree */
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iommu_gaddr_t last; /* Greatest end in subtree */
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iommu_gaddr_t free_down; /* Max free space below the
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current R/B tree node */
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u_int flags;
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TAILQ_ENTRY(iommu_map_entry) dmamap_link; /* Link for dmamap entries */
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RB_ENTRY(iommu_map_entry) rb_entry; /* Links for domain entries */
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TAILQ_ENTRY(iommu_map_entry) unroll_link; /* Link for unroll after
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dmamap_load failure */
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struct iommu_domain *domain;
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struct iommu_qi_genseq gseq;
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};
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struct iommu_unit {
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struct mtx lock;
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int unit;
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int dma_enabled;
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/* Busdma delayed map load */
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struct task dmamap_load_task;
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TAILQ_HEAD(, bus_dmamap_iommu) delayed_maps;
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struct taskqueue *delayed_taskqueue;
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/*
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* Bitmap of buses for which context must ignore slot:func,
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* duplicating the page table pointer into all context table
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* entries. This is a client-controlled quirk to support some
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* NTBs.
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*/
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uint32_t buswide_ctxs[(PCI_BUSMAX + 1) / NBBY / sizeof(uint32_t)];
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};
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struct iommu_domain_map_ops {
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int (*map)(struct iommu_domain *domain, iommu_gaddr_t base,
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iommu_gaddr_t size, vm_page_t *ma, uint64_t pflags, int flags);
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int (*unmap)(struct iommu_domain *domain, iommu_gaddr_t base,
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iommu_gaddr_t size, int flags);
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};
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/*
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* Locking annotations:
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* (u) - Protected by iommu unit lock
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* (d) - Protected by domain lock
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* (c) - Immutable after initialization
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*/
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struct iommu_domain {
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struct iommu_unit *iommu; /* (c) */
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const struct iommu_domain_map_ops *ops;
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struct mtx lock; /* (c) */
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struct task unload_task; /* (c) */
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u_int entries_cnt; /* (d) */
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struct iommu_map_entries_tailq unload_entries; /* (d) Entries to
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unload */
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struct iommu_gas_entries_tree rb_root; /* (d) */
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iommu_gaddr_t end; /* (c) Highest address + 1 in
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the guest AS */
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struct iommu_map_entry *first_place, *last_place; /* (d) */
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struct iommu_map_entry *msi_entry; /* (d) Arch-specific */
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iommu_gaddr_t msi_base; /* (d) Arch-specific */
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vm_paddr_t msi_phys; /* (d) Arch-specific */
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u_int flags; /* (u) */
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};
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struct iommu_ctx {
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struct iommu_domain *domain; /* (c) */
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struct bus_dma_tag_iommu *tag; /* (c) Root tag */
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u_long loads; /* atomic updates, for stat only */
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u_long unloads; /* same */
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u_int flags; /* (u) */
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uint16_t rid; /* (c) pci RID */
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};
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/* struct iommu_ctx flags */
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#define IOMMU_CTX_FAULTED 0x0001 /* Fault was reported,
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last_fault_rec is valid */
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#define IOMMU_CTX_DISABLED 0x0002 /* Device is disabled, the
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ephemeral reference is kept
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to prevent context destruction */
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#define IOMMU_DOMAIN_GAS_INITED 0x0001
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#define IOMMU_DOMAIN_PGTBL_INITED 0x0002
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#define IOMMU_DOMAIN_IDMAP 0x0010 /* Domain uses identity
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page table */
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#define IOMMU_DOMAIN_RMRR 0x0020 /* Domain contains RMRR entry,
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cannot be turned off */
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#define IOMMU_LOCK(unit) mtx_lock(&(unit)->lock)
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#define IOMMU_UNLOCK(unit) mtx_unlock(&(unit)->lock)
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#define IOMMU_ASSERT_LOCKED(unit) mtx_assert(&(unit)->lock, MA_OWNED)
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#define IOMMU_DOMAIN_LOCK(dom) mtx_lock(&(dom)->lock)
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#define IOMMU_DOMAIN_UNLOCK(dom) mtx_unlock(&(dom)->lock)
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#define IOMMU_DOMAIN_ASSERT_LOCKED(dom) mtx_assert(&(dom)->lock, MA_OWNED)
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static inline bool
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iommu_test_boundary(iommu_gaddr_t start, iommu_gaddr_t size,
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iommu_gaddr_t boundary)
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{
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if (boundary == 0)
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return (true);
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return (start + size <= ((start + boundary) & ~(boundary - 1)));
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}
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void iommu_free_ctx(struct iommu_ctx *ctx);
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void iommu_free_ctx_locked(struct iommu_unit *iommu, struct iommu_ctx *ctx);
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struct iommu_ctx *iommu_get_ctx(struct iommu_unit *, device_t dev,
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uint16_t rid, bool id_mapped, bool rmrr_init);
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struct iommu_unit *iommu_find(device_t dev, bool verbose);
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void iommu_domain_unload_entry(struct iommu_map_entry *entry, bool free);
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void iommu_domain_unload(struct iommu_domain *domain,
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struct iommu_map_entries_tailq *entries, bool cansleep);
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struct iommu_ctx *iommu_instantiate_ctx(struct iommu_unit *iommu,
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device_t dev, bool rmrr);
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device_t iommu_get_requester(device_t dev, uint16_t *rid);
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int iommu_init_busdma(struct iommu_unit *unit);
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void iommu_fini_busdma(struct iommu_unit *unit);
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struct iommu_map_entry *iommu_map_alloc_entry(struct iommu_domain *iodom,
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u_int flags);
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void iommu_map_free_entry(struct iommu_domain *, struct iommu_map_entry *);
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int iommu_map(struct iommu_domain *iodom,
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const struct bus_dma_tag_common *common, iommu_gaddr_t size, int offset,
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u_int eflags, u_int flags, vm_page_t *ma, struct iommu_map_entry **res);
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int iommu_map_region(struct iommu_domain *domain,
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struct iommu_map_entry *entry, u_int eflags, u_int flags, vm_page_t *ma);
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void iommu_gas_init_domain(struct iommu_domain *domain);
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void iommu_gas_fini_domain(struct iommu_domain *domain);
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struct iommu_map_entry *iommu_gas_alloc_entry(struct iommu_domain *domain,
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u_int flags);
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void iommu_gas_free_entry(struct iommu_domain *domain,
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struct iommu_map_entry *entry);
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void iommu_gas_free_space(struct iommu_domain *domain,
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struct iommu_map_entry *entry);
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int iommu_gas_map(struct iommu_domain *domain,
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const struct bus_dma_tag_common *common, iommu_gaddr_t size, int offset,
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u_int eflags, u_int flags, vm_page_t *ma, struct iommu_map_entry **res);
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void iommu_gas_free_region(struct iommu_domain *domain,
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struct iommu_map_entry *entry);
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int iommu_gas_map_region(struct iommu_domain *domain,
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struct iommu_map_entry *entry, u_int eflags, u_int flags, vm_page_t *ma);
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int iommu_gas_reserve_region(struct iommu_domain *domain, iommu_gaddr_t start,
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iommu_gaddr_t end, struct iommu_map_entry **entry0);
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void iommu_set_buswide_ctx(struct iommu_unit *unit, u_int busno);
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bool iommu_is_buswide_ctx(struct iommu_unit *unit, u_int busno);
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void iommu_domain_init(struct iommu_unit *unit, struct iommu_domain *domain,
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const struct iommu_domain_map_ops *ops);
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void iommu_domain_fini(struct iommu_domain *domain);
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bool bus_dma_iommu_set_buswide(device_t dev);
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int bus_dma_iommu_load_ident(bus_dma_tag_t dmat, bus_dmamap_t map,
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vm_paddr_t start, vm_size_t length, int flags);
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bus_dma_tag_t iommu_get_dma_tag(device_t dev, device_t child);
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struct iommu_ctx *iommu_get_dev_ctx(device_t dev);
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struct iommu_domain *iommu_get_ctx_domain(struct iommu_ctx *ctx);
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SYSCTL_DECL(_hw_iommu);
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#endif /* !_DEV_IOMMU_IOMMU_H_ */
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