6f8ba91638
Add the missing implementation for get_cyclecount(9) on RISC-V by reading the cycle CSR. Submitted by: Mitchell Horne <mhorne063@gmail.com> Reviewed by: jhb MFC after: 2 weeks Differential Revision: https://reviews.freebsd.org/D17953
96 lines
3.2 KiB
C
96 lines
3.2 KiB
C
/*-
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* Copyright (c) 2015-2018 Ruslan Bukin <br@bsdpad.com>
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* All rights reserved.
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*
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* Portions of this software were developed by SRI International and the
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* University of Cambridge Computer Laboratory under DARPA/AFRL contract
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* FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme.
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*
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* Portions of this software were developed by the University of Cambridge
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* Computer Laboratory as part of the CTSRD Project, with support from the
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* UK Higher Education Innovation Fund (HEIF).
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _MACHINE_CPU_H_
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#define _MACHINE_CPU_H_
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#include <machine/atomic.h>
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#include <machine/cpufunc.h>
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#include <machine/frame.h>
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#define TRAPF_PC(tfp) ((tfp)->tf_ra)
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#define TRAPF_USERMODE(tfp) (((tfp)->tf_sstatus & SSTATUS_SPP) == 0)
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#define cpu_getstack(td) ((td)->td_frame->tf_sp)
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#define cpu_setstack(td, sp) ((td)->td_frame->tf_sp = (sp))
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#define cpu_spinwait() /* nothing */
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#define cpu_lock_delay() DELAY(1)
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#ifdef _KERNEL
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/*
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* 0x0000 CPU ID unimplemented
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* 0x0001 UC Berkeley Rocket repo
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* 0x00020x7FFE Reserved for open-source repos
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* 0x7FFF Reserved for extension
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* 0x8000 Reserved for anonymous source
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* 0x80010xFFFE Reserved for proprietary implementations
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* 0xFFFF Reserved for extension
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*/
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#define CPU_IMPL_SHIFT 0
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#define CPU_IMPL_MASK (0xffff << CPU_IMPL_SHIFT)
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#define CPU_IMPL(mimpid) ((mimpid & CPU_IMPL_MASK) >> CPU_IMPL_SHIFT)
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#define CPU_IMPL_UNIMPLEMEN 0x0
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#define CPU_IMPL_UCB_ROCKET 0x1
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#define CPU_PART_SHIFT 62
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#define CPU_PART_MASK (0x3ul << CPU_PART_SHIFT)
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#define CPU_PART(misa) ((misa & CPU_PART_MASK) >> CPU_PART_SHIFT)
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#define CPU_PART_RV32 0x1
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#define CPU_PART_RV64 0x2
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#define CPU_PART_RV128 0x3
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extern char btext[];
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extern char etext[];
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void cpu_halt(void) __dead2;
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void cpu_reset(void) __dead2;
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void fork_trampoline(void);
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void identify_cpu(void);
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void swi_vm(void *v);
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static __inline uint64_t
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get_cyclecount(void)
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{
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return (rdcycle());
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}
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#endif
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#endif /* !_MACHINE_CPU_H_ */
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