ffedb98b3e
AT_HWCAP is a field in the elf auxiliary vector meant to describe cpu-specific hardware features. For RISC-V we want to use this to indicate the presence of any standard extensions supported by the CPU. This allows userland applications to query the system for supported extensions using elf_aux_info(3). Support for an extension is indicated by the presence of its corresponding bit in AT_HWCAP -- e.g. systems supporting the 'c' extension (compressed instructions) will have the second bit set. Extensions advertised through AT_HWCAP are only those that are supported by all harts in the system. Reviewed by: jhb, markj Approved by: markj (mentor) MFC after: 2 weeks Differential Revision: https://reviews.freebsd.org/D20493
89 lines
2.9 KiB
C
89 lines
2.9 KiB
C
/*-
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* Copyright (c) 1996-1997 John D. Polstra.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _MACHINE_ELF_H_
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#define _MACHINE_ELF_H_
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/*
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* ELF definitions for the RISC-V architecture.
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*/
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#include <sys/elf32.h> /* Definitions common to all 32 bit architectures. */
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#include <sys/elf64.h> /* Definitions common to all 64 bit architectures. */
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#define __ELF_WORD_SIZE 64 /* Used by <sys/elf_generic.h> */
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#include <sys/elf_generic.h>
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/*
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* Auxiliary vector entries for passing information to the interpreter.
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*/
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typedef struct { /* Auxiliary vector entry on initial stack */
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int a_type; /* Entry type. */
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union {
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int a_val; /* Integer value. */
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} a_un;
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} Elf32_Auxinfo;
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typedef struct { /* Auxiliary vector entry on initial stack */
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long a_type; /* Entry type. */
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union {
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long a_val; /* Integer value. */
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void *a_ptr; /* Address. */
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void (*a_fcn)(void); /* Function pointer (not used). */
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} a_un;
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} Elf64_Auxinfo;
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__ElfType(Auxinfo);
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#define ELF_ARCH EM_RISCV
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#define ELF_MACHINE_OK(x) ((x) == (ELF_ARCH))
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/* Define "machine" characteristics */
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#define ELF_TARG_CLASS ELFCLASS64
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#define ELF_TARG_DATA ELFDATA2LSB
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#define ELF_TARG_MACH EM_RISCV
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#define ELF_TARG_VER 1
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/* TODO: set correct value */
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#define ET_DYN_LOAD_ADDR 0x100000
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/* Flags passed in AT_HWCAP */
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#define HWCAP_ISA_BIT(c) (1 << ((c) - 'A'))
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#define HWCAP_ISA_I HWCAP_ISA_BIT('I')
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#define HWCAP_ISA_M HWCAP_ISA_BIT('M')
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#define HWCAP_ISA_A HWCAP_ISA_BIT('A')
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#define HWCAP_ISA_F HWCAP_ISA_BIT('F')
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#define HWCAP_ISA_D HWCAP_ISA_BIT('D')
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#define HWCAP_ISA_C HWCAP_ISA_BIT('C')
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#define HWCAP_ISA_G \
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(HWCAP_ISA_I | HWCAP_ISA_M | HWCAP_ISA_A | HWCAP_ISA_F | HWCAP_ISA_D)
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#endif /* !_MACHINE_ELF_H_ */
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