467 lines
17 KiB
Plaintext
467 lines
17 KiB
Plaintext
@c Copyright 2002
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@c Free Software Foundation, Inc.
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@c This is part of the GAS manual.
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@c For copying conditions, see the file as.texinfo.
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@ifset GENERIC
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@page
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@node Alpha-Dependent
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@chapter Alpha Dependent Features
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@end ifset
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@ifclear GENERIC
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@node Machine Dependencies
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@chapter Alpha Dependent Features
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@end ifclear
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@cindex Alpha support
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@menu
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* Alpha Notes:: Notes
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* Alpha Options:: Options
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* Alpha Syntax:: Syntax
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* Alpha Floating Point:: Floating Point
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* Alpha Directives:: Alpha Machine Directives
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* Alpha Opcodes:: Opcodes
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@end menu
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@node Alpha Notes
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@section Notes
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@cindex Alpha notes
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@cindex notes for Alpha
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The documentation here is primarily for the ELF object format.
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@code{@value{AS}} also supports the ECOFF and EVAX formats, but
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features specific to these formats are not yet documented.
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@node Alpha Options
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@section Options
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@cindex Alpha options
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@cindex options for Alpha
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@table @option
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@cindex @code{-m@var{cpu}} command line option, Alpha
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@item -m@var{cpu}
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This option specifies the target processor. If an attempt is made to
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assemble an instruction which will not execute on the target processor,
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the assembler may either expand the instruction as a macro or issue an
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error message. This option is equivalent to the @code{.arch} directive.
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The following processor names are recognized:
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@code{21064},
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@code{21064a},
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@code{21066},
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@code{21068},
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@code{21164},
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@code{21164a},
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@code{21164pc},
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@code{21264},
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@code{21264a},
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@code{21264b},
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@code{ev4},
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@code{ev5},
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@code{lca45},
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@code{ev5},
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@code{ev56},
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@code{pca56},
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@code{ev6},
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@code{ev67},
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@code{ev68}.
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The special name @code{all} may be used to allow the assembler to accept
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instructions valid for any Alpha processor.
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In order to support existing practice in OSF/1 with respect to @code{.arch},
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and existing practice within @command{MILO} (the Linux ARC bootloader), the
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numbered processor names (e.g.@: 21064) enable the processor-specific PALcode
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instructions, while the ``electro-vlasic'' names (e.g.@: @code{ev4}) do not.
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@cindex @code{-mdebug} command line option, Alpha
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@cindex @code{-no-mdebug} command line option, Alpha
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@item -mdebug
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@itemx -no-mdebug
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Enables or disables the generation of @code{.mdebug} encapsulation for
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stabs directives and procedure descriptors. The default is to automatically
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enable @code{.mdebug} when the first stabs directive is seen.
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@cindex @code{-relax} command line option, Alpha
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@item -relax
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This option forces all relocations to be put into the object file, instead
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of saving space and resolving some relocations at assembly time. Note that
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this option does not propagate all symbol arithmetic into the object file,
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because not all symbol arithmetic can be represented. However, the option
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can still be useful in specific applications.
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@cindex @code{-g} command line option, Alpha
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@item -g
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This option is used when the compiler generates debug information. When
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@command{gcc} is using @command{mips-tfile} to generate debug
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information for ECOFF, local labels must be passed through to the object
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file. Otherwise this option has no effect.
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@cindex @code{-G} command line option, Alpha
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@item -G@var{size}
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A local common symbol larger than @var{size} is placed in @code{.bss},
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while smaller symbols are placed in @code{.sbss}.
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@cindex @code{-F} command line option, Alpha
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@cindex @code{-32addr} command line option, Alpha
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@item -F
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@itemx -32addr
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These options are ignored for backward compatibility.
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@end table
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@cindex Alpha Syntax
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@node Alpha Syntax
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@section Syntax
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The assembler syntax closely follow the Alpha Reference Manual;
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assembler directives and general syntax closely follow the OSF/1 and
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OpenVMS syntax, with a few differences for ELF.
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@menu
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* Alpha-Chars:: Special Characters
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* Alpha-Regs:: Register Names
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* Alpha-Relocs:: Relocations
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@end menu
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@node Alpha-Chars
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@subsection Special Characters
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@cindex line comment character, Alpha
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@cindex Alpha line comment character
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@samp{#} is the line comment character.
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@cindex line separator, Alpha
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@cindex statement separator, Alpha
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@cindex Alpha line separator
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@samp{;} can be used instead of a newline to separate statements.
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@node Alpha-Regs
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@subsection Register Names
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@cindex Alpha registers
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@cindex register names, Alpha
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The 32 integer registers are referred to as @samp{$@var{n}} or
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@samp{$r@var{n}}. In addition, registers 15, 28, 29, and 30 may
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be referred to by the symbols @samp{$fp}, @samp{$at}, @samp{$gp},
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and @samp{$sp} respectively.
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The 32 floating-point registers are referred to as @samp{$f@var{n}}.
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@node Alpha-Relocs
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@subsection Relocations
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@cindex Alpha relocations
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@cindex relocations, Alpha
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Some of these relocations are available for ECOFF, but mostly
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only for ELF. They are modeled after the relocation format
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introduced in Digital Unix 4.0, but there are additions.
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The format is @samp{!@var{tag}} or @samp{!@var{tag}!@var{number}}
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where @var{tag} is the name of the relocation. In some cases
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@var{number} is used to relate specific instructions.
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The relocation is placed at the end of the instruction like so:
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@example
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ldah $0,a($29) !gprelhigh
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lda $0,a($0) !gprellow
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ldq $1,b($29) !literal!100
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ldl $2,0($1) !lituse_base!100
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@end example
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@table @code
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@item !literal
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@itemx !literal!@var{N}
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Used with an @code{ldq} instruction to load the address of a symbol
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from the GOT.
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A sequence number @var{N} is optional, and if present is used to pair
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@code{lituse} relocations with this @code{literal} relocation. The
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@code{lituse} relocations are used by the linker to optimize the code
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based on the final location of the symbol.
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Note that these optimizations are dependent on the data flow of the
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program. Therefore, if @emph{any} @code{lituse} is paired with a
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@code{literal} relocation, then @emph{all} uses of the register set by
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the @code{literal} instruction must also be marked with @code{lituse}
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relocations. This is because the original @code{literal} instruction
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may be deleted or transformed into another instruction.
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Also note that there may be a one-to-many relationship between
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@code{literal} and @code{lituse}, but not a many-to-one. That is, if
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there are two code paths that load up the same address and feed the
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value to a single use, then the use may not use a @code{lituse}
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relocation.
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@item !lituse_base!@var{N}
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Used with any memory format instruction (e.g.@: @code{ldl}) to indicate
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that the literal is used for an address load. The offset field of the
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instruction must be zero. During relaxation, the code may be altered
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to use a gp-relative load.
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@item !lituse_jsr!@var{N}
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Used with a register branch format instruction (e.g.@: @code{jsr}) to
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indicate that the literal is used for a call. During relaxation, the
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code may be altered to use a direct branch (e.g.@: @code{bsr}).
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@item !lituse_bytoff!@var{N}
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Used with a byte mask instruction (e.g.@: @code{extbl}) to indicate
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that only the low 3 bits of the address are relevant. During relaxation,
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the code may be altered to use an immediate instead of a register shift.
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@item !lituse_addr!@var{N}
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Used with any other instruction to indicate that the original address
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is in fact used, and the original @code{ldq} instruction may not be
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altered or deleted. This is useful in conjunction with @code{lituse_jsr}
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to test whether a weak symbol is defined.
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@example
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ldq $27,foo($29) !literal!1
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beq $27,is_undef !lituse_addr!1
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jsr $26,($27),foo !lituse_jsr!1
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@end example
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@item !lituse_tlsgd!@var{N}
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Used with a register branch format instruction to indicate that the
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literal is the call to @code{__tls_get_addr} used to compute the
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address of the thread-local storage variable whose descriptor was
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loaded with @code{!tlsgd!@var{N}}.
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@item !lituse_tlsldm!@var{N}
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Used with a register branch format instruction to indicate that the
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literal is the call to @code{__tls_get_addr} used to compute the
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address of the base of the thread-local storage block for the current
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module. The descriptor for the module must have been loaded with
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@code{!tlsldm!@var{N}}.
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@item !gpdisp!@var{N}
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Used with @code{ldah} and @code{lda} to load the GP from the current
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address, a-la the @code{ldgp} macro. The source register for the
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@code{ldah} instruction must contain the address of the @code{ldah}
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instruction. There must be exactly one @code{lda} instruction paired
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with the @code{ldah} instruction, though it may appear anywhere in
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the instruction stream. The immediate operands must be zero.
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@example
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bsr $26,foo
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ldah $29,0($26) !gpdisp!1
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lda $29,0($29) !gpdisp!1
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@end example
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@item !gprelhigh
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Used with an @code{ldah} instruction to add the high 16 bits of a
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32-bit displacement from the GP.
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@item !gprellow
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Used with any memory format instruction to add the low 16 bits of a
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32-bit displacement from the GP.
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@item !gprel
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Used with any memory format instruction to add a 16-bit displacement
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from the GP.
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@item !samegp
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Used with any branch format instruction to skip the GP load at the
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target address. The referenced symbol must have the same GP as the
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source object file, and it must be declared to either not use @code{$27}
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or perform a standard GP load in the first two instructions via the
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@code{.prologue} directive.
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@item !tlsgd
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@itemx !tlsgd!@var{N}
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Used with an @code{lda} instruction to load the address of a TLS
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descriptor for a symbol in the GOT.
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The sequence number @var{N} is optional, and if present it used to
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pair the descriptor load with both the @code{literal} loading the
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address of the @code{__tls_get_addr} function and the @code{lituse_tlsgd}
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marking the call to that function.
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For proper relaxation, both the @code{tlsgd}, @code{literal} and
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@code{lituse} relocations must be in the same extended basic block.
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That is, the relocation with the lowest address must be executed
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first at runtime.
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@item !tlsldm
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@itemx !tlsldm!@var{N}
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Used with an @code{lda} instruction to load the address of a TLS
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descriptor for the current module in the GOT.
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Similar in other respects to @code{tlsgd}.
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@item !gotdtprel
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Used with an @code{ldq} instruction to load the offset of the TLS
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symbol within its module's thread-local storage block. Also known
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as the dynamic thread pointer offset or dtp-relative offset.
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@item !dtprelhi
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@itemx !dtprello
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@itemx !dtprel
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Like @code{gprel} relocations except they compute dtp-relative offsets.
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@item !gottprel
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Used with an @code{ldq} instruction to load the offset of the TLS
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symbol from the thread pointer. Also known as the tp-relative offset.
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@item !tprelhi
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@itemx !tprello
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@itemx !tprel
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Like @code{gprel} relocations except they compute tp-relative offsets.
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@end table
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@node Alpha Floating Point
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@section Floating Point
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@cindex floating point, Alpha (@sc{ieee})
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@cindex Alpha floating point (@sc{ieee})
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The Alpha family uses both @sc{ieee} and VAX floating-point numbers.
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@node Alpha Directives
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@section Alpha Assembler Directives
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@command{@value{AS}} for the Alpha supports many additional directives for
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compatibility with the native assembler. This section describes them only
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briefly.
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@cindex Alpha-only directives
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These are the additional directives in @code{@value{AS}} for the Alpha:
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@table @code
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@item .arch @var{cpu}
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Specifies the target processor. This is equivalent to the
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@option{-m@var{cpu}} command-line option. @xref{Alpha Options, Options},
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for a list of values for @var{cpu}.
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@item .ent @var{function}[, @var{n}]
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Mark the beginning of @var{function}. An optional number may follow for
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compatibility with the OSF/1 assembler, but is ignored. When generating
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@code{.mdebug} information, this will create a procedure descriptor for
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the function. In ELF, it will mark the symbol as a function a-la the
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generic @code{.type} directive.
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@item .end @var{function}
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Mark the end of @var{function}. In ELF, it will set the size of the symbol
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a-la the generic @code{.size} directive.
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@item .mask @var{mask}, @var{offset}
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Indicate which of the integer registers are saved in the current
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function's stack frame. @var{mask} is interpreted a bit mask in which
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bit @var{n} set indicates that register @var{n} is saved. The registers
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are saved in a block located @var{offset} bytes from the @dfn{canonical
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frame address} (CFA) which is the value of the stack pointer on entry to
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the function. The registers are saved sequentially, except that the
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return address register (normally @code{$26}) is saved first.
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This and the other directives that describe the stack frame are
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currently only used when generating @code{.mdebug} information. They
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may in the future be used to generate DWARF2 @code{.debug_frame} unwind
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information for hand written assembly.
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@item .fmask @var{mask}, @var{offset}
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Indicate which of the floating-point registers are saved in the current
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stack frame. The @var{mask} and @var{offset} parameters are interpreted
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as with @code{.mask}.
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@item .frame @var{framereg}, @var{frameoffset}, @var{retreg}[, @var{argoffset}]
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Describes the shape of the stack frame. The frame pointer in use is
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@var{framereg}; normally this is either @code{$fp} or @code{$sp}. The
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frame pointer is @var{frameoffset} bytes below the CFA. The return
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address is initially located in @var{retreg} until it is saved as
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indicated in @code{.mask}. For compatibility with OSF/1 an optional
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@var{argoffset} parameter is accepted and ignored. It is believed to
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indicate the offset from the CFA to the saved argument registers.
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@item .prologue @var{n}
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Indicate that the stack frame is set up and all registers have been
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spilled. The argument @var{n} indicates whether and how the function
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uses the incoming @dfn{procedure vector} (the address of the called
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function) in @code{$27}. 0 indicates that @code{$27} is not used; 1
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indicates that the first two instructions of the function use @code{$27}
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to perform a load of the GP register; 2 indicates that @code{$27} is
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used in some non-standard way and so the linker cannot elide the load of
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the procedure vector during relaxation.
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@item .usepv @var{function}, @var{which}
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Used to indicate the use of the @code{$27} register, similar to
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@code{.prologue}, but without the other semantics of needing to
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be inside an open @code{.ent}/@code{.end} block.
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The @var{which} argument should be either @code{no}, indicating that
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@code{$27} is not used, or @code{std}, indicating that the first two
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instructions of the function perform a GP load.
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One might use this directive instead of @code{.prologue} if you are
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also using dwarf2 CFI directives.
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@item .gprel32 @var{expression}
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Computes the difference between the address in @var{expression} and the
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GP for the current object file, and stores it in 4 bytes. In addition
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to being smaller than a full 8 byte address, this also does not require
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a dynamic relocation when used in a shared library.
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@item .t_floating @var{expression}
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Stores @var{expression} as an @sc{ieee} double precision value.
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@item .s_floating @var{expression}
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Stores @var{expression} as an @sc{ieee} single precision value.
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@item .f_floating @var{expression}
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Stores @var{expression} as a VAX F format value.
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@item .g_floating @var{expression}
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Stores @var{expression} as a VAX G format value.
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@item .d_floating @var{expression}
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Stores @var{expression} as a VAX D format value.
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@item .set @var{feature}
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Enables or disables various assembler features. Using the positive
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name of the feature enables while using @samp{no@var{feature}} disables.
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@table @code
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@item at
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Indicates that macro expansions may clobber the @dfn{assembler
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temporary} (@code{$at} or @code{$28}) register. Some macros may not be
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expanded without this and will generate an error message if @code{noat}
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is in effect. When @code{at} is in effect, a warning will be generated
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if @code{$at} is used by the programmer.
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@item macro
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Enables the expansion of macro instructions. Note that variants of real
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instructions, such as @code{br label} vs @code{br $31,label} are
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considered alternate forms and not macros.
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@item move
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@itemx reorder
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@itemx volatile
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These control whether and how the assembler may re-order instructions.
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Accepted for compatibility with the OSF/1 assembler, but @command{@value{AS}}
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does not do instruction scheduling, so these features are ignored.
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@end table
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@end table
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The following directives are recognized for compatibility with the OSF/1
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assembler but are ignored.
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@example
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.proc .aproc
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.reguse .livereg
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.option .aent
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.ugen .eflag
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.alias .noalias
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@end example
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@node Alpha Opcodes
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@section Opcodes
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For detailed information on the Alpha machine instruction set, see the
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@c Attempt to work around a very overfull hbox.
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@iftex
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Alpha Architecture Handbook located at
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@smallfonts
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@example
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ftp://ftp.digital.com/pub/Digital/info/semiconductor/literature/alphaahb.pdf
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@end example
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@textfonts
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@end iftex
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@ifnottex
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@uref{ftp://ftp.digital.com/pub/Digital/info/semiconductor/literature/alphaahb.pdf,Alpha Architecture Handbook}.
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@end ifnottex
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