The ice(4) driver is the driver for the Intel E8xx series Ethernet controllers; currently with codenames Columbiaville and Columbia Park. These new controllers support 100G speeds, as well as introducing more queues, better virtualization support, and more offload capabilities. Future work will enable virtual functions (like in ixl(4)) and the other functionality outlined above. For full functionality, the kernel should be compiled with "device ice_ddp" like in the amd64 NOTES file, and/or ice_ddp_load="YES" should be added to /boot/loader.conf so that the DDP package file included in this commit can be downloaded to the adapter. Otherwise, the adapter will fall back to a single queue mode with limited functionality. A man page for this driver will be forthcoming. MFC after: 1 month Relnotes: yes Sponsored by: Intel Corporation Differential Revision: https://reviews.freebsd.org/D21959
308 lines
8.0 KiB
C
308 lines
8.0 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause */
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/* Copyright (c) 2020, Intel Corporation
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* 3. Neither the name of the Intel Corporation nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*$FreeBSD$*/
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#ifndef _ICE_PROTOCOL_TYPE_H_
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#define _ICE_PROTOCOL_TYPE_H_
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#include "ice_flex_type.h"
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#define ICE_IPV6_ADDR_LENGTH 16
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/* Each recipe can match up to 5 different fields. Fields to match can be meta-
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* data, values extracted from packet headers, or results from other recipes.
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* One of the 5 fields is reserved for matching the switch ID. So, up to 4
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* recipes can provide intermediate results to another one through chaining,
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* e.g. recipes 0, 1, 2, and 3 can provide intermediate results to recipe 4.
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*/
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#define ICE_NUM_WORDS_RECIPE 4
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/* Max recipes that can be chained */
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#define ICE_MAX_CHAIN_RECIPE 5
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/* 1 word reserved for switch ID from allowed 5 words.
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* So a recipe can have max 4 words. And you can chain 5 such recipes
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* together. So maximum words that can be programmed for look up is 5 * 4.
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*/
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#define ICE_MAX_CHAIN_WORDS (ICE_NUM_WORDS_RECIPE * ICE_MAX_CHAIN_RECIPE)
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/* Field vector index corresponding to chaining */
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#define ICE_CHAIN_FV_INDEX_START 47
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enum ice_protocol_type {
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ICE_MAC_OFOS = 0,
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ICE_MAC_IL,
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ICE_ETYPE_OL,
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ICE_VLAN_OFOS,
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ICE_IPV4_OFOS,
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ICE_IPV4_IL,
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ICE_IPV6_OFOS,
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ICE_IPV6_IL,
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ICE_TCP_IL,
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ICE_UDP_OF,
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ICE_UDP_ILOS,
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ICE_SCTP_IL,
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ICE_VXLAN,
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ICE_GENEVE,
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ICE_VXLAN_GPE,
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ICE_NVGRE,
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ICE_PROTOCOL_LAST
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};
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enum ice_sw_tunnel_type {
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ICE_NON_TUN = 0,
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ICE_SW_TUN_AND_NON_TUN,
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ICE_SW_TUN_VXLAN_GPE,
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ICE_SW_TUN_GENEVE,
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ICE_SW_TUN_VXLAN,
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ICE_SW_TUN_NVGRE,
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ICE_SW_TUN_UDP, /* This means all "UDP" tunnel types: VXLAN-GPE, VXLAN
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* and GENEVE
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*/
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ICE_ALL_TUNNELS /* All tunnel types including NVGRE */
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};
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/* Decoders for ice_prot_id:
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* - F: First
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* - I: Inner
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* - L: Last
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* - O: Outer
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* - S: Single
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*/
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enum ice_prot_id {
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ICE_PROT_ID_INVAL = 0,
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ICE_PROT_MAC_OF_OR_S = 1,
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ICE_PROT_MAC_O2 = 2,
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ICE_PROT_MAC_IL = 4,
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ICE_PROT_MAC_IN_MAC = 7,
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ICE_PROT_ETYPE_OL = 9,
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ICE_PROT_ETYPE_IL = 10,
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ICE_PROT_PAY = 15,
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ICE_PROT_EVLAN_O = 16,
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ICE_PROT_VLAN_O = 17,
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ICE_PROT_VLAN_IF = 18,
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ICE_PROT_MPLS_OL_MINUS_1 = 27,
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ICE_PROT_MPLS_OL_OR_OS = 28,
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ICE_PROT_MPLS_IL = 29,
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ICE_PROT_IPV4_OF_OR_S = 32,
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ICE_PROT_IPV4_IL = 33,
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ICE_PROT_IPV6_OF_OR_S = 40,
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ICE_PROT_IPV6_IL = 41,
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ICE_PROT_IPV6_FRAG = 47,
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ICE_PROT_TCP_IL = 49,
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ICE_PROT_UDP_OF = 52,
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ICE_PROT_UDP_IL_OR_S = 53,
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ICE_PROT_GRE_OF = 64,
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ICE_PROT_NSH_F = 84,
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ICE_PROT_ESP_F = 88,
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ICE_PROT_ESP_2 = 89,
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ICE_PROT_SCTP_IL = 96,
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ICE_PROT_ICMP_IL = 98,
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ICE_PROT_ICMPV6_IL = 100,
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ICE_PROT_VRRP_F = 101,
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ICE_PROT_OSPF = 102,
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ICE_PROT_ATAOE_OF = 114,
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ICE_PROT_CTRL_OF = 116,
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ICE_PROT_LLDP_OF = 117,
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ICE_PROT_ARP_OF = 118,
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ICE_PROT_EAPOL_OF = 120,
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ICE_PROT_META_ID = 255, /* when offset == metaddata */
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ICE_PROT_INVALID = 255 /* when offset == ICE_FV_OFFSET_INVAL */
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};
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#define ICE_VNI_OFFSET 12 /* offset of VNI from ICE_PROT_UDP_OF */
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#define ICE_MAC_OFOS_HW 1
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#define ICE_MAC_IL_HW 4
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#define ICE_ETYPE_OL_HW 9
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#define ICE_VLAN_OL_HW 17
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#define ICE_IPV4_OFOS_HW 32
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#define ICE_IPV4_IL_HW 33
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#define ICE_IPV6_OFOS_HW 40
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#define ICE_IPV6_IL_HW 41
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#define ICE_TCP_IL_HW 49
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#define ICE_UDP_ILOS_HW 53
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#define ICE_SCTP_IL_HW 96
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/* ICE_UDP_OF is used to identify all 3 tunnel types
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* VXLAN, GENEVE and VXLAN_GPE. To differentiate further
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* need to use flags from the field vector
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*/
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#define ICE_UDP_OF_HW 52 /* UDP Tunnels */
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#define ICE_GRE_OF_HW 64 /* NVGRE */
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#define ICE_META_DATA_ID_HW 255 /* this is used for tunnel type */
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#define ICE_MDID_SIZE 2
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#define ICE_TUN_FLAG_MDID 21
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#define ICE_TUN_FLAG_MASK 0xFF
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#define ICE_TUN_FLAG_FV_IND 2
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#define ICE_PROTOCOL_MAX_ENTRIES 16
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/* Mapping of software defined protocol ID to hardware defined protocol ID */
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struct ice_protocol_entry {
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enum ice_protocol_type type;
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u8 protocol_id;
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};
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struct ice_ether_hdr {
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u8 dst_addr[ETH_ALEN];
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u8 src_addr[ETH_ALEN];
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};
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struct ice_ethtype_hdr {
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__be16 ethtype_id;
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};
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struct ice_ether_vlan_hdr {
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u8 dst_addr[ETH_ALEN];
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u8 src_addr[ETH_ALEN];
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__be32 vlan_id;
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};
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struct ice_vlan_hdr {
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__be16 vlan;
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__be16 type;
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};
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struct ice_ipv4_hdr {
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u8 version;
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u8 tos;
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__be16 total_length;
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__be16 id;
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__be16 frag_off;
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u8 time_to_live;
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u8 protocol;
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__be16 check;
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__be32 src_addr;
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__be32 dst_addr;
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};
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struct ice_le_ver_tc_flow {
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union {
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struct {
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u32 flow_label : 20;
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u32 tc : 8;
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u32 version : 4;
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} fld;
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u32 val;
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} u;
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};
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struct ice_ipv6_hdr {
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__be32 be_ver_tc_flow;
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__be16 payload_len;
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u8 next_hdr;
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u8 hop_limit;
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u8 src_addr[ICE_IPV6_ADDR_LENGTH];
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u8 dst_addr[ICE_IPV6_ADDR_LENGTH];
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};
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struct ice_sctp_hdr {
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__be16 src_port;
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__be16 dst_port;
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__be32 verification_tag;
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__be32 check;
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};
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struct ice_l4_hdr {
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__be16 src_port;
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__be16 dst_port;
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__be16 len;
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__be16 check;
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};
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struct ice_udp_tnl_hdr {
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__be16 field;
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__be16 proto_type;
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__be32 vni; /* only use lower 24-bits */
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};
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struct ice_nvgre {
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__be16 flags;
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__be16 protocol;
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__be32 tni_flow;
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};
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union ice_prot_hdr {
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struct ice_ether_hdr eth_hdr;
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struct ice_ethtype_hdr ethertype;
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struct ice_vlan_hdr vlan_hdr;
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struct ice_ipv4_hdr ipv4_hdr;
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struct ice_ipv6_hdr ipv6_hdr;
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struct ice_l4_hdr l4_hdr;
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struct ice_sctp_hdr sctp_hdr;
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struct ice_udp_tnl_hdr tnl_hdr;
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struct ice_nvgre nvgre_hdr;
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};
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/* This is mapping table entry that maps every word within a given protocol
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* structure to the real byte offset as per the specification of that
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* protocol header.
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* for e.g. dst address is 3 words in ethertype header and corresponding bytes
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* are 0, 2, 3 in the actual packet header and src address is at 4, 6, 8
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*/
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struct ice_prot_ext_tbl_entry {
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enum ice_protocol_type prot_type;
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/* Byte offset into header of given protocol type */
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u8 offs[sizeof(union ice_prot_hdr)];
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};
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/* Extractions to be looked up for a given recipe */
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struct ice_prot_lkup_ext {
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u16 prot_type;
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u8 n_val_words;
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/* create a buffer to hold max words per recipe */
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u16 field_off[ICE_MAX_CHAIN_WORDS];
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u16 field_mask[ICE_MAX_CHAIN_WORDS];
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struct ice_fv_word fv_words[ICE_MAX_CHAIN_WORDS];
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/* Indicate field offsets that have field vector indices assigned */
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ice_declare_bitmap(done, ICE_MAX_CHAIN_WORDS);
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};
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struct ice_pref_recipe_group {
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u8 n_val_pairs; /* Number of valid pairs */
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struct ice_fv_word pairs[ICE_NUM_WORDS_RECIPE];
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u16 mask[ICE_NUM_WORDS_RECIPE];
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};
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struct ice_recp_grp_entry {
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struct LIST_ENTRY_TYPE l_entry;
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#define ICE_INVAL_CHAIN_IND 0xFF
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u16 rid;
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u8 chain_idx;
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u16 fv_idx[ICE_NUM_WORDS_RECIPE];
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u16 fv_mask[ICE_NUM_WORDS_RECIPE];
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struct ice_pref_recipe_group r_group;
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};
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#endif /* _ICE_PROTOCOL_TYPE_H_ */
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