250 lines
5.7 KiB
C
250 lines
5.7 KiB
C
/*-
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* Copyright (c) 2014 Ruslan Bukin <br@bsdpad.com>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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/*
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* Vybrid Family Port control and interrupts (PORT)
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* Chapter 6, Vybrid Reference Manual, Rev. 5, 07/2013
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/malloc.h>
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#include <sys/rman.h>
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#include <sys/timeet.h>
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#include <sys/timetc.h>
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#include <sys/watchdog.h>
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#include <dev/fdt/fdt_common.h>
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#include <dev/ofw/openfirm.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include <machine/bus.h>
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#include <machine/cpu.h>
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#include <machine/intr.h>
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#include <arm/freescale/vybrid/vf_port.h>
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#include <arm/freescale/vybrid/vf_common.h>
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/* Pin Control Register */
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#define PORT_PCR(n) (0x1000 * (n >> 5) + 0x4 * (n % 32))
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#define PCR_IRQC_S 16
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#define PCR_IRQC_M 0xF
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#define PCR_DMA_RE 0x1
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#define PCR_DMA_FE 0x2
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#define PCR_DMA_EE 0x3
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#define PCR_INT_LZ 0x8
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#define PCR_INT_RE 0x9
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#define PCR_INT_FE 0xA
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#define PCR_INT_EE 0xB
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#define PCR_INT_LO 0xC
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#define PCR_ISF (1 << 24)
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#define PORT0_ISFR 0xA0 /* Interrupt Status Flag Register */
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#define PORT0_DFER 0xC0 /* Digital Filter Enable Register */
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#define PORT0_DFCR 0xC4 /* Digital Filter Clock Register */
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#define PORT0_DFWR 0xC8 /* Digital Filter Width Register */
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struct port_event {
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uint32_t enabled;
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uint32_t mux_num;
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uint32_t mux_src;
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uint32_t mux_chn;
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void (*ih) (void *);
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void *ih_user;
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enum ev_type pevt;
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};
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static struct port_event event_map[NGPIO];
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struct port_softc {
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struct resource *res[6];
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bus_space_tag_t bst;
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bus_space_handle_t bsh;
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void *gpio_ih[NGPIO];
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};
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struct port_softc *port_sc;
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static struct resource_spec port_spec[] = {
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{ SYS_RES_MEMORY, 0, RF_ACTIVE },
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{ SYS_RES_IRQ, 0, RF_ACTIVE },
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{ SYS_RES_IRQ, 1, RF_ACTIVE },
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{ SYS_RES_IRQ, 2, RF_ACTIVE },
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{ SYS_RES_IRQ, 3, RF_ACTIVE },
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{ SYS_RES_IRQ, 4, RF_ACTIVE },
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{ -1, 0 }
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};
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static int
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port_intr(void *arg)
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{
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struct port_event *pev;
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struct port_softc *sc;
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int reg;
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int i;
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sc = arg;
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for (i = 0; i < NGPIO; i++) {
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reg = READ4(sc, PORT_PCR(i));
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if (reg & PCR_ISF) {
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/* Clear interrupt */
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WRITE4(sc, PORT_PCR(i), reg);
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/* Handle event */
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pev = &event_map[i];
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if (pev->enabled == 1) {
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if (pev->ih != NULL) {
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pev->ih(pev->ih_user);
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}
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}
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}
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}
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return (FILTER_HANDLED);
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}
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int
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port_setup(int pnum, enum ev_type pevt, void (*ih)(void *), void *ih_user)
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{
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struct port_event *pev;
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struct port_softc *sc;
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int reg;
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int val;
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sc = port_sc;
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switch (pevt) {
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case DMA_RISING_EDGE:
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val = PCR_DMA_RE;
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break;
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case DMA_FALLING_EDGE:
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val = PCR_DMA_FE;
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break;
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case DMA_EITHER_EDGE:
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val = PCR_DMA_EE;
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break;
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case INT_LOGIC_ZERO:
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val = PCR_INT_LZ;
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break;
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case INT_RISING_EDGE:
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val = PCR_INT_RE;
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break;
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case INT_FALLING_EDGE:
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val = PCR_INT_FE;
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break;
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case INT_EITHER_EDGE:
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val = PCR_INT_EE;
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break;
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case INT_LOGIC_ONE:
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val = PCR_INT_LO;
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break;
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default:
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return (-1);
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};
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reg = READ4(sc, PORT_PCR(pnum));
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reg &= ~(PCR_IRQC_M << PCR_IRQC_S);
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reg |= (val << PCR_IRQC_S);
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WRITE4(sc, PORT_PCR(pnum), reg);
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pev = &event_map[pnum];
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pev->ih = ih;
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pev->ih_user = ih_user;
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pev->pevt = pevt;
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pev->enabled = 1;
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return (0);
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}
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static int
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port_probe(device_t dev)
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{
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if (!ofw_bus_status_okay(dev))
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return (ENXIO);
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if (!ofw_bus_is_compatible(dev, "fsl,mvf600-port"))
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return (ENXIO);
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device_set_desc(dev, "Vybrid Family Port control and interrupts");
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return (BUS_PROBE_DEFAULT);
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}
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static int
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port_attach(device_t dev)
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{
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struct port_softc *sc;
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int irq;
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sc = device_get_softc(dev);
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if (bus_alloc_resources(dev, port_spec, sc->res)) {
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device_printf(dev, "could not allocate resources\n");
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return (ENXIO);
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}
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/* Memory interface */
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sc->bst = rman_get_bustag(sc->res[0]);
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sc->bsh = rman_get_bushandle(sc->res[0]);
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port_sc = sc;
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for (irq = 0; irq < NPORTS; irq ++) {
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if ((bus_setup_intr(dev, sc->res[1 + irq], INTR_TYPE_MISC,
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port_intr, NULL, sc, &sc->gpio_ih[irq]))) {
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device_printf(dev,
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"ERROR: Unable to register interrupt handler\n");
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return (ENXIO);
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}
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}
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return (0);
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}
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static device_method_t port_methods[] = {
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DEVMETHOD(device_probe, port_probe),
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DEVMETHOD(device_attach, port_attach),
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{ 0, 0 }
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};
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static driver_t port_driver = {
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"port",
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port_methods,
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sizeof(struct port_softc),
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};
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static devclass_t port_devclass;
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DRIVER_MODULE(port, simplebus, port_driver, port_devclass, 0, 0);
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