68dd718256
This change adds support for POWER8 and POWER9 PMCs (bare metal and pseries). All PowerISA 2.07B non-random events are supported. Implementation was based on that of PPC970. Reviewed by: jhibbits Sponsored by: Eldorado Research Institute (eldorado.org.br) Differential Revision: https://reviews.freebsd.org/D26110
320 lines
8.5 KiB
C
320 lines
8.5 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
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*
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* Copyright (c) 2013 Justin Hibbits
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* Copyright (c) 2020 Leandro Lupori
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/pmc.h>
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#include <sys/pmckern.h>
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#include <sys/systm.h>
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#include <machine/pmc_mdep.h>
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#include <machine/spr.h>
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#include <machine/cpu.h>
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#include "hwpmc_powerpc.h"
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#define POWER8_MAX_PMCS 6
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static struct pmc_ppc_event power8_event_codes[] = {
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{PMC_EV_POWER8_INSTR_COMPLETED,
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.pe_flags = PMC_FLAG_PMC5,
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.pe_code = 0x00
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},
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/*
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* PMC1 can also count cycles, but as PMC6 can only count cycles
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* it's better to always use it and leave PMC1 free to count
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* other events.
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*/
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{PMC_EV_POWER8_CYCLES,
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.pe_flags = PMC_FLAG_PMC6,
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.pe_code = 0xf0
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},
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{PMC_EV_POWER8_CYCLES_WITH_INSTRS_COMPLETED,
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.pe_flags = PMC_FLAG_PMC1,
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.pe_code = 0xf2
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},
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{PMC_EV_POWER8_FPU_INSTR_COMPLETED,
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.pe_flags = PMC_FLAG_PMC1,
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.pe_code = 0xf4
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},
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{PMC_EV_POWER8_ERAT_INSTR_MISS,
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.pe_flags = PMC_FLAG_PMC1,
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.pe_code = 0xf6
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},
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{PMC_EV_POWER8_CYCLES_IDLE,
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.pe_flags = PMC_FLAG_PMC1,
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.pe_code = 0xf8
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},
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{PMC_EV_POWER8_CYCLES_WITH_ANY_THREAD_RUNNING,
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.pe_flags = PMC_FLAG_PMC1,
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.pe_code = 0xfa
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},
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{PMC_EV_POWER8_STORE_COMPLETED,
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.pe_flags = PMC_FLAG_PMC2,
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.pe_code = 0xf0
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},
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{PMC_EV_POWER8_INSTR_DISPATCHED,
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.pe_flags = PMC_FLAG_PMC2 | PMC_FLAG_PMC3,
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.pe_code = 0xf2
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},
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{PMC_EV_POWER8_CYCLES_RUNNING,
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.pe_flags = PMC_FLAG_PMC2,
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.pe_code = 0xf4
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},
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{PMC_EV_POWER8_ERAT_DATA_MISS,
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.pe_flags = PMC_FLAG_PMC2,
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.pe_code = 0xf6
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},
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{PMC_EV_POWER8_EXTERNAL_INTERRUPT,
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.pe_flags = PMC_FLAG_PMC2,
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.pe_code = 0xf8
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},
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{PMC_EV_POWER8_BRANCH_TAKEN,
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.pe_flags = PMC_FLAG_PMC2,
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.pe_code = 0xfa
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},
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{PMC_EV_POWER8_L1_INSTR_MISS,
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.pe_flags = PMC_FLAG_PMC2,
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.pe_code = 0xfc
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},
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{PMC_EV_POWER8_L2_LOAD_MISS,
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.pe_flags = PMC_FLAG_PMC2,
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.pe_code = 0xfe
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},
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{PMC_EV_POWER8_STORE_NO_REAL_ADDR,
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.pe_flags = PMC_FLAG_PMC3,
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.pe_code = 0xf0
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},
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{PMC_EV_POWER8_INSTR_COMPLETED_WITH_ALL_THREADS_RUNNING,
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.pe_flags = PMC_FLAG_PMC3,
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.pe_code = 0xf4
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},
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{PMC_EV_POWER8_L1_LOAD_MISS,
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.pe_flags = PMC_FLAG_PMC3,
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.pe_code = 0xf6
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},
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{PMC_EV_POWER8_TIMEBASE_EVENT,
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.pe_flags = PMC_FLAG_PMC3,
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.pe_code = 0xf8
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},
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{PMC_EV_POWER8_L3_INSTR_MISS,
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.pe_flags = PMC_FLAG_PMC3,
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.pe_code = 0xfa
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},
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{PMC_EV_POWER8_TLB_DATA_MISS,
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.pe_flags = PMC_FLAG_PMC3,
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.pe_code = 0xfc
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},
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{PMC_EV_POWER8_L3_LOAD_MISS,
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.pe_flags = PMC_FLAG_PMC3,
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.pe_code = 0xfe
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},
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{PMC_EV_POWER8_LOAD_NO_REAL_ADDR,
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.pe_flags = PMC_FLAG_PMC4,
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.pe_code = 0xf0
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},
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{PMC_EV_POWER8_CYCLES_WITH_INSTRS_DISPATCHED,
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.pe_flags = PMC_FLAG_PMC4,
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.pe_code = 0xf2
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},
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{PMC_EV_POWER8_CYCLES_RUNNING_PURR_INC,
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.pe_flags = PMC_FLAG_PMC4,
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.pe_code = 0xf4
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},
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{PMC_EV_POWER8_BRANCH_MISPREDICTED,
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.pe_flags = PMC_FLAG_PMC4,
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.pe_code = 0xf6
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},
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{PMC_EV_POWER8_PREFETCHED_INSTRS_DISCARDED,
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.pe_flags = PMC_FLAG_PMC4,
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.pe_code = 0xf8
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},
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{PMC_EV_POWER8_INSTR_COMPLETED_RUNNING,
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.pe_flags = PMC_FLAG_PMC4,
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.pe_code = 0xfa
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},
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{PMC_EV_POWER8_TLB_INSTR_MISS,
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.pe_flags = PMC_FLAG_PMC4,
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.pe_code = 0xfc
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},
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{PMC_EV_POWER8_CACHE_LOAD_MISS,
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.pe_flags = PMC_FLAG_PMC4,
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.pe_code = 0xfe
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}
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};
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static size_t power8_event_codes_size = nitems(power8_event_codes);
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static void
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power8_set_pmc(int cpu, int ri, int config)
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{
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register_t mmcr;
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/* Select event */
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switch (ri) {
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case 0:
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case 1:
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case 2:
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case 3:
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mmcr = mfspr(SPR_MMCR1);
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mmcr &= ~SPR_MMCR1_P8_PMCNSEL_MASK(ri);
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mmcr |= SPR_MMCR1_P8_PMCNSEL(ri, config & ~POWERPC_PMC_ENABLE);
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mtspr(SPR_MMCR1, mmcr);
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break;
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}
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/*
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* By default, freeze counter in all states.
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* If counter is being started, unfreeze it in selected states.
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*/
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mmcr = mfspr(SPR_MMCR2) | SPR_MMCR2_FCNHSP(ri);
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if (config != PMCN_NONE) {
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if (config & POWERPC_PMC_USER_ENABLE)
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mmcr &= ~(SPR_MMCR2_FCNP0(ri) |
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SPR_MMCR2_FCNP1(ri));
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if (config & POWERPC_PMC_KERNEL_ENABLE)
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mmcr &= ~(SPR_MMCR2_FCNH(ri) |
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SPR_MMCR2_FCNS(ri));
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}
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mtspr(SPR_MMCR2, mmcr);
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}
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static int
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power8_pcpu_init(struct pmc_mdep *md, int cpu)
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{
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register_t mmcr0;
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int i;
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powerpc_pcpu_init(md, cpu);
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/* Freeze all counters before modifying PMC registers */
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mmcr0 = mfspr(SPR_MMCR0) | SPR_MMCR0_FC;
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mtspr(SPR_MMCR0, mmcr0);
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/*
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* Now setup MMCR0:
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* - PMAO=0: clear alerts
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* - FCPC=0, FCP=0: don't freeze counters in problem state
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* - FCECE: Freeze Counters on Enabled Condition or Event
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* - PMC1CE/PMCNCE: PMC1/N Condition Enable
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*/
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mmcr0 &= ~(SPR_MMCR0_PMAO | SPR_MMCR0_FCPC | SPR_MMCR0_FCP);
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mmcr0 |= SPR_MMCR0_FCECE | SPR_MMCR0_PMC1CE | SPR_MMCR0_PMCNCE;
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mtspr(SPR_MMCR0, mmcr0);
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/* Clear all PMCs to prevent enabled condition interrupts */
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for (i = 0; i < POWER8_MAX_PMCS; i++)
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powerpc_pmcn_write(i, 0);
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/* Disable events in PMCs 1-4 */
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mtspr(SPR_MMCR1, mfspr(SPR_MMCR1) & ~SPR_MMCR1_P8_PMCSEL_ALL);
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/* Freeze each counter, in all states */
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mtspr(SPR_MMCR2, mfspr(SPR_MMCR2) |
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SPR_MMCR2_FCNHSP(0) | SPR_MMCR2_FCNHSP(1) | SPR_MMCR2_FCNHSP(2) |
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SPR_MMCR2_FCNHSP(3) | SPR_MMCR2_FCNHSP(4) | SPR_MMCR2_FCNHSP(5));
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/* Enable interrupts, unset global freeze */
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mmcr0 &= ~SPR_MMCR0_FC;
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mmcr0 |= SPR_MMCR0_PMAE;
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mtspr(SPR_MMCR0, mmcr0);
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return (0);
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}
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static int
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power8_pcpu_fini(struct pmc_mdep *md, int cpu)
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{
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register_t mmcr0;
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/* Freeze counters, disable interrupts */
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mmcr0 = mfspr(SPR_MMCR0);
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mmcr0 &= ~SPR_MMCR0_PMAE;
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mmcr0 |= SPR_MMCR0_FC;
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mtspr(SPR_MMCR0, mmcr0);
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return (powerpc_pcpu_fini(md, cpu));
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}
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static void
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power8_resume_pmc(bool ie)
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{
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register_t mmcr0;
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/* Unfreeze counters and re-enable PERF exceptions if requested. */
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mmcr0 = mfspr(SPR_MMCR0);
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mmcr0 &= ~(SPR_MMCR0_FC | SPR_MMCR0_PMAO | SPR_MMCR0_PMAE);
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if (ie)
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mmcr0 |= SPR_MMCR0_PMAE;
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mtspr(SPR_MMCR0, mmcr0);
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}
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int
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pmc_power8_initialize(struct pmc_mdep *pmc_mdep)
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{
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struct pmc_classdep *pcd;
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pmc_mdep->pmd_cputype = PMC_CPU_PPC_POWER8;
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pcd = &pmc_mdep->pmd_classdep[PMC_MDEP_CLASS_INDEX_POWERPC];
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pcd->pcd_caps = POWERPC_PMC_CAPS;
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pcd->pcd_class = PMC_CLASS_POWER8;
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pcd->pcd_num = POWER8_MAX_PMCS;
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pcd->pcd_ri = pmc_mdep->pmd_npmc;
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pcd->pcd_width = 32;
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pcd->pcd_pcpu_init = power8_pcpu_init;
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pcd->pcd_pcpu_fini = power8_pcpu_fini;
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pcd->pcd_allocate_pmc = powerpc_allocate_pmc;
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pcd->pcd_release_pmc = powerpc_release_pmc;
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pcd->pcd_start_pmc = powerpc_start_pmc;
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pcd->pcd_stop_pmc = powerpc_stop_pmc;
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pcd->pcd_get_config = powerpc_get_config;
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pcd->pcd_config_pmc = powerpc_config_pmc;
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pcd->pcd_describe = powerpc_describe;
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pcd->pcd_read_pmc = powerpc_read_pmc;
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pcd->pcd_write_pmc = powerpc_write_pmc;
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pmc_mdep->pmd_npmc += POWER8_MAX_PMCS;
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pmc_mdep->pmd_intr = powerpc_pmc_intr;
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ppc_event_codes = power8_event_codes;
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ppc_event_codes_size = power8_event_codes_size;
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ppc_event_first = PMC_EV_POWER8_FIRST;
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ppc_event_last = PMC_EV_POWER8_LAST;
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ppc_max_pmcs = POWER8_MAX_PMCS;
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powerpc_set_pmc = power8_set_pmc;
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powerpc_pmcn_read = powerpc_pmcn_read_default;
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powerpc_pmcn_write = powerpc_pmcn_write_default;
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powerpc_resume_pmc = power8_resume_pmc;
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return (0);
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}
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