e9340d96fa
ioccom.h defines only implementation detail, and should therefore only be included from the #include which defines the ioctl tags, in other words: never include it from *.c
516 lines
12 KiB
C
516 lines
12 KiB
C
/*
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* Copyright (c) 1997, 1999 Hellmuth Michaelis. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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*---------------------------------------------------------------------------
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*
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* i4b_isic.c - global isic stuff
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* ==============================
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*
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* $Id: i4b_isic.c,v 1.3 1999/12/13 21:25:26 hm Exp $
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*
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* $FreeBSD$
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*
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* last edit-date: [Mon Dec 13 22:01:33 1999]
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*
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*---------------------------------------------------------------------------*/
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#include "isic.h"
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#include "opt_i4b.h"
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#if NISIC > 0
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/mbuf.h>
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#include <sys/socket.h>
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#include <net/if.h>
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#include <machine/clock.h>
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#include <machine/i4b_debug.h>
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#include <machine/i4b_ioctl.h>
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#include <machine/i4b_trace.h>
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#include <i4b/layer1/i4b_l1.h>
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#include <i4b/layer1/i4b_ipac.h>
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#include <i4b/layer1/i4b_isac.h>
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#include <i4b/layer1/i4b_hscx.h>
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#include <i4b/include/i4b_l1l2.h>
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#include <i4b/include/i4b_mbuf.h>
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#include <i4b/include/i4b_global.h>
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void isic_settrace(int unit, int val);
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int isic_gettrace(int unit);
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static char *ISACversion[] = {
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"2085 Version A1/A2 or 2086/2186 Version 1.1",
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"2085 Version B1",
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"2085 Version B2",
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"2085 Version V2.3 (B3)",
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"Unknown Version"
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};
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static char *HSCXversion[] = {
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"82525 Version A1",
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"Unknown (0x01)",
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"82525 Version A2",
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"Unknown (0x03)",
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"82525 Version A3",
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"82525 or 21525 Version 2.1",
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"Unknown Version"
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};
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/*---------------------------------------------------------------------------*
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* isic - device driver interrupt routine
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*---------------------------------------------------------------------------*/
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void
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isicintr(struct l1_softc *sc)
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{
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if(sc->sc_ipac == 0) /* HSCX/ISAC interupt routine */
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{
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u_char was_hscx_irq = 0;
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u_char was_isac_irq = 0;
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register u_char hscx_irq_stat;
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register u_char isac_irq_stat;
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for(;;)
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{
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/* get hscx irq status from hscx b ista */
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hscx_irq_stat =
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HSCX_READ(HSCX_CH_B, H_ISTA) & ~HSCX_B_IMASK;
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/* get isac irq status */
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isac_irq_stat = ISAC_READ(I_ISTA);
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/* do as long as there are pending irqs in the chips */
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if(!hscx_irq_stat && !isac_irq_stat)
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break;
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if(hscx_irq_stat & (HSCX_ISTA_RME | HSCX_ISTA_RPF |
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HSCX_ISTA_RSC | HSCX_ISTA_XPR |
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HSCX_ISTA_TIN | HSCX_ISTA_EXB))
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{
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isic_hscx_irq(sc, hscx_irq_stat,
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HSCX_CH_B,
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hscx_irq_stat & HSCX_ISTA_EXB);
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was_hscx_irq = 1;
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}
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if(hscx_irq_stat & (HSCX_ISTA_ICA | HSCX_ISTA_EXA))
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{
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isic_hscx_irq(sc,
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HSCX_READ(HSCX_CH_A, H_ISTA) & ~HSCX_A_IMASK,
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HSCX_CH_A,
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hscx_irq_stat & HSCX_ISTA_EXA);
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was_hscx_irq = 1;
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}
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if(isac_irq_stat)
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{
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isic_isac_irq(sc, isac_irq_stat); /* isac handler */
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was_isac_irq = 1;
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}
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}
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HSCX_WRITE(0, H_MASK, 0xff);
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ISAC_WRITE(I_MASK, 0xff);
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HSCX_WRITE(1, H_MASK, 0xff);
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#ifdef ELSA_QS1ISA
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DELAY(80);
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if((sc->sc_cardtyp == CARD_TYPEP_ELSAQS1ISA) && (sc->clearirq))
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{
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sc->clearirq(sc);
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}
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#else
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DELAY(100);
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#endif
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HSCX_WRITE(0, H_MASK, HSCX_A_IMASK);
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ISAC_WRITE(I_MASK, ISAC_IMASK);
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HSCX_WRITE(1, H_MASK, HSCX_B_IMASK);
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}
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else /* IPAC interrupt routine */
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{
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register u_char ipac_irq_stat;
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register u_char was_ipac_irq = 0;
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for(;;)
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{
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/* get global irq status */
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ipac_irq_stat = (IPAC_READ(IPAC_ISTA)) & 0x3f;
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/* check hscx a */
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if(ipac_irq_stat & (IPAC_ISTA_ICA | IPAC_ISTA_EXA))
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{
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/* HSCX A interrupt */
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isic_hscx_irq(sc, HSCX_READ(HSCX_CH_A, H_ISTA),
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HSCX_CH_A,
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ipac_irq_stat & IPAC_ISTA_EXA);
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was_ipac_irq = 1;
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}
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if(ipac_irq_stat & (IPAC_ISTA_ICB | IPAC_ISTA_EXB))
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{
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/* HSCX B interrupt */
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isic_hscx_irq(sc, HSCX_READ(HSCX_CH_B, H_ISTA),
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HSCX_CH_B,
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ipac_irq_stat & IPAC_ISTA_EXB);
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was_ipac_irq = 1;
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}
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if(ipac_irq_stat & IPAC_ISTA_ICD)
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{
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/* ISAC interrupt */
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isic_isac_irq(sc, ISAC_READ(I_ISTA));
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was_ipac_irq = 1;
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}
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if(ipac_irq_stat & IPAC_ISTA_EXD)
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{
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/* force ISAC interrupt handling */
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isic_isac_irq(sc, ISAC_ISTA_EXI);
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was_ipac_irq = 1;
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}
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/* do as long as there are pending irqs in the chip */
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if(!ipac_irq_stat)
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break;
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}
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IPAC_WRITE(IPAC_MASK, 0xff);
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DELAY(50);
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IPAC_WRITE(IPAC_MASK, 0xc0);
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}
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}
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/*---------------------------------------------------------------------------*
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* isic_settrace
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*---------------------------------------------------------------------------*/
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void
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isic_settrace(int unit, int val)
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{
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struct l1_softc *sc = &l1_sc[unit];
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sc->sc_trace = val;
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}
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/*---------------------------------------------------------------------------*
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* isic_gettrace
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*---------------------------------------------------------------------------*/
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int
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isic_gettrace(int unit)
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{
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struct l1_softc *sc = &l1_sc[unit];
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return(sc->sc_trace);
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}
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/*---------------------------------------------------------------------------*
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* isic_recover - try to recover from irq lockup
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*---------------------------------------------------------------------------*/
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void
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isic_recover(struct l1_softc *sc)
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{
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u_char byte;
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/* get hscx irq status from hscx b ista */
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byte = HSCX_READ(HSCX_CH_B, H_ISTA);
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DBGL1(L1_ERROR, "isic_recover", ("HSCX B: ISTA = 0x%x\n", byte));
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if(byte & HSCX_ISTA_ICA)
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DBGL1(L1_ERROR, "isic_recover", ("HSCX A: ISTA = 0x%x\n", (u_char)HSCX_READ(HSCX_CH_A, H_ISTA)));
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if(byte & HSCX_ISTA_EXB)
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DBGL1(L1_ERROR, "isic_recover", ("HSCX B: EXIR = 0x%x\n", (u_char)HSCX_READ(HSCX_CH_B, H_EXIR)));
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if(byte & HSCX_ISTA_EXA)
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DBGL1(L1_ERROR, "isic_recover", ("HSCX A: EXIR = 0x%x\n", (u_char)HSCX_READ(HSCX_CH_A, H_EXIR)));
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/* get isac irq status */
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byte = ISAC_READ(I_ISTA);
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DBGL1(L1_ERROR, "isic_recover", (" ISAC: ISTA = 0x%x\n", byte));
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if(byte & ISAC_ISTA_EXI)
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DBGL1(L1_ERROR, "isic_recover", (" ISAC: EXIR = 0x%x\n", (u_char)ISAC_READ(I_EXIR)));
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if(byte & ISAC_ISTA_CISQ)
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{
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byte = ISAC_READ(I_CIRR);
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DBGL1(L1_ERROR, "isic_recover", (" ISAC: CISQ = 0x%x\n", byte));
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if(byte & ISAC_CIRR_SQC)
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DBGL1(L1_ERROR, "isic_recover", (" ISAC: SQRR = 0x%x\n", (u_char)ISAC_READ(I_SQRR)));
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}
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DBGL1(L1_ERROR, "isic_recover", ("HSCX B: IMASK = 0x%x\n", HSCX_B_IMASK));
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DBGL1(L1_ERROR, "isic_recover", ("HSCX A: IMASK = 0x%x\n", HSCX_A_IMASK));
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HSCX_WRITE(0, H_MASK, 0xff);
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HSCX_WRITE(1, H_MASK, 0xff);
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DELAY(100);
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HSCX_WRITE(0, H_MASK, HSCX_A_IMASK);
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HSCX_WRITE(1, H_MASK, HSCX_B_IMASK);
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DELAY(100);
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DBGL1(L1_ERROR, "isic_recover", (" ISAC: IMASK = 0x%x\n", ISAC_IMASK));
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ISAC_WRITE(I_MASK, 0xff);
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DELAY(100);
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ISAC_WRITE(I_MASK, ISAC_IMASK);
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}
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/*---------------------------------------------------------------------------*
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* isic_attach_common - common attach routine for all busses
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*---------------------------------------------------------------------------*/
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int
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isic_attach_common(device_t dev)
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{
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int ret;
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char *drvid = NULL;
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int unit = device_get_unit(dev);
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struct l1_softc *sc = &l1_sc[unit];
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sc->sc_unit = unit;
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sc->sc_isac_version = 0;
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sc->sc_hscx_version = 0;
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if(sc->sc_ipac)
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{
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ret = IPAC_READ(IPAC_ID);
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switch(ret)
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{
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case 0x01:
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break;
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default:
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printf("isic%d: Error, IPAC version %d unknown!\n",
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unit, ret);
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return ENXIO;
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break;
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}
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}
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else
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{
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sc->sc_isac_version = ((ISAC_READ(I_RBCH)) >> 5) & 0x03;
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switch(sc->sc_isac_version)
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{
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case ISAC_VA:
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case ISAC_VB1:
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case ISAC_VB2:
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case ISAC_VB3:
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break;
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default:
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printf("isic%d: Error, ISAC version %d unknown!\n",
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unit, sc->sc_isac_version);
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return ENXIO;
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break;
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}
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sc->sc_hscx_version = HSCX_READ(0, H_VSTR) & 0xf;
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switch(sc->sc_hscx_version)
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{
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case HSCX_VA1:
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case HSCX_VA2:
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case HSCX_VA3:
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case HSCX_V21:
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break;
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default:
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printf("isic%d: Error, HSCX version %d unknown!\n",
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unit, sc->sc_hscx_version);
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return ENXIO;
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break;
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}
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}
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isic_isac_init(sc); /* ISAC setup */
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/* HSCX setup */
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isic_bchannel_setup(sc->sc_unit, HSCX_CH_A, BPROT_NONE, 0);
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isic_bchannel_setup(sc->sc_unit, HSCX_CH_B, BPROT_NONE, 0);
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isic_init_linktab(sc); /* setup linktab */
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sc->sc_trace = TRACE_OFF; /* set trace level */
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sc->sc_state = ISAC_IDLE; /* set state */
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sc->sc_ibuf = NULL; /* input buffering */
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sc->sc_ib = NULL;
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sc->sc_ilen = 0;
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sc->sc_obuf = NULL; /* output buffering */
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sc->sc_op = NULL;
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sc->sc_ol = 0;
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sc->sc_freeflag = 0;
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sc->sc_obuf2 = NULL; /* second output buffer */
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sc->sc_freeflag2 = 0;
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/* timer setup */
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callout_handle_init(&sc->sc_T3_callout);
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callout_handle_init(&sc->sc_T4_callout);
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/* init higher protocol layers */
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MPH_Status_Ind(sc->sc_unit, STI_ATTACH, sc->sc_cardtyp);
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/* announce manufacturer and card type for ISA cards */
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switch(sc->sc_flags)
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{
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case FLAG_TELES_S0_8:
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drvid = "Teles S0/8 (or compatible)";
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break;
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case FLAG_TELES_S0_16:
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drvid = "Teles S0/16 (or compatible)";
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break;
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case FLAG_TELES_S0_163:
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drvid = "Teles S0/16.3";
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break;
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case FLAG_AVM_A1:
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drvid = "AVM A1 or Fritz!Card Classic";
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break;
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case FLAG_AVM_A1_PCMCIA:
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drvid = "AVM Fritz!Card PCMCIA";
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break;
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case FLAG_USR_ISDN_TA_INT:
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drvid = "USRobotics Sportster ISDN TA intern";
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break;
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case FLAG_ITK_IX1:
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drvid = "ITK ix1 micro";
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break;
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case FLAG_ELSA_PCC16:
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drvid = "ELSA MicroLink ISDN/PCC-16";
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break;
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default:
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drvid = NULL; /* pnp/pci cards announce themselves */
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break;
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}
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if(drvid)
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printf("isic%d: %s\n", unit, drvid);
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if(bootverbose)
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{
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/* announce chip versions */
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if(sc->sc_ipac)
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{
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printf("isic%d: IPAC PSB2115 Version 1.1\n", unit);
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}
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else
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{
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printf("isic%d: ISAC %s (IOM-%c)\n",
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unit,
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ISACversion[sc->sc_isac_version],
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sc->sc_bustyp == BUS_TYPE_IOM1 ? '1' : '2');
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printf("isic%d: HSCX %s\n",
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unit,
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HSCXversion[sc->sc_hscx_version]);
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}
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}
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return 0;
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}
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/*---------------------------------------------------------------------------*
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* isic_detach_common - common detach routine for all busses
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*---------------------------------------------------------------------------*/
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void
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isic_detach_common(device_t dev)
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{
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struct l1_softc *sc = &l1_sc[device_get_unit(dev)];
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int i;
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sc->sc_flags = 0;
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/* free interrupt resources */
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if(sc->sc_resources.irq)
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{
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/* tear down interupt handler */
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bus_teardown_intr(dev, sc->sc_resources.irq,
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(void(*)(void *))isicintr);
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/* free irq */
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bus_release_resource(dev, SYS_RES_IRQ,
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sc->sc_resources.irq_rid,
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sc->sc_resources.irq);
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sc->sc_resources.irq_rid = 0;
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sc->sc_resources.irq = 0;
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}
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/* free memory resource */
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if(sc->sc_resources.mem)
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{
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bus_release_resource(dev,SYS_RES_MEMORY,
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sc->sc_resources.mem_rid,
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sc->sc_resources.mem);
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sc->sc_resources.mem_rid = 0;
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sc->sc_resources.mem = 0;
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}
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/* free iobases */
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for(i=0; i < INFO_IO_BASES ; i++)
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{
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if(sc->sc_resources.io_base[i])
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{
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bus_release_resource(dev, SYS_RES_IOPORT,
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sc->sc_resources.io_rid[i],
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sc->sc_resources.io_base[i]);
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sc->sc_resources.io_rid[i] = 0;
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sc->sc_resources.io_base[i] = 0;
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}
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}
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}
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#endif /* NISIC > 0 */
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