94bc2117b4
- Add CCM driver and clocks implementations for i.MX 8M - Add GPC driver for iMX8 - Add clock tree for i.MX 8M Quad - Add clocks support and new compat strings (where required) for existing i.MX 6 UART, I2C, and GPIO drivers - Enable aarch64-compatible drivers form i.MX 6 in arm64 GENERIC kernel config - Add dtb/imx8 kernel module with DTBs for Nitrogen8M and iMX8MQ EVK With this patch both Nitrogen8M and iMX8MQ EVK boot with NFS root up to multiuser login prompt Reviewed by: manu Differential Revision: https://reviews.freebsd.org/D25274
118 lines
3.5 KiB
C
118 lines
3.5 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
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*
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* Copyright 2016 Michal Meloun <mmel@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <dev/extres/clk/clk.h>
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#include <arm64/freescale/imx/clk/imx_clk_gate.h>
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#include "clkdev_if.h"
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#define WR4(_clk, off, val) \
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CLKDEV_WRITE_4(clknode_get_device(_clk), off, val)
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#define RD4(_clk, off, val) \
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CLKDEV_READ_4(clknode_get_device(_clk), off, val)
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#define MD4(_clk, off, clr, set ) \
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CLKDEV_MODIFY_4(clknode_get_device(_clk), off, clr, set)
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#define DEVICE_LOCK(_clk) \
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CLKDEV_DEVICE_LOCK(clknode_get_device(_clk))
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#define DEVICE_UNLOCK(_clk) \
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CLKDEV_DEVICE_UNLOCK(clknode_get_device(_clk))
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static int imx_clk_gate_init(struct clknode *clk, device_t dev);
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static int imx_clk_gate_set_gate(struct clknode *clk, bool enable);
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struct imx_clk_gate_sc {
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uint32_t offset;
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uint32_t shift;
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uint32_t mask;
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int gate_flags;
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};
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static clknode_method_t imx_clk_gate_methods[] = {
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/* Device interface */
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CLKNODEMETHOD(clknode_init, imx_clk_gate_init),
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CLKNODEMETHOD(clknode_set_gate, imx_clk_gate_set_gate),
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CLKNODEMETHOD_END
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};
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DEFINE_CLASS_1(imx_clk_gate, imx_clk_gate_class, imx_clk_gate_methods,
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sizeof(struct imx_clk_gate_sc), clknode_class);
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static int
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imx_clk_gate_init(struct clknode *clk, device_t dev)
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{
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clknode_init_parent_idx(clk, 0);
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return(0);
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}
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static int
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imx_clk_gate_set_gate(struct clknode *clk, bool enable)
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{
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uint32_t reg;
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struct imx_clk_gate_sc *sc;
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int rv;
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sc = clknode_get_softc(clk);
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DEVICE_LOCK(clk);
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rv = MD4(clk, sc->offset, sc->mask << sc->shift,
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(enable ? sc->mask : 0) << sc->shift);
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if (rv != 0) {
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DEVICE_UNLOCK(clk);
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return (rv);
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}
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RD4(clk, sc->offset, ®);
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DEVICE_UNLOCK(clk);
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return(0);
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}
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int
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imx_clk_gate_register(struct clkdom *clkdom, struct imx_clk_gate_def *clkdef)
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{
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struct clknode *clk;
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struct imx_clk_gate_sc *sc;
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clk = clknode_create(clkdom, &imx_clk_gate_class, &clkdef->clkdef);
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if (clk == NULL)
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return (1);
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sc = clknode_get_softc(clk);
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sc->offset = clkdef->offset;
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sc->shift = clkdef->shift;
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sc->mask = clkdef->mask;
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sc->gate_flags = clkdef->gate_flags;
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clknode_register(clkdom, clk);
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return (0);
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}
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