cdcd52d41e
This is an initial commit for RDMA FreeBSD driver for Intel(R) Ethernet Controller E810, called irdma. Supporting both RoCEv2 and iWARP protocols in per-PF manner, RoCEv2 being the default. Testing has been done using krping tool, perftest, ucmatose, rping, ud_pingpong, rc_pingpong and others. Signed-off-by: Eric Joyner <erj@FreeBSD.org> Reviewed by: #manpages (pauamma_gundo.com) [documentation] MFC after: 1 week Relnotes: yes Sponsored by: Intel Corporation Differential Revision: https://reviews.freebsd.org/D34690
203 lines
5.6 KiB
C
203 lines
5.6 KiB
C
/*-
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* SPDX-License-Identifier: GPL-2.0 or Linux-OpenIB
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*
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* Copyright (c) 2015 - 2021 Intel Corporation
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the
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* OpenFabrics.org BSD license below:
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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*
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* - Redistributions of source code must retain the above
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* copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* - Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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/*$FreeBSD$*/
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#ifndef IRDMA_HMC_H
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#define IRDMA_HMC_H
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#include "irdma_defs.h"
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#define IRDMA_HMC_MAX_BP_COUNT 512
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#define IRDMA_MAX_SD_ENTRIES 11
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#define IRDMA_HW_DBG_HMC_INVALID_BP_MARK 0xca
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#define IRDMA_HMC_INFO_SIGNATURE 0x484d5347
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#define IRDMA_HMC_PD_CNT_IN_SD 512
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#define IRDMA_HMC_DIRECT_BP_SIZE 0x200000
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#define IRDMA_HMC_MAX_SD_COUNT 8192
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#define IRDMA_HMC_PAGED_BP_SIZE 4096
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#define IRDMA_HMC_PD_BP_BUF_ALIGNMENT 4096
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#define IRDMA_FIRST_VF_FPM_ID 8
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#define FPM_MULTIPLIER 1024
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enum irdma_hmc_rsrc_type {
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IRDMA_HMC_IW_QP = 0,
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IRDMA_HMC_IW_CQ = 1,
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IRDMA_HMC_IW_RESERVED = 2,
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IRDMA_HMC_IW_HTE = 3,
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IRDMA_HMC_IW_ARP = 4,
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IRDMA_HMC_IW_APBVT_ENTRY = 5,
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IRDMA_HMC_IW_MR = 6,
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IRDMA_HMC_IW_XF = 7,
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IRDMA_HMC_IW_XFFL = 8,
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IRDMA_HMC_IW_Q1 = 9,
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IRDMA_HMC_IW_Q1FL = 10,
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IRDMA_HMC_IW_TIMER = 11,
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IRDMA_HMC_IW_FSIMC = 12,
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IRDMA_HMC_IW_FSIAV = 13,
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IRDMA_HMC_IW_PBLE = 14,
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IRDMA_HMC_IW_RRF = 15,
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IRDMA_HMC_IW_RRFFL = 16,
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IRDMA_HMC_IW_HDR = 17,
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IRDMA_HMC_IW_MD = 18,
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IRDMA_HMC_IW_OOISC = 19,
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IRDMA_HMC_IW_OOISCFFL = 20,
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IRDMA_HMC_IW_MAX, /* Must be last entry */
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};
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enum irdma_sd_entry_type {
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IRDMA_SD_TYPE_INVALID = 0,
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IRDMA_SD_TYPE_PAGED = 1,
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IRDMA_SD_TYPE_DIRECT = 2,
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};
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struct irdma_hmc_obj_info {
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u64 base;
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u32 max_cnt;
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u32 cnt;
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u64 size;
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};
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struct irdma_hmc_bp {
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enum irdma_sd_entry_type entry_type;
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struct irdma_dma_mem addr;
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u32 sd_pd_index;
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u32 use_cnt;
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};
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struct irdma_hmc_pd_entry {
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struct irdma_hmc_bp bp;
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u32 sd_index;
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bool rsrc_pg:1;
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bool valid:1;
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};
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struct irdma_hmc_pd_table {
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struct irdma_dma_mem pd_page_addr;
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struct irdma_hmc_pd_entry *pd_entry;
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struct irdma_virt_mem pd_entry_virt_mem;
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u32 use_cnt;
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u32 sd_index;
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};
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struct irdma_hmc_sd_entry {
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enum irdma_sd_entry_type entry_type;
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bool valid;
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union {
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struct irdma_hmc_pd_table pd_table;
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struct irdma_hmc_bp bp;
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} u;
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};
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struct irdma_hmc_sd_table {
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struct irdma_virt_mem addr;
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u32 sd_cnt;
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u32 use_cnt;
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struct irdma_hmc_sd_entry *sd_entry;
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};
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struct irdma_hmc_info {
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u32 signature;
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u8 hmc_fn_id;
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u16 first_sd_index;
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struct irdma_hmc_obj_info *hmc_obj;
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struct irdma_virt_mem hmc_obj_virt_mem;
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struct irdma_hmc_sd_table sd_table;
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u16 sd_indexes[IRDMA_HMC_MAX_SD_COUNT];
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};
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struct irdma_update_sd_entry {
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u64 cmd;
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u64 data;
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};
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struct irdma_update_sds_info {
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u32 cnt;
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u8 hmc_fn_id;
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struct irdma_update_sd_entry entry[IRDMA_MAX_SD_ENTRIES];
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};
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struct irdma_ccq_cqe_info;
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struct irdma_hmc_fcn_info {
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u32 vf_id;
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u8 free_fcn;
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};
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struct irdma_hmc_create_obj_info {
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struct irdma_hmc_info *hmc_info;
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struct irdma_virt_mem add_sd_virt_mem;
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u32 rsrc_type;
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u32 start_idx;
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u32 count;
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u32 add_sd_cnt;
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enum irdma_sd_entry_type entry_type;
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bool privileged;
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};
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struct irdma_hmc_del_obj_info {
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struct irdma_hmc_info *hmc_info;
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struct irdma_virt_mem del_sd_virt_mem;
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u32 rsrc_type;
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u32 start_idx;
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u32 count;
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u32 del_sd_cnt;
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bool privileged;
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};
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int irdma_copy_dma_mem(struct irdma_hw *hw, void *dest_buf,
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struct irdma_dma_mem *src_mem, u64 src_offset, u64 size);
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int irdma_sc_create_hmc_obj(struct irdma_sc_dev *dev,
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struct irdma_hmc_create_obj_info *info);
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int irdma_sc_del_hmc_obj(struct irdma_sc_dev *dev,
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struct irdma_hmc_del_obj_info *info, bool reset);
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int irdma_hmc_sd_one(struct irdma_sc_dev *dev, u8 hmc_fn_id, u64 pa, u32 sd_idx,
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enum irdma_sd_entry_type type,
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bool setsd);
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int irdma_update_sds_noccq(struct irdma_sc_dev *dev,
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struct irdma_update_sds_info *info);
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struct irdma_vfdev *irdma_vfdev_from_fpm(struct irdma_sc_dev *dev,
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u8 hmc_fn_id);
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struct irdma_hmc_info *irdma_vf_hmcinfo_from_fpm(struct irdma_sc_dev *dev,
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u8 hmc_fn_id);
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int irdma_add_sd_table_entry(struct irdma_hw *hw,
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struct irdma_hmc_info *hmc_info, u32 sd_index,
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enum irdma_sd_entry_type type, u64 direct_mode_sz);
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int irdma_add_pd_table_entry(struct irdma_sc_dev *dev,
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struct irdma_hmc_info *hmc_info, u32 pd_index,
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struct irdma_dma_mem *rsrc_pg);
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int irdma_remove_pd_bp(struct irdma_sc_dev *dev,
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struct irdma_hmc_info *hmc_info, u32 idx);
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int irdma_prep_remove_sd_bp(struct irdma_hmc_info *hmc_info, u32 idx);
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int irdma_prep_remove_pd_page(struct irdma_hmc_info *hmc_info, u32 idx);
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#endif /* IRDMA_HMC_H */
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