0ecc2ff0e8
Fixes: - flow control - don't override user value on re-init - fix to make 1G optics work correctly - change to interrupt enabling - some bits were incorrect for certain hardware. - certain stats fixes, remove a duplicate increment of ierror, thanks to Scott Long for pointing these out. - shared code link interface changed, requiring some core code changes to accomodate this. - add an m_adj() to ETHER_ALIGN on the recieve side, this was requested by Mike Karels, thanks Mike. - Multicast code corrections also thanks to Mike Karels.
612 lines
18 KiB
C
612 lines
18 KiB
C
/******************************************************************************
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Copyright (c) 2001-2013, Intel Corporation
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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1. Redistributions of source code must retain the above copyright notice,
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this list of conditions and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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3. Neither the name of the Intel Corporation nor the names of its
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contributors may be used to endorse or promote products derived from
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this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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POSSIBILITY OF SUCH DAMAGE.
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******************************************************************************/
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/*$FreeBSD$*/
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#include "ixgbe_api.h"
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#include "ixgbe_type.h"
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#include "ixgbe_vf.h"
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#ifndef IXGBE_VFWRITE_REG
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#define IXGBE_VFWRITE_REG IXGBE_WRITE_REG
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#endif
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#ifndef IXGBE_VFREAD_REG
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#define IXGBE_VFREAD_REG IXGBE_READ_REG
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#endif
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/**
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* ixgbe_init_ops_vf - Initialize the pointers for vf
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* @hw: pointer to hardware structure
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*
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* This will assign function pointers, adapter-specific functions can
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* override the assignment of generic function pointers by assigning
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* their own adapter-specific function pointers.
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* Does not touch the hardware.
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**/
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s32 ixgbe_init_ops_vf(struct ixgbe_hw *hw)
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{
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/* MAC */
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hw->mac.ops.init_hw = ixgbe_init_hw_vf;
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hw->mac.ops.reset_hw = ixgbe_reset_hw_vf;
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hw->mac.ops.start_hw = ixgbe_start_hw_vf;
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/* Cannot clear stats on VF */
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hw->mac.ops.clear_hw_cntrs = NULL;
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hw->mac.ops.get_media_type = NULL;
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hw->mac.ops.get_mac_addr = ixgbe_get_mac_addr_vf;
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hw->mac.ops.stop_adapter = ixgbe_stop_adapter_vf;
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hw->mac.ops.get_bus_info = NULL;
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/* Link */
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hw->mac.ops.setup_link = ixgbe_setup_mac_link_vf;
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hw->mac.ops.check_link = ixgbe_check_mac_link_vf;
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hw->mac.ops.get_link_capabilities = NULL;
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/* RAR, Multicast, VLAN */
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hw->mac.ops.set_rar = ixgbe_set_rar_vf;
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hw->mac.ops.set_uc_addr = ixgbevf_set_uc_addr_vf;
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hw->mac.ops.init_rx_addrs = NULL;
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hw->mac.ops.update_mc_addr_list = ixgbe_update_mc_addr_list_vf;
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hw->mac.ops.enable_mc = NULL;
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hw->mac.ops.disable_mc = NULL;
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hw->mac.ops.clear_vfta = NULL;
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hw->mac.ops.set_vfta = ixgbe_set_vfta_vf;
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hw->mac.max_tx_queues = 1;
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hw->mac.max_rx_queues = 1;
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hw->mbx.ops.init_params = ixgbe_init_mbx_params_vf;
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return IXGBE_SUCCESS;
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}
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/**
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* ixgbe_start_hw_vf - Prepare hardware for Tx/Rx
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* @hw: pointer to hardware structure
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*
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* Starts the hardware by filling the bus info structure and media type, clears
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* all on chip counters, initializes receive address registers, multicast
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* table, VLAN filter table, calls routine to set up link and flow control
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* settings, and leaves transmit and receive units disabled and uninitialized
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**/
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s32 ixgbe_start_hw_vf(struct ixgbe_hw *hw)
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{
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/* Clear adapter stopped flag */
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hw->adapter_stopped = FALSE;
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return IXGBE_SUCCESS;
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}
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/**
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* ixgbe_init_hw_vf - virtual function hardware initialization
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* @hw: pointer to hardware structure
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*
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* Initialize the hardware by resetting the hardware and then starting
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* the hardware
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**/
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s32 ixgbe_init_hw_vf(struct ixgbe_hw *hw)
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{
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s32 status = hw->mac.ops.start_hw(hw);
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hw->mac.ops.get_mac_addr(hw, hw->mac.addr);
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return status;
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}
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/**
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* ixgbe_reset_hw_vf - Performs hardware reset
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* @hw: pointer to hardware structure
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*
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* Resets the hardware by reseting the transmit and receive units, masks and
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* clears all interrupts.
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**/
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s32 ixgbe_reset_hw_vf(struct ixgbe_hw *hw)
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{
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struct ixgbe_mbx_info *mbx = &hw->mbx;
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u32 timeout = IXGBE_VF_INIT_TIMEOUT;
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s32 ret_val = IXGBE_ERR_INVALID_MAC_ADDR;
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u32 ctrl, msgbuf[IXGBE_VF_PERMADDR_MSG_LEN];
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u8 *addr = (u8 *)(&msgbuf[1]);
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DEBUGFUNC("ixgbevf_reset_hw_vf");
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/* Call adapter stop to disable tx/rx and clear interrupts */
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hw->mac.ops.stop_adapter(hw);
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DEBUGOUT("Issuing a function level reset to MAC\n");
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ctrl = IXGBE_VFREAD_REG(hw, IXGBE_VFCTRL) | IXGBE_CTRL_RST;
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IXGBE_VFWRITE_REG(hw, IXGBE_VFCTRL, ctrl);
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IXGBE_WRITE_FLUSH(hw);
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msec_delay(50);
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/* we cannot reset while the RSTI / RSTD bits are asserted */
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while (!mbx->ops.check_for_rst(hw, 0) && timeout) {
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timeout--;
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usec_delay(5);
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}
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if (timeout) {
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/* mailbox timeout can now become active */
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mbx->timeout = IXGBE_VF_MBX_INIT_TIMEOUT;
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msgbuf[0] = IXGBE_VF_RESET;
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mbx->ops.write_posted(hw, msgbuf, 1, 0);
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msec_delay(10);
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/*
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* set our "perm_addr" based on info provided by PF
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* also set up the mc_filter_type which is piggy backed
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* on the mac address in word 3
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*/
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ret_val = mbx->ops.read_posted(hw, msgbuf,
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IXGBE_VF_PERMADDR_MSG_LEN, 0);
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if (!ret_val) {
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if (msgbuf[0] == (IXGBE_VF_RESET |
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IXGBE_VT_MSGTYPE_ACK)) {
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memcpy(hw->mac.perm_addr, addr,
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IXGBE_ETH_LENGTH_OF_ADDRESS);
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hw->mac.mc_filter_type =
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msgbuf[IXGBE_VF_MC_TYPE_WORD];
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} else {
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ret_val = IXGBE_ERR_INVALID_MAC_ADDR;
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}
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}
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}
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return ret_val;
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}
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/**
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* ixgbe_stop_adapter_vf - Generic stop Tx/Rx units
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* @hw: pointer to hardware structure
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*
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* Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts,
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* disables transmit and receive units. The adapter_stopped flag is used by
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* the shared code and drivers to determine if the adapter is in a stopped
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* state and should not touch the hardware.
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**/
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s32 ixgbe_stop_adapter_vf(struct ixgbe_hw *hw)
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{
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u32 reg_val;
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u16 i;
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/*
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* Set the adapter_stopped flag so other driver functions stop touching
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* the hardware
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*/
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hw->adapter_stopped = TRUE;
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/* Clear interrupt mask to stop from interrupts being generated */
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IXGBE_VFWRITE_REG(hw, IXGBE_VTEIMC, IXGBE_VF_IRQ_CLEAR_MASK);
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/* Clear any pending interrupts, flush previous writes */
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IXGBE_VFREAD_REG(hw, IXGBE_VTEICR);
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/* Disable the transmit unit. Each queue must be disabled. */
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for (i = 0; i < hw->mac.max_tx_queues; i++)
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IXGBE_VFWRITE_REG(hw, IXGBE_VFTXDCTL(i), IXGBE_TXDCTL_SWFLSH);
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/* Disable the receive unit by stopping each queue */
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for (i = 0; i < hw->mac.max_rx_queues; i++) {
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reg_val = IXGBE_VFREAD_REG(hw, IXGBE_VFRXDCTL(i));
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reg_val &= ~IXGBE_RXDCTL_ENABLE;
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IXGBE_VFWRITE_REG(hw, IXGBE_VFRXDCTL(i), reg_val);
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}
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/* flush all queues disables */
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IXGBE_WRITE_FLUSH(hw);
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msec_delay(2);
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return IXGBE_SUCCESS;
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}
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/**
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* ixgbe_mta_vector - Determines bit-vector in multicast table to set
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* @hw: pointer to hardware structure
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* @mc_addr: the multicast address
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*
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* Extracts the 12 bits, from a multicast address, to determine which
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* bit-vector to set in the multicast table. The hardware uses 12 bits, from
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* incoming rx multicast addresses, to determine the bit-vector to check in
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* the MTA. Which of the 4 combination, of 12-bits, the hardware uses is set
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* by the MO field of the MCSTCTRL. The MO field is set during initialization
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* to mc_filter_type.
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**/
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static s32 ixgbe_mta_vector(struct ixgbe_hw *hw, u8 *mc_addr)
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{
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u32 vector = 0;
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switch (hw->mac.mc_filter_type) {
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case 0: /* use bits [47:36] of the address */
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vector = ((mc_addr[4] >> 4) | (((u16)mc_addr[5]) << 4));
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break;
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case 1: /* use bits [46:35] of the address */
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vector = ((mc_addr[4] >> 3) | (((u16)mc_addr[5]) << 5));
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break;
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case 2: /* use bits [45:34] of the address */
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vector = ((mc_addr[4] >> 2) | (((u16)mc_addr[5]) << 6));
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break;
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case 3: /* use bits [43:32] of the address */
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vector = ((mc_addr[4]) | (((u16)mc_addr[5]) << 8));
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break;
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default: /* Invalid mc_filter_type */
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DEBUGOUT("MC filter type param set incorrectly\n");
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ASSERT(0);
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break;
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}
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/* vector can only be 12-bits or boundary will be exceeded */
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vector &= 0xFFF;
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return vector;
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}
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static void ixgbevf_write_msg_read_ack(struct ixgbe_hw *hw,
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u32 *msg, u16 size)
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{
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struct ixgbe_mbx_info *mbx = &hw->mbx;
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u32 retmsg[IXGBE_VFMAILBOX_SIZE];
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s32 retval = mbx->ops.write_posted(hw, msg, size, 0);
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if (!retval)
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mbx->ops.read_posted(hw, retmsg, size, 0);
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}
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/**
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* ixgbe_set_rar_vf - set device MAC address
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* @hw: pointer to hardware structure
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* @index: Receive address register to write
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* @addr: Address to put into receive address register
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* @vmdq: VMDq "set" or "pool" index
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* @enable_addr: set flag that address is active
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**/
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s32 ixgbe_set_rar_vf(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
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u32 enable_addr)
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{
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struct ixgbe_mbx_info *mbx = &hw->mbx;
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u32 msgbuf[3];
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u8 *msg_addr = (u8 *)(&msgbuf[1]);
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s32 ret_val;
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UNREFERENCED_3PARAMETER(vmdq, enable_addr, index);
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memset(msgbuf, 0, 12);
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msgbuf[0] = IXGBE_VF_SET_MAC_ADDR;
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memcpy(msg_addr, addr, 6);
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ret_val = mbx->ops.write_posted(hw, msgbuf, 3, 0);
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if (!ret_val)
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ret_val = mbx->ops.read_posted(hw, msgbuf, 3, 0);
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msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS;
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/* if nacked the address was rejected, use "perm_addr" */
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if (!ret_val &&
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(msgbuf[0] == (IXGBE_VF_SET_MAC_ADDR | IXGBE_VT_MSGTYPE_NACK)))
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ixgbe_get_mac_addr_vf(hw, hw->mac.addr);
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return ret_val;
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}
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/**
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* ixgbe_update_mc_addr_list_vf - Update Multicast addresses
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* @hw: pointer to the HW structure
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* @mc_addr_list: array of multicast addresses to program
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* @mc_addr_count: number of multicast addresses to program
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* @next: caller supplied function to return next address in list
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*
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* Updates the Multicast Table Array.
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**/
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s32 ixgbe_update_mc_addr_list_vf(struct ixgbe_hw *hw, u8 *mc_addr_list,
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u32 mc_addr_count, ixgbe_mc_addr_itr next,
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bool clear)
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{
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struct ixgbe_mbx_info *mbx = &hw->mbx;
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u32 msgbuf[IXGBE_VFMAILBOX_SIZE];
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u16 *vector_list = (u16 *)&msgbuf[1];
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u32 vector;
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u32 cnt, i;
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u32 vmdq;
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UNREFERENCED_1PARAMETER(clear);
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DEBUGFUNC("ixgbe_update_mc_addr_list_vf");
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/* Each entry in the list uses 1 16 bit word. We have 30
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* 16 bit words available in our HW msg buffer (minus 1 for the
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* msg type). That's 30 hash values if we pack 'em right. If
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* there are more than 30 MC addresses to add then punt the
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* extras for now and then add code to handle more than 30 later.
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* It would be unusual for a server to request that many multi-cast
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* addresses except for in large enterprise network environments.
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*/
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DEBUGOUT1("MC Addr Count = %d\n", mc_addr_count);
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cnt = (mc_addr_count > 30) ? 30 : mc_addr_count;
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msgbuf[0] = IXGBE_VF_SET_MULTICAST;
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msgbuf[0] |= cnt << IXGBE_VT_MSGINFO_SHIFT;
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for (i = 0; i < cnt; i++) {
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vector = ixgbe_mta_vector(hw, next(hw, &mc_addr_list, &vmdq));
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DEBUGOUT1("Hash value = 0x%03X\n", vector);
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vector_list[i] = (u16)vector;
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}
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return mbx->ops.write_posted(hw, msgbuf, IXGBE_VFMAILBOX_SIZE, 0);
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}
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/**
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* ixgbe_set_vfta_vf - Set/Unset vlan filter table address
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* @hw: pointer to the HW structure
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* @vlan: 12 bit VLAN ID
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* @vind: unused by VF drivers
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* @vlan_on: if TRUE then set bit, else clear bit
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**/
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s32 ixgbe_set_vfta_vf(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on)
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{
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struct ixgbe_mbx_info *mbx = &hw->mbx;
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u32 msgbuf[2];
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s32 ret_val;
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UNREFERENCED_1PARAMETER(vind);
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msgbuf[0] = IXGBE_VF_SET_VLAN;
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msgbuf[1] = vlan;
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/* Setting the 8 bit field MSG INFO to TRUE indicates "add" */
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msgbuf[0] |= vlan_on << IXGBE_VT_MSGINFO_SHIFT;
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ret_val = mbx->ops.write_posted(hw, msgbuf, 2, 0);
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if (!ret_val)
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ret_val = mbx->ops.read_posted(hw, msgbuf, 1, 0);
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if (!ret_val && (msgbuf[0] & IXGBE_VT_MSGTYPE_ACK))
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return IXGBE_SUCCESS;
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return ret_val | (msgbuf[0] & IXGBE_VT_MSGTYPE_NACK);
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}
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/**
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* ixgbe_get_num_of_tx_queues_vf - Get number of TX queues
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* @hw: pointer to hardware structure
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*
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* Returns the number of transmit queues for the given adapter.
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**/
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u32 ixgbe_get_num_of_tx_queues_vf(struct ixgbe_hw *hw)
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{
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UNREFERENCED_1PARAMETER(hw);
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return IXGBE_VF_MAX_TX_QUEUES;
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}
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/**
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* ixgbe_get_num_of_rx_queues_vf - Get number of RX queues
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* @hw: pointer to hardware structure
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*
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* Returns the number of receive queues for the given adapter.
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**/
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u32 ixgbe_get_num_of_rx_queues_vf(struct ixgbe_hw *hw)
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{
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UNREFERENCED_1PARAMETER(hw);
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return IXGBE_VF_MAX_RX_QUEUES;
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}
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/**
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* ixgbe_get_mac_addr_vf - Read device MAC address
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* @hw: pointer to the HW structure
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**/
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s32 ixgbe_get_mac_addr_vf(struct ixgbe_hw *hw, u8 *mac_addr)
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{
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int i;
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for (i = 0; i < IXGBE_ETH_LENGTH_OF_ADDRESS; i++)
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mac_addr[i] = hw->mac.perm_addr[i];
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return IXGBE_SUCCESS;
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}
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s32 ixgbevf_set_uc_addr_vf(struct ixgbe_hw *hw, u32 index, u8 *addr)
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{
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struct ixgbe_mbx_info *mbx = &hw->mbx;
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u32 msgbuf[3];
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u8 *msg_addr = (u8 *)(&msgbuf[1]);
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s32 ret_val;
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memset(msgbuf, 0, sizeof(msgbuf));
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/*
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* If index is one then this is the start of a new list and needs
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* indication to the PF so it can do it's own list management.
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* If it is zero then that tells the PF to just clear all of
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* this VF's macvlans and there is no new list.
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*/
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msgbuf[0] |= index << IXGBE_VT_MSGINFO_SHIFT;
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msgbuf[0] |= IXGBE_VF_SET_MACVLAN;
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if (addr)
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memcpy(msg_addr, addr, 6);
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ret_val = mbx->ops.write_posted(hw, msgbuf, 3, 0);
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if (!ret_val)
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ret_val = mbx->ops.read_posted(hw, msgbuf, 3, 0);
|
|
|
|
msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS;
|
|
|
|
if (!ret_val)
|
|
if (msgbuf[0] == (IXGBE_VF_SET_MACVLAN | IXGBE_VT_MSGTYPE_NACK))
|
|
ret_val = IXGBE_ERR_OUT_OF_MEM;
|
|
|
|
return ret_val;
|
|
}
|
|
|
|
/**
|
|
* ixgbe_setup_mac_link_vf - Setup MAC link settings
|
|
* @hw: pointer to hardware structure
|
|
* @speed: new link speed
|
|
* @autoneg: TRUE if autonegotiation enabled
|
|
* @autoneg_wait_to_complete: TRUE when waiting for completion is needed
|
|
*
|
|
* Set the link speed in the AUTOC register and restarts link.
|
|
**/
|
|
s32 ixgbe_setup_mac_link_vf(struct ixgbe_hw *hw, ixgbe_link_speed speed,
|
|
bool autoneg_wait_to_complete)
|
|
{
|
|
UNREFERENCED_3PARAMETER(hw, speed, autoneg_wait_to_complete);
|
|
return IXGBE_SUCCESS;
|
|
}
|
|
|
|
/**
|
|
* ixgbe_check_mac_link_vf - Get link/speed status
|
|
* @hw: pointer to hardware structure
|
|
* @speed: pointer to link speed
|
|
* @link_up: TRUE is link is up, FALSE otherwise
|
|
* @autoneg_wait_to_complete: TRUE when waiting for completion is needed
|
|
*
|
|
* Reads the links register to determine if link is up and the current speed
|
|
**/
|
|
s32 ixgbe_check_mac_link_vf(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
|
|
bool *link_up, bool autoneg_wait_to_complete)
|
|
{
|
|
struct ixgbe_mbx_info *mbx = &hw->mbx;
|
|
struct ixgbe_mac_info *mac = &hw->mac;
|
|
s32 ret_val = IXGBE_SUCCESS;
|
|
u32 links_reg;
|
|
u32 in_msg = 0;
|
|
UNREFERENCED_1PARAMETER(autoneg_wait_to_complete);
|
|
|
|
/* If we were hit with a reset drop the link */
|
|
if (!mbx->ops.check_for_rst(hw, 0) || !mbx->timeout)
|
|
mac->get_link_status = TRUE;
|
|
|
|
if (!mac->get_link_status)
|
|
goto out;
|
|
|
|
/* if link status is down no point in checking to see if pf is up */
|
|
links_reg = IXGBE_READ_REG(hw, IXGBE_VFLINKS);
|
|
if (!(links_reg & IXGBE_LINKS_UP))
|
|
goto out;
|
|
|
|
switch (links_reg & IXGBE_LINKS_SPEED_82599) {
|
|
case IXGBE_LINKS_SPEED_10G_82599:
|
|
*speed = IXGBE_LINK_SPEED_10GB_FULL;
|
|
break;
|
|
case IXGBE_LINKS_SPEED_1G_82599:
|
|
*speed = IXGBE_LINK_SPEED_1GB_FULL;
|
|
break;
|
|
case IXGBE_LINKS_SPEED_100_82599:
|
|
*speed = IXGBE_LINK_SPEED_100_FULL;
|
|
break;
|
|
}
|
|
|
|
/* if the read failed it could just be a mailbox collision, best wait
|
|
* until we are called again and don't report an error
|
|
*/
|
|
if (mbx->ops.read(hw, &in_msg, 1, 0))
|
|
goto out;
|
|
|
|
if (!(in_msg & IXGBE_VT_MSGTYPE_CTS)) {
|
|
/* msg is not CTS and is NACK we must have lost CTS status */
|
|
if (in_msg & IXGBE_VT_MSGTYPE_NACK)
|
|
ret_val = -1;
|
|
goto out;
|
|
}
|
|
|
|
/* the pf is talking, if we timed out in the past we reinit */
|
|
if (!mbx->timeout) {
|
|
ret_val = -1;
|
|
goto out;
|
|
}
|
|
|
|
/* if we passed all the tests above then the link is up and we no
|
|
* longer need to check for link
|
|
*/
|
|
mac->get_link_status = FALSE;
|
|
|
|
out:
|
|
*link_up = !mac->get_link_status;
|
|
return ret_val;
|
|
}
|
|
|
|
/**
|
|
* ixgbevf_rlpml_set_vf - Set the maximum receive packet length
|
|
* @hw: pointer to the HW structure
|
|
* @max_size: value to assign to max frame size
|
|
**/
|
|
void ixgbevf_rlpml_set_vf(struct ixgbe_hw *hw, u16 max_size)
|
|
{
|
|
u32 msgbuf[2];
|
|
|
|
msgbuf[0] = IXGBE_VF_SET_LPE;
|
|
msgbuf[1] = max_size;
|
|
ixgbevf_write_msg_read_ack(hw, msgbuf, 2);
|
|
}
|
|
|
|
/**
|
|
* ixgbevf_negotiate_api_version - Negotiate supported API version
|
|
* @hw: pointer to the HW structure
|
|
* @api: integer containing requested API version
|
|
**/
|
|
int ixgbevf_negotiate_api_version(struct ixgbe_hw *hw, int api)
|
|
{
|
|
int err;
|
|
u32 msg[3];
|
|
|
|
/* Negotiate the mailbox API version */
|
|
msg[0] = IXGBE_VF_API_NEGOTIATE;
|
|
msg[1] = api;
|
|
msg[2] = 0;
|
|
err = hw->mbx.ops.write_posted(hw, msg, 3, 0);
|
|
|
|
if (!err)
|
|
err = hw->mbx.ops.read_posted(hw, msg, 3, 0);
|
|
|
|
if (!err) {
|
|
msg[0] &= ~IXGBE_VT_MSGTYPE_CTS;
|
|
|
|
/* Store value and return 0 on success */
|
|
if (msg[0] == (IXGBE_VF_API_NEGOTIATE | IXGBE_VT_MSGTYPE_ACK)) {
|
|
hw->api_version = api;
|
|
return 0;
|
|
}
|
|
|
|
err = IXGBE_ERR_INVALID_ARGUMENT;
|
|
}
|
|
|
|
return err;
|
|
}
|
|
|
|
int ixgbevf_get_queues(struct ixgbe_hw *hw, unsigned int *num_tcs,
|
|
unsigned int *default_tc)
|
|
{
|
|
UNREFERENCED_3PARAMETER(hw, num_tcs, default_tc);
|
|
return IXGBE_SUCCESS;
|
|
}
|
|
|