97d40d3d4a
us up to version 2.17.50.20070703, at the last GPLv2 commit. Amongst others, this added upstream support for some FreeBSD-specific things that we previously had to manually hack in, such as the OSABI label support, and so on. There are also quite a number of new files, some for cpu's (e.g. SPU) that we may or may not be interested in, but those can be cleaned up later on, if needed.
81 lines
2.2 KiB
Plaintext
81 lines
2.2 KiB
Plaintext
@c Copyright 2007 Free Software Foundation, Inc.
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@c This is part of the GAS manual.
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@c For copying conditions, see the file as.texinfo.
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@ifset GENERIC
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@page
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@node CR16-Dependent
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@chapter CR16 Dependent Features
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@end ifset
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@ifclear GENERIC
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@node Machine Dependencies
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@chapter CR16 Dependent Features
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@end ifclear
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@cindex CR16 support
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@menu
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* CR16 Operand Qualifiers:: CR16 Machine Operand Qualifiers
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@end menu
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@node CR16 Operand Qualifiers
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@section CR16 Operand Qualifiers
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@cindex CR16 Operand Qualifiers
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The National Semiconductor CR16 target of @code{@value{AS}} has a few machine dependent operand qualifiers.
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Operand expression type qualifier is an optional field in the instruction operand, to determines the type of the expression field of an operand. The @code{@@} is required. CR16 architecture uses one of the following expression qualifiers:
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@table @code
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@item s
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- @code{Specifies expression operand type as small}
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@item m
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- @code{Specifies expression operand type as medium}
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@item l
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- @code{Specifies expression operand type as large}
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@item c
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- @code{Specifies the CR16 Assembler generates a relocation entry for the operand, where pc has implied bit, the expression is adjusted accordingly. The linker uses the relocation entry to update the operand address at link time.}
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@end table
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CR16 target operand qualifiers and its size (in bits):
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@table @samp
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@item Immediate Operand
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- s ---- 4 bits
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@item
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- m ---- 16 bits, for movb and movw instructions.
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@item
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- m ---- 20 bits, movd instructions.
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@item
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- l ---- 32 bits
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@item Absolute Operand
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- s ---- Illegal specifier for this operand.
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@item
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- m ---- 20 bits, movd instructions.
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@item Displacement Operand
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- s ---- 8 bits
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@item
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- m ---- 16 bits
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@item
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- l ---- 24 bits
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@end table
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For example:
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@example
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1 @code{movw $_myfun@@c,r1}
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This loads the address of _myfun, shifted right by 1, into r1.
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2 @code{movd $_myfun@@c,(r2,r1)}
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This loads the address of _myfun, shifted right by 1, into register-pair r2-r1.
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3 @code{_myfun_ptr:}
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@code{.long _myfun@@c}
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@code{loadd _myfun_ptr, (r1,r0)}
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@code{jal (r1,r0)}
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This .long directive, the address of _myfunc, shifted right by 1 at link time.
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@end example
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