04b6fa8330
facilities as well as support for the Octeon 2 family of SoCs. XXX Note that with our antediluvian assembler, we can't support some Octeon 2 instructions and fall back to using the old ones instead.
320 lines
10 KiB
C
320 lines
10 KiB
C
/***********************license start***************
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* Copyright (c) 2003-2010 Cavium Networks (support@cavium.com). All rights
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* reserved.
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*
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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*
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* * Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials provided
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* with the distribution.
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* * Neither the name of Cavium Networks nor the names of
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* its contributors may be used to endorse or promote products
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* derived from this software without specific prior written
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* permission.
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* This Software, including technical data, may be subject to U.S. export control
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* laws, including the U.S. Export Administration Act and its associated
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* regulations, and may be subject to export or import regulations in other
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* countries.
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* TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
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* AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS OR
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* WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO
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* THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR
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* DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM
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* SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE,
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* MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF
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* VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR
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* CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR
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* PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
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***********************license end**************************************/
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/**
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* @file
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*
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* Interface to the hardware Free Pool Allocator.
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*
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* <hr>$Revision: 50048 $<hr>
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*
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*/
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#ifndef __CVMX_FPA_H__
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#define __CVMX_FPA_H__
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#include "cvmx-scratch.h"
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#ifdef CVMX_BUILD_FOR_LINUX_KERNEL
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#include "cvmx-fpa-defs.h"
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#endif
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define CVMX_FPA_NUM_POOLS 8
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#define CVMX_FPA_MIN_BLOCK_SIZE 128
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#define CVMX_FPA_ALIGNMENT 128
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/**
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* Structure describing the data format used for stores to the FPA.
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*/
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typedef union
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{
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uint64_t u64;
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struct {
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uint64_t scraddr : 8; /**< the (64-bit word) location in scratchpad to write to (if len != 0) */
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uint64_t len : 8; /**< the number of words in the response (0 => no response) */
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uint64_t did : 8; /**< the ID of the device on the non-coherent bus */
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uint64_t addr :40; /**< the address that will appear in the first tick on the NCB bus */
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} s;
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} cvmx_fpa_iobdma_data_t;
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/**
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* Structure describing the current state of a FPA pool.
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*/
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typedef struct
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{
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const char *name; /**< Name it was created under */
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uint64_t size; /**< Size of each block */
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void * base; /**< The base memory address of whole block */
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uint64_t starting_element_count; /**< The number of elements in the pool at creation */
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} cvmx_fpa_pool_info_t;
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/**
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* Current state of all the pools. Use access functions
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* instead of using it directly.
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*/
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extern cvmx_fpa_pool_info_t cvmx_fpa_pool_info[CVMX_FPA_NUM_POOLS];
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/* CSR typedefs have been moved to cvmx-fpa-defs.h */
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/**
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* Return the name of the pool
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*
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* @param pool Pool to get the name of
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* @return The name
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*/
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static inline const char *cvmx_fpa_get_name(uint64_t pool)
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{
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return cvmx_fpa_pool_info[pool].name;
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}
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/**
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* Return the base of the pool
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*
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* @param pool Pool to get the base of
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* @return The base
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*/
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static inline void *cvmx_fpa_get_base(uint64_t pool)
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{
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return cvmx_fpa_pool_info[pool].base;
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}
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/**
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* Check if a pointer belongs to an FPA pool. Return non-zero
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* if the supplied pointer is inside the memory controlled by
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* an FPA pool.
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*
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* @param pool Pool to check
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* @param ptr Pointer to check
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* @return Non-zero if pointer is in the pool. Zero if not
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*/
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static inline int cvmx_fpa_is_member(uint64_t pool, void *ptr)
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{
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return ((ptr >= cvmx_fpa_pool_info[pool].base) &&
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((char*)ptr < ((char*)(cvmx_fpa_pool_info[pool].base)) + cvmx_fpa_pool_info[pool].size * cvmx_fpa_pool_info[pool].starting_element_count));
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}
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/**
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* Enable the FPA for use. Must be performed after any CSR
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* configuration but before any other FPA functions.
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*/
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static inline void cvmx_fpa_enable(void)
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{
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cvmx_fpa_ctl_status_t status;
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status.u64 = cvmx_read_csr(CVMX_FPA_CTL_STATUS);
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if (status.s.enb)
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{
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cvmx_dprintf("Warning: Enabling FPA when FPA already enabled.\n");
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}
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status.u64 = 0;
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status.s.enb = 1;
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cvmx_write_csr(CVMX_FPA_CTL_STATUS, status.u64);
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}
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/**
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* Get a new block from the FPA
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*
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* @param pool Pool to get the block from
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* @return Pointer to the block or NULL on failure
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*/
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static inline void *cvmx_fpa_alloc(uint64_t pool)
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{
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uint64_t address;
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for (;;) {
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address = cvmx_read_csr(CVMX_ADDR_DID(CVMX_FULL_DID(CVMX_OCT_DID_FPA,pool)));
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if (cvmx_likely(address)) {
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return cvmx_phys_to_ptr(address);
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} else {
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/* If pointers are available, continuously retry. */
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if (cvmx_read_csr(CVMX_FPA_QUEX_AVAILABLE(pool)) > 0)
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cvmx_wait(50);
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else
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return NULL;
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}
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}
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}
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/**
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* Asynchronously get a new block from the FPA
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*
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* The result of cvmx_fpa_async_alloc() may be retrieved using
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* cvmx_fpa_async_alloc_finish().
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*
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* @param scr_addr Local scratch address to put response in. This is a byte address,
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* but must be 8 byte aligned.
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* @param pool Pool to get the block from
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*/
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static inline void cvmx_fpa_async_alloc(uint64_t scr_addr, uint64_t pool)
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{
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cvmx_fpa_iobdma_data_t data;
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/* Hardware only uses 64 bit alligned locations, so convert from byte address
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** to 64-bit index
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*/
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data.s.scraddr = scr_addr >> 3;
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data.s.len = 1;
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data.s.did = CVMX_FULL_DID(CVMX_OCT_DID_FPA,pool);
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data.s.addr = 0;
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cvmx_send_single(data.u64);
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}
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/**
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* Retrieve the result of cvmx_fpa_async_alloc
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*
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* @param scr_addr The Local scratch address. Must be the same value
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* passed to cvmx_fpa_async_alloc().
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*
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* @param pool Pool the block came from. Must be the same value
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* passed to cvmx_fpa_async_alloc.
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*
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* @return Pointer to the block or NULL on failure
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*/
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static inline void *cvmx_fpa_async_alloc_finish(uint64_t scr_addr, uint64_t pool)
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{
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uint64_t address;
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CVMX_SYNCIOBDMA;
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address = cvmx_scratch_read64(scr_addr);
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if (cvmx_likely(address))
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return cvmx_phys_to_ptr(address);
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else
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return cvmx_fpa_alloc(pool);
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}
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/**
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* Free a block allocated with a FPA pool.
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* Does NOT provide memory ordering in cases where the memory block was modified by the core.
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*
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* @param ptr Block to free
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* @param pool Pool to put it in
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* @param num_cache_lines
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* Cache lines to invalidate
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*/
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static inline void cvmx_fpa_free_nosync(void *ptr, uint64_t pool, uint64_t num_cache_lines)
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{
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cvmx_addr_t newptr;
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newptr.u64 = cvmx_ptr_to_phys(ptr);
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newptr.sfilldidspace.didspace = CVMX_ADDR_DIDSPACE(CVMX_FULL_DID(CVMX_OCT_DID_FPA,pool));
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asm volatile ("" : : : "memory"); /* Prevent GCC from reordering around free */
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/* value written is number of cache lines not written back */
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cvmx_write_io(newptr.u64, num_cache_lines);
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}
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/**
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* Free a block allocated with a FPA pool. Provides required memory
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* ordering in cases where memory block was modified by core.
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*
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* @param ptr Block to free
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* @param pool Pool to put it in
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* @param num_cache_lines
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* Cache lines to invalidate
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*/
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static inline void cvmx_fpa_free(void *ptr, uint64_t pool, uint64_t num_cache_lines)
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{
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cvmx_addr_t newptr;
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newptr.u64 = cvmx_ptr_to_phys(ptr);
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newptr.sfilldidspace.didspace = CVMX_ADDR_DIDSPACE(CVMX_FULL_DID(CVMX_OCT_DID_FPA,pool));
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/* Make sure that any previous writes to memory go out before we free this buffer.
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** This also serves as a barrier to prevent GCC from reordering operations to after
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** the free. */
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CVMX_SYNCWS;
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/* value written is number of cache lines not written back */
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cvmx_write_io(newptr.u64, num_cache_lines);
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}
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/**
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* Setup a FPA pool to control a new block of memory.
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* This can only be called once per pool. Make sure proper
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* locking enforces this.
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*
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* @param pool Pool to initialize
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* 0 <= pool < 8
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* @param name Constant character string to name this pool.
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* String is not copied.
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* @param buffer Pointer to the block of memory to use. This must be
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* accessable by all processors and external hardware.
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* @param block_size Size for each block controlled by the FPA
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* @param num_blocks Number of blocks
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*
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* @return 0 on Success,
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* -1 on failure
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*/
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extern int cvmx_fpa_setup_pool(uint64_t pool, const char *name, void *buffer,
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uint64_t block_size, uint64_t num_blocks);
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/**
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* Shutdown a Memory pool and validate that it had all of
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* the buffers originally placed in it. This should only be
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* called by one processor after all hardware has finished
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* using the pool. Most like you will want to have called
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* cvmx_helper_shutdown_packet_io_global() before this
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* function to make sure all FPA buffers are out of the packet
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* IO hardware.
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*
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* @param pool Pool to shutdown
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*
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* @return Zero on success
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* - Positive is count of missing buffers
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* - Negative is too many buffers or corrupted pointers
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*/
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extern uint64_t cvmx_fpa_shutdown_pool(uint64_t pool);
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/**
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* Get the size of blocks controlled by the pool
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* This is resolved to a constant at compile time.
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*
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* @param pool Pool to access
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* @return Size of the block in bytes
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*/
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uint64_t cvmx_fpa_get_block_size(uint64_t pool);
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#ifdef __cplusplus
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}
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#endif
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#endif /* __CVM_FPA_H__ */
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