171 lines
6.2 KiB
C
171 lines
6.2 KiB
C
/* $NetBSD: x86emu_regs.h,v 1.1 2007/12/01 20:14:10 joerg Exp $ */
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/* $OpenBSD: x86emu_regs.h,v 1.2 2009/06/06 03:45:05 matthieu Exp $ */
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/****************************************************************************
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*
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* Realmode X86 Emulator Library
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*
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* Copyright (C) 1996-1999 SciTech Software, Inc.
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* Copyright (C) David Mosberger-Tang
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* Copyright (C) 1999 Egbert Eich
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* Copyright (C) 2007 Joerg Sonnenberger
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*
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* ========================================================================
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*
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* Permission to use, copy, modify, distribute, and sell this software and
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* its documentation for any purpose is hereby granted without fee,
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* provided that the above copyright notice appear in all copies and that
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* both that copyright notice and this permission notice appear in
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* supporting documentation, and that the name of the authors not be used
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* in advertising or publicity pertaining to distribution of the software
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* without specific, written prior permission. The authors makes no
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* representations about the suitability of this software for any purpose.
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* It is provided "as is" without express or implied warranty.
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*
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* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
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* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
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* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
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* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
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* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
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* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
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* PERFORMANCE OF THIS SOFTWARE.
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*
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****************************************************************************/
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#ifndef __X86EMU_REGS_H
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#define __X86EMU_REGS_H
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/*---------------------- Macros and type definitions ----------------------*/
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/* 8 bit registers */
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#define R_AH register_a.I8_reg.h_reg
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#define R_AL register_a.I8_reg.l_reg
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#define R_BH register_b.I8_reg.h_reg
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#define R_BL register_b.I8_reg.l_reg
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#define R_CH register_c.I8_reg.h_reg
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#define R_CL register_c.I8_reg.l_reg
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#define R_DH register_d.I8_reg.h_reg
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#define R_DL register_d.I8_reg.l_reg
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/* 16 bit registers */
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#define R_AX register_a.I16_reg.x_reg
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#define R_BX register_b.I16_reg.x_reg
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#define R_CX register_c.I16_reg.x_reg
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#define R_DX register_d.I16_reg.x_reg
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/* 32 bit extended registers */
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#define R_EAX register_a.I32_reg.e_reg
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#define R_EBX register_b.I32_reg.e_reg
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#define R_ECX register_c.I32_reg.e_reg
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#define R_EDX register_d.I32_reg.e_reg
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/* special registers */
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#define R_SP register_sp.I16_reg.x_reg
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#define R_BP register_bp.I16_reg.x_reg
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#define R_SI register_si.I16_reg.x_reg
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#define R_DI register_di.I16_reg.x_reg
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#define R_IP register_ip.I16_reg.x_reg
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#define R_FLG register_flags
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/* special registers */
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#define R_ESP register_sp.I32_reg.e_reg
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#define R_EBP register_bp.I32_reg.e_reg
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#define R_ESI register_si.I32_reg.e_reg
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#define R_EDI register_di.I32_reg.e_reg
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#define R_EIP register_ip.I32_reg.e_reg
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#define R_EFLG register_flags
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/* segment registers */
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#define R_CS register_cs
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#define R_DS register_ds
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#define R_SS register_ss
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#define R_ES register_es
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#define R_FS register_fs
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#define R_GS register_gs
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/* flag conditions */
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#define FB_CF 0x0001 /* CARRY flag */
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#define FB_PF 0x0004 /* PARITY flag */
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#define FB_AF 0x0010 /* AUX flag */
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#define FB_ZF 0x0040 /* ZERO flag */
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#define FB_SF 0x0080 /* SIGN flag */
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#define FB_TF 0x0100 /* TRAP flag */
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#define FB_IF 0x0200 /* INTERRUPT ENABLE flag */
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#define FB_DF 0x0400 /* DIR flag */
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#define FB_OF 0x0800 /* OVERFLOW flag */
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/* 80286 and above always have bit#1 set */
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#define F_ALWAYS_ON (0x0002) /* flag bits always on */
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/*
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* Define a mask for only those flag bits we will ever pass back
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* (via PUSHF)
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*/
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#define F_MSK (FB_CF|FB_PF|FB_AF|FB_ZF|FB_SF|FB_TF|FB_IF|FB_DF|FB_OF)
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/* following bits masked in to a 16bit quantity */
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#define F_CF 0x0001 /* CARRY flag */
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#define F_PF 0x0004 /* PARITY flag */
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#define F_AF 0x0010 /* AUX flag */
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#define F_ZF 0x0040 /* ZERO flag */
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#define F_SF 0x0080 /* SIGN flag */
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#define F_TF 0x0100 /* TRAP flag */
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#define F_IF 0x0200 /* INTERRUPT ENABLE flag */
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#define F_DF 0x0400 /* DIR flag */
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#define F_OF 0x0800 /* OVERFLOW flag */
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#define SET_FLAG(flag) (emu->x86.R_FLG |= (flag))
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#define CLEAR_FLAG(flag) (emu->x86.R_FLG &= ~(flag))
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#define ACCESS_FLAG(flag) (emu->x86.R_FLG & (flag))
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#define CLEARALL_FLAG(m) (emu->x86.R_FLG = 0)
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#define CONDITIONAL_SET_FLAG(COND,FLAG) \
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if (COND) SET_FLAG(FLAG); else CLEAR_FLAG(FLAG)
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#define F_PF_CALC 0x010000 /* PARITY flag has been calced */
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#define F_ZF_CALC 0x020000 /* ZERO flag has been calced */
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#define F_SF_CALC 0x040000 /* SIGN flag has been calced */
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#define F_ALL_CALC 0xff0000 /* All have been calced */
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/*
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* Emulator machine state.
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* Segment usage control.
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*/
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#define SYSMODE_SEG_DS_SS 0x00000001
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#define SYSMODE_SEGOVR_CS 0x00000002
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#define SYSMODE_SEGOVR_DS 0x00000004
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#define SYSMODE_SEGOVR_ES 0x00000008
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#define SYSMODE_SEGOVR_FS 0x00000010
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#define SYSMODE_SEGOVR_GS 0x00000020
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#define SYSMODE_SEGOVR_SS 0x00000040
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#define SYSMODE_PREFIX_REPE 0x00000080
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#define SYSMODE_PREFIX_REPNE 0x00000100
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#define SYSMODE_PREFIX_DATA 0x00000200
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#define SYSMODE_PREFIX_ADDR 0x00000400
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#define SYSMODE_INTR_PENDING 0x10000000
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#define SYSMODE_EXTRN_INTR 0x20000000
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#define SYSMODE_HALTED 0x40000000
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#define SYSMODE_SEGMASK (SYSMODE_SEG_DS_SS | \
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SYSMODE_SEGOVR_CS | \
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SYSMODE_SEGOVR_DS | \
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SYSMODE_SEGOVR_ES | \
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SYSMODE_SEGOVR_FS | \
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SYSMODE_SEGOVR_GS | \
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SYSMODE_SEGOVR_SS)
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#define SYSMODE_CLRMASK (SYSMODE_SEG_DS_SS | \
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SYSMODE_SEGOVR_CS | \
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SYSMODE_SEGOVR_DS | \
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SYSMODE_SEGOVR_ES | \
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SYSMODE_SEGOVR_FS | \
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SYSMODE_SEGOVR_GS | \
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SYSMODE_SEGOVR_SS | \
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SYSMODE_PREFIX_DATA | \
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SYSMODE_PREFIX_ADDR)
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#define INTR_SYNCH 0x1
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#endif /* __X86EMU_REGS_H */
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