d3d47408fc
MFC after: 3 days Sponsored by: Mellanox Technologies
137 lines
4.7 KiB
C
137 lines
4.7 KiB
C
/*-
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* Copyright (c) 2013-2017, Mellanox Technologies, Ltd. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS `AS IS' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef __MLX5_CORE_H__
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#define __MLX5_CORE_H__
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/sched.h>
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#include <dev/mlxfw/mlxfw.h>
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#define DRIVER_NAME "mlx5_core"
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#ifndef DRIVER_VERSION
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#define DRIVER_VERSION "3.5.2"
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#endif
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#define DRIVER_RELDATE "September 2019"
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extern int mlx5_core_debug_mask;
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#define mlx5_core_dbg(dev, format, ...) \
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pr_debug("%s:%s:%d:(pid %d): " format, \
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(dev)->priv.name, __func__, __LINE__, curthread->td_proc->p_pid, \
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##__VA_ARGS__)
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#define mlx5_core_dbg_mask(dev, mask, format, ...) \
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do { \
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if ((mask) & mlx5_core_debug_mask) \
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mlx5_core_dbg(dev, format, ##__VA_ARGS__); \
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} while (0)
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#define mlx5_core_err(_dev, format, ...) \
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device_printf((_dev)->pdev->dev.bsddev, "ERR: ""%s:%d:(pid %d): " format, \
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__func__, __LINE__, curthread->td_proc->p_pid, \
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##__VA_ARGS__)
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#define mlx5_core_warn(_dev, format, ...) \
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device_printf((_dev)->pdev->dev.bsddev, "WARN: ""%s:%d:(pid %d): " format, \
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__func__, __LINE__, curthread->td_proc->p_pid, \
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##__VA_ARGS__)
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#define mlx5_core_info(_dev, format, ...) \
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device_printf((_dev)->pdev->dev.bsddev, "INFO: ""%s:%d:(pid %d): " format, \
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__func__, __LINE__, curthread->td_proc->p_pid, \
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##__VA_ARGS__)
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enum {
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MLX5_CMD_DATA, /* print command payload only */
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MLX5_CMD_TIME, /* print command execution time */
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};
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enum mlx5_semaphore_space_address {
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MLX5_SEMAPHORE_SW_RESET = 0x20,
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};
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struct mlx5_core_dev;
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int mlx5_query_hca_caps(struct mlx5_core_dev *dev);
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int mlx5_query_board_id(struct mlx5_core_dev *dev);
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int mlx5_query_qcam_reg(struct mlx5_core_dev *mdev, u32 *qcam,
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u8 feature_group, u8 access_reg_group);
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int mlx5_query_pcam_reg(struct mlx5_core_dev *dev, u32 *pcam,
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u8 feature_group, u8 access_reg_group);
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int mlx5_query_mcam_reg(struct mlx5_core_dev *dev, u32 *mcap,
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u8 feature_group, u8 access_reg_group);
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int mlx5_query_mfrl_reg(struct mlx5_core_dev *mdev, u8 *reset_level);
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int mlx5_set_mfrl_reg(struct mlx5_core_dev *mdev, u8 reset_level);
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int mlx5_cmd_init_hca(struct mlx5_core_dev *dev);
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int mlx5_cmd_teardown_hca(struct mlx5_core_dev *dev);
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int mlx5_cmd_force_teardown_hca(struct mlx5_core_dev *dev);
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int mlx5_cmd_fast_teardown_hca(struct mlx5_core_dev *dev);
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void mlx5_core_event(struct mlx5_core_dev *dev, enum mlx5_dev_event event,
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unsigned long param);
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void mlx5_enter_error_state(struct mlx5_core_dev *dev, bool force);
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void mlx5_disable_device(struct mlx5_core_dev *dev);
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void mlx5_recover_device(struct mlx5_core_dev *dev);
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int mlx5_register_device(struct mlx5_core_dev *dev);
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void mlx5_unregister_device(struct mlx5_core_dev *dev);
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int mlx5_firmware_flash(struct mlx5_core_dev *dev, const struct firmware *fw);
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void mlx5e_init(void);
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void mlx5e_cleanup(void);
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int mlx5_ctl_init(void);
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void mlx5_ctl_fini(void);
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void mlx5_fwdump_prep(struct mlx5_core_dev *mdev);
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int mlx5_fwdump(struct mlx5_core_dev *mdev);
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void mlx5_fwdump_clean(struct mlx5_core_dev *mdev);
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struct mlx5_crspace_regmap {
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uint32_t addr;
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unsigned cnt;
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};
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extern struct pci_driver mlx5_core_driver;
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SYSCTL_DECL(_hw_mlx5);
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enum {
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MLX5_NIC_IFC_FULL = 0,
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MLX5_NIC_IFC_DISABLED = 1,
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MLX5_NIC_IFC_NO_DRAM_NIC = 2,
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MLX5_NIC_IFC_INVALID = 3,
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MLX5_NIC_IFC_SW_RESET = 7,
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};
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u8 mlx5_get_nic_state(struct mlx5_core_dev *dev);
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void mlx5_set_nic_state(struct mlx5_core_dev *dev, u8 state);
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#endif /* __MLX5_CORE_H__ */
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