a2d5ed9442
It was written basing on: TCG PC Client Platform TPM Profile (PTP) Specification Version 22, Revision 1.03. It only supports Locality 0. Interrupts are only supported in FIFO mode. The driver in FIFO mode was tested on x86 with Infineon SLB9665 discrete TPM chip. Driver in both modes was also tested on qemu with swtpm running on host. Submitted by: Kornel Duleba <mindal@semihalf.com> Obtained from: Semihalf Sponsored by: Stormshield Differential Revision: https://reviews.freebsd.org/D18048
193 lines
4.8 KiB
C
193 lines
4.8 KiB
C
/*-
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* Copyright (c) 2018 Stormshield.
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* Copyright (c) 2018 Semihalf.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _TPM20_H_
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#define _TPM20_H_
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/endian.h>
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#include <sys/param.h>
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#include <sys/kernel.h>
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#include <sys/malloc.h>
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#include <sys/proc.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/callout.h>
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#include <sys/conf.h>
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#include <sys/module.h>
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#include <sys/rman.h>
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#include <sys/sx.h>
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#include <sys/uio.h>
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#include <machine/bus.h>
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#include <machine/md_var.h>
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#include <machine/resource.h>
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#include <contrib/dev/acpica/include/acpi.h>
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#include <contrib/dev/acpica/include/accommon.h>
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#include <dev/acpica/acpivar.h>
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#include "opt_acpi.h"
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#define BIT(x) (1 << (x))
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/* Timeouts in us */
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#define TPM_TIMEOUT_A 750000
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#define TPM_TIMEOUT_B 2000000
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#define TPM_TIMEOUT_C 200000
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#define TPM_TIMEOUT_D 30000
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/*
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* Generating RSA key pair takes ~(10-20s), which is significantly longer than
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* any timeout defined in spec. Because of that we need a new one.
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*/
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#define TPM_TIMEOUT_LONG 40000000
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/* List of commands that require TPM_TIMEOUT_LONG time to complete */
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#define TPM_CC_CreatePrimary 0x00000131
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#define TPM_CC_Create 0x00000153
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#define TPM_CC_CreateLoaded 0x00000191
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/* List of commands that require only TPM_TIMEOUT_C time to complete */
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#define TPM_CC_SequenceComplete 0x0000013e
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#define TPM_CC_Startup 0x00000144
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#define TPM_CC_SequenceUpdate 0x0000015c
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#define TPM_CC_GetCapability 0x0000017a
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#define TPM_CC_PCR_Extend 0x00000182
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#define TPM_CC_EventSequenceComplete 0x00000185
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#define TPM_CC_HashSequenceStart 0x00000186
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/* Timeout before data in read buffer is discarded */
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#define TPM_READ_TIMEOUT 500000
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#define TPM_BUFSIZE 0x1000
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#define TPM_HEADER_SIZE 10
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#define TPM_CDEV_NAME "tpm0"
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#define TPM_CDEV_PERM_FLAG 0600
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struct tpm_sc {
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device_t dev;
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struct resource *mem_res;
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struct resource *irq_res;
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int mem_rid;
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int irq_rid;
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struct cdev *sc_cdev;
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struct sx dev_lock;
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struct cv buf_cv;
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void *intr_cookie;
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int intr_type; /* Current event type */
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bool interrupts;
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uint8_t *buf;
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size_t pending_data_length;
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struct callout discard_buffer_callout;
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int (*transmit)(struct tpm_sc *, size_t);
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};
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int tpm20_suspend(device_t dev);
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int tpm20_shutdown(device_t dev);
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int32_t tpm20_get_timeout(uint32_t command);
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int tpm20_init(struct tpm_sc *sc);
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void tpm20_release(struct tpm_sc *sc);
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d_open_t tpm20_open;
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d_close_t tpm20_close;
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d_read_t tpm20_read;
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d_write_t tpm20_write;
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d_ioctl_t tpm20_ioctl;
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static struct cdevsw tpm_cdevsw = {
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.d_version = D_VERSION,
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.d_open = tpm20_open,
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.d_close = tpm20_close,
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.d_read = tpm20_read,
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.d_write = tpm20_write,
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.d_ioctl = tpm20_ioctl,
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.d_name = "tpm20",
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};
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/* Small helper routines for io ops */
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static inline uint8_t
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RD1(struct tpm_sc *sc, bus_size_t off)
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{
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return (bus_read_1(sc->mem_res, off));
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}
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static inline uint32_t
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RD4(struct tpm_sc *sc, bus_size_t off)
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{
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return (bus_read_4(sc->mem_res, off));
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}
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static inline uint64_t
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RD8(struct tpm_sc *sc, bus_size_t off)
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{
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return (bus_read_8(sc->mem_res, off));
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}
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static inline void
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WR1(struct tpm_sc *sc, bus_size_t off, uint8_t val)
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{
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bus_write_1(sc->mem_res, off, val);
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}
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static inline void
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WR4(struct tpm_sc *sc, bus_size_t off, uint32_t val)
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{
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bus_write_4(sc->mem_res, off, val);
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}
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static inline void
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AND4(struct tpm_sc *sc, bus_size_t off, uint32_t val)
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{
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WR4(sc, off, RD4(sc, off) & val);
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}
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static inline void
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OR1(struct tpm_sc *sc, bus_size_t off, uint8_t val)
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{
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WR1(sc, off, RD1(sc, off) | val);
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}
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static inline void
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OR4(struct tpm_sc *sc, bus_size_t off, uint32_t val)
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{
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WR4(sc, off, RD4(sc, off) | val);
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}
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#endif /* _TPM20_H_ */
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