99 lines
3.3 KiB
C
99 lines
3.3 KiB
C
/*
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* Copyright (c) 2008-2010 Atheros Communications Inc.
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* Copyright (c) 2010-2011 Adrian Chadd, Xenion Pty Ltd.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#include "opt_ah.h"
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#include "ah.h"
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#include "ah_internal.h"
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#include "ah_devid.h"
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#include "ah_eeprom_v4k.h"
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#include "ar9002/ar9280.h"
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#include "ar9002/ar9285.h"
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#include "ar5416/ar5416reg.h"
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#include "ar5416/ar5416phy.h"
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#include "ar9002/ar9285phy.h"
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#include "ar9002/ar9285_phy.h"
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void
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ar9285_antdiv_comb_conf_get(struct ath_hal *ah,
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struct ar9285_antcomb_conf *antconf)
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{
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uint32_t regval;
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regval = OS_REG_READ(ah, AR_PHY_MULTICHAIN_GAIN_CTL);
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antconf->main_lna_conf = (regval & AR_PHY_9285_ANT_DIV_MAIN_LNACONF) >>
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AR_PHY_9285_ANT_DIV_MAIN_LNACONF_S;
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antconf->alt_lna_conf = (regval & AR_PHY_9285_ANT_DIV_ALT_LNACONF) >>
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AR_PHY_9285_ANT_DIV_ALT_LNACONF_S;
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antconf->fast_div_bias = (regval & AR_PHY_9285_FAST_DIV_BIAS) >>
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AR_PHY_9285_FAST_DIV_BIAS_S;
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}
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void
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ar9285_antdiv_comb_conf_set(struct ath_hal *ah,
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struct ar9285_antcomb_conf *antconf)
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{
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uint32_t regval;
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regval = OS_REG_READ(ah, AR_PHY_MULTICHAIN_GAIN_CTL);
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regval &= ~(AR_PHY_9285_ANT_DIV_MAIN_LNACONF |
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AR_PHY_9285_ANT_DIV_ALT_LNACONF |
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AR_PHY_9285_FAST_DIV_BIAS);
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regval |= ((antconf->main_lna_conf << AR_PHY_9285_ANT_DIV_MAIN_LNACONF_S)
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& AR_PHY_9285_ANT_DIV_MAIN_LNACONF);
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regval |= ((antconf->alt_lna_conf << AR_PHY_9285_ANT_DIV_ALT_LNACONF_S)
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& AR_PHY_9285_ANT_DIV_ALT_LNACONF);
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regval |= ((antconf->fast_div_bias << AR_PHY_9285_FAST_DIV_BIAS_S)
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& AR_PHY_9285_FAST_DIV_BIAS);
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OS_REG_WRITE(ah, AR_PHY_MULTICHAIN_GAIN_CTL, regval);
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}
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/*
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* Check whether antenna diversity should be enabled
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*/
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int
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ar9285_check_div_comb(struct ath_hal *ah)
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{
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uint8_t ant_div_ctl1;
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HAL_EEPROM_v4k *ee = AH_PRIVATE(ah)->ah_eeprom;
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const MODAL_EEP4K_HEADER *pModal = &ee->ee_base.modalHeader;
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if (! AR_SREV_KITE(ah))
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return 0;
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if (pModal->version < 3)
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return 0;
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ant_div_ctl1 = pModal->antdiv_ctl1;
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if ((ant_div_ctl1 & 0x1) && ((ant_div_ctl1 >> 3) & 0x1))
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return 1;
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return 0;
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}
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