584 lines
14 KiB
C
584 lines
14 KiB
C
/*-
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* Copyright (c) 2014-2015 Luiz Otavio O Souza <loos@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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/*
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* Driver for Maxim DS3231[N] real-time clock/calendar.
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*/
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#include "opt_platform.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/clock.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/sysctl.h>
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#include <dev/iicbus/iicbus.h>
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#include <dev/iicbus/iiconf.h>
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#ifdef FDT
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#include <dev/ofw/openfirm.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#endif
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#include <dev/iicbus/ds3231reg.h>
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#include "clock_if.h"
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#include "iicbus_if.h"
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struct ds3231_softc {
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device_t sc_dev;
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int sc_last_c;
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int sc_year0;
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struct intr_config_hook enum_hook;
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uint16_t sc_addr; /* DS3231 slave address. */
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uint8_t sc_ctrl;
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uint8_t sc_status;
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};
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static void ds3231_start(void *);
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static int
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ds3231_read(device_t dev, uint16_t addr, uint8_t reg, uint8_t *data, size_t len)
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{
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struct iic_msg msg[2] = {
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{ addr, IIC_M_WR | IIC_M_NOSTOP, 1, ® },
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{ addr, IIC_M_RD, len, data },
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};
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return (iicbus_transfer(dev, msg, nitems(msg)));
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}
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static int
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ds3231_write(device_t dev, uint16_t addr, uint8_t *data, size_t len)
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{
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struct iic_msg msg[1] = {
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{ addr, IIC_M_WR, len, data },
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};
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return (iicbus_transfer(dev, msg, nitems(msg)));
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}
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static int
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ds3231_ctrl_read(struct ds3231_softc *sc)
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{
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int error;
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sc->sc_ctrl = 0;
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error = ds3231_read(sc->sc_dev, sc->sc_addr, DS3231_CONTROL,
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&sc->sc_ctrl, sizeof(sc->sc_ctrl));
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if (error) {
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device_printf(sc->sc_dev, "cannot read from RTC.\n");
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return (error);
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}
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return (0);
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}
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static int
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ds3231_ctrl_write(struct ds3231_softc *sc)
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{
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int error;
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uint8_t data[2];
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data[0] = DS3231_CONTROL;
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/* Always enable the oscillator. Always disable both alarms. */
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data[1] = sc->sc_ctrl & ~DS3231_CTRL_MASK;
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error = ds3231_write(sc->sc_dev, sc->sc_addr, data, sizeof(data));
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if (error != 0)
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device_printf(sc->sc_dev, "cannot write to RTC.\n");
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return (error);
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}
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static int
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ds3231_status_read(struct ds3231_softc *sc)
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{
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int error;
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sc->sc_status = 0;
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error = ds3231_read(sc->sc_dev, sc->sc_addr, DS3231_STATUS,
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&sc->sc_status, sizeof(sc->sc_status));
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if (error) {
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device_printf(sc->sc_dev, "cannot read from RTC.\n");
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return (error);
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}
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return (0);
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}
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static int
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ds3231_status_write(struct ds3231_softc *sc, int clear_a1, int clear_a2)
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{
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int error;
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uint8_t data[2];
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data[0] = DS3231_STATUS;
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data[1] = sc->sc_status;
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if (clear_a1 == 0)
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data[1] |= DS3231_STATUS_A1F;
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if (clear_a2 == 0)
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data[1] |= DS3231_STATUS_A2F;
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error = ds3231_write(sc->sc_dev, sc->sc_addr, data, sizeof(data));
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if (error != 0)
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device_printf(sc->sc_dev, "cannot write to RTC.\n");
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return (error);
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}
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static int
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ds3231_set_24hrs_mode(struct ds3231_softc *sc)
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{
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int error;
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uint8_t data[2], hour;
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hour = 0;
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error = ds3231_read(sc->sc_dev, sc->sc_addr, DS3231_HOUR,
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&hour, sizeof(hour));
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if (error) {
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device_printf(sc->sc_dev, "cannot read from RTC.\n");
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return (error);
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}
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data[0] = DS3231_HOUR;
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data[1] = hour & ~DS3231_C_MASK;
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error = ds3231_write(sc->sc_dev, sc->sc_addr, data, sizeof(data));
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if (error != 0)
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device_printf(sc->sc_dev, "cannot write to RTC.\n");
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return (error);
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}
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static int
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ds3231_temp_read(struct ds3231_softc *sc, int *temp)
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{
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int error, neg, t;
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uint8_t buf8[2];
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uint16_t buf;
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error = ds3231_read(sc->sc_dev, sc->sc_addr, DS3231_TEMP,
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buf8, sizeof(buf8));
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if (error != 0)
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return (error);
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buf = (buf8[0] << 8) | (buf8[1] & 0xff);
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neg = 0;
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if (buf & DS3231_NEG_BIT) {
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buf = ~(buf & DS3231_TEMP_MASK) + 1;
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neg = 1;
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}
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*temp = ((int16_t)buf >> 8) * 10;
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t = 0;
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if (buf & DS3231_0250C)
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t += 250;
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if (buf & DS3231_0500C)
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t += 500;
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t /= 100;
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*temp += t;
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if (neg)
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*temp = -(*temp);
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*temp += TZ_ZEROC;
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return (0);
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}
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static int
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ds3231_temp_sysctl(SYSCTL_HANDLER_ARGS)
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{
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int error, temp;
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struct ds3231_softc *sc;
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sc = (struct ds3231_softc *)arg1;
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if (ds3231_temp_read(sc, &temp) != 0)
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return (EIO);
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error = sysctl_handle_int(oidp, &temp, 0, req);
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return (error);
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}
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static int
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ds3231_conv_sysctl(SYSCTL_HANDLER_ARGS)
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{
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int error, conv, newc;
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struct ds3231_softc *sc;
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sc = (struct ds3231_softc *)arg1;
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error = ds3231_ctrl_read(sc);
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if (error != 0)
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return (error);
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newc = conv = (sc->sc_ctrl & DS3231_CTRL_CONV) ? 1 : 0;
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error = sysctl_handle_int(oidp, &newc, 0, req);
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if (error != 0 || req->newptr == NULL)
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return (error);
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if (conv == 0 && newc != 0) {
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error = ds3231_status_read(sc);
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if (error != 0)
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return (error);
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if (sc->sc_status & DS3231_STATUS_BUSY)
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return (0);
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sc->sc_ctrl |= DS3231_CTRL_CONV;
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error = ds3231_ctrl_write(sc);
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if (error != 0)
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return (error);
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}
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return (error);
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}
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static int
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ds3231_bbsqw_sysctl(SYSCTL_HANDLER_ARGS)
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{
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int bbsqw, error, newb;
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struct ds3231_softc *sc;
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sc = (struct ds3231_softc *)arg1;
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error = ds3231_ctrl_read(sc);
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if (error != 0)
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return (error);
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bbsqw = newb = (sc->sc_ctrl & DS3231_CTRL_BBSQW) ? 1 : 0;
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error = sysctl_handle_int(oidp, &newb, 0, req);
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if (error != 0 || req->newptr == NULL)
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return (error);
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if (bbsqw != newb) {
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sc->sc_ctrl &= ~DS3231_CTRL_BBSQW;
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if (newb)
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sc->sc_ctrl |= DS3231_CTRL_BBSQW;
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error = ds3231_ctrl_write(sc);
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if (error != 0)
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return (error);
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}
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return (error);
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}
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static int
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ds3231_sqw_freq_sysctl(SYSCTL_HANDLER_ARGS)
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{
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int ds3231_sqw_freq[] = { 1, 1024, 4096, 8192 };
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int error, freq, i, newf, tmp;
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struct ds3231_softc *sc;
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sc = (struct ds3231_softc *)arg1;
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error = ds3231_ctrl_read(sc);
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if (error != 0)
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return (error);
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tmp = (sc->sc_ctrl & DS3231_CTRL_RS_MASK) >> DS3231_CTRL_RS_SHIFT;
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if (tmp >= nitems(ds3231_sqw_freq))
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tmp = nitems(ds3231_sqw_freq) - 1;
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freq = ds3231_sqw_freq[tmp];
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error = sysctl_handle_int(oidp, &freq, 0, req);
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if (error != 0 || req->newptr == NULL)
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return (error);
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if (freq != ds3231_sqw_freq[tmp]) {
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newf = 0;
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for (i = 0; i < nitems(ds3231_sqw_freq); i++)
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if (freq >= ds3231_sqw_freq[i])
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newf = i;
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sc->sc_ctrl &= ~DS3231_CTRL_RS_MASK;
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sc->sc_ctrl |= newf << DS3231_CTRL_RS_SHIFT;
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error = ds3231_ctrl_write(sc);
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if (error != 0)
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return (error);
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}
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return (error);
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}
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static int
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ds3231_str_sqw_mode(char *buf)
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{
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int len, rtrn;
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rtrn = -1;
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len = strlen(buf);
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if ((len > 2 && strncasecmp("interrupt", buf, len) == 0) ||
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(len > 2 && strncasecmp("int", buf, len) == 0)) {
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rtrn = 1;
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} else if ((len > 2 && strncasecmp("square-wave", buf, len) == 0) ||
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(len > 2 && strncasecmp("sqw", buf, len) == 0)) {
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rtrn = 0;
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}
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return (rtrn);
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}
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static int
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ds3231_sqw_mode_sysctl(SYSCTL_HANDLER_ARGS)
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{
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char buf[16];
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int error, mode, newm;
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struct ds3231_softc *sc;
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sc = (struct ds3231_softc *)arg1;
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error = ds3231_ctrl_read(sc);
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if (error != 0)
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return (error);
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if (sc->sc_ctrl & DS3231_CTRL_INTCN) {
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mode = 1;
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strlcpy(buf, "interrupt", sizeof(buf));
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} else {
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mode = 0;
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strlcpy(buf, "square-wave", sizeof(buf));
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}
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error = sysctl_handle_string(oidp, buf, sizeof(buf), req);
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if (error != 0 || req->newptr == NULL)
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return (error);
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newm = ds3231_str_sqw_mode(buf);
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if (newm != -1 && mode != newm) {
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sc->sc_ctrl &= ~DS3231_CTRL_INTCN;
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if (newm == 1)
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sc->sc_ctrl |= DS3231_CTRL_INTCN;
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error = ds3231_ctrl_write(sc);
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if (error != 0)
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return (error);
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}
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return (error);
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}
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static int
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ds3231_en32khz_sysctl(SYSCTL_HANDLER_ARGS)
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{
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int error, en32khz, tmp;
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struct ds3231_softc *sc;
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sc = (struct ds3231_softc *)arg1;
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error = ds3231_status_read(sc);
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if (error != 0)
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return (error);
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tmp = en32khz = (sc->sc_status & DS3231_STATUS_EN32KHZ) ? 1 : 0;
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error = sysctl_handle_int(oidp, &en32khz, 0, req);
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if (error != 0 || req->newptr == NULL)
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return (error);
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if (en32khz != tmp) {
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sc->sc_status &= ~DS3231_STATUS_EN32KHZ;
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if (en32khz)
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sc->sc_status |= DS3231_STATUS_EN32KHZ;
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error = ds3231_status_write(sc, 0, 0);
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if (error != 0)
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return (error);
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}
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return (error);
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}
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static int
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ds3231_probe(device_t dev)
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{
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#ifdef FDT
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if (!ofw_bus_status_okay(dev))
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return (ENXIO);
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if (!ofw_bus_is_compatible(dev, "maxim,ds3231"))
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return (ENXIO);
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#endif
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device_set_desc(dev, "Maxim DS3231 RTC");
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return (BUS_PROBE_DEFAULT);
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}
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static int
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ds3231_attach(device_t dev)
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{
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struct ds3231_softc *sc;
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sc = device_get_softc(dev);
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sc->sc_dev = dev;
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sc->sc_addr = iicbus_get_addr(dev);
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sc->sc_last_c = -1;
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sc->sc_year0 = 1900;
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sc->enum_hook.ich_func = ds3231_start;
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sc->enum_hook.ich_arg = dev;
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/*
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* We have to wait until interrupts are enabled. Usually I2C read
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* and write only works when the interrupts are available.
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*/
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if (config_intrhook_establish(&sc->enum_hook) != 0)
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return (ENOMEM);
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return (0);
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}
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static void
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ds3231_start(void *xdev)
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{
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device_t dev;
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struct ds3231_softc *sc;
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struct sysctl_ctx_list *ctx;
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struct sysctl_oid *tree_node;
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struct sysctl_oid_list *tree;
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dev = (device_t)xdev;
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sc = device_get_softc(dev);
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ctx = device_get_sysctl_ctx(dev);
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tree_node = device_get_sysctl_tree(dev);
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tree = SYSCTL_CHILDREN(tree_node);
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config_intrhook_disestablish(&sc->enum_hook);
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if (ds3231_ctrl_read(sc) != 0)
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return;
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if (ds3231_status_read(sc) != 0)
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return;
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/* Clear the OSF bit and ack any pending alarm interrupt. */
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if (sc->sc_status & DS3231_STATUS_OSF) {
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device_printf(sc->sc_dev,
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"oscillator has stopped, check the battery.\n");
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sc->sc_status &= ~DS3231_STATUS_OSF;
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}
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if (ds3231_status_write(sc, 1, 1) != 0)
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return;
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/* Always enable the oscillator. */
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if (ds3231_ctrl_write(sc) != 0)
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return;
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/* Set the 24 hours mode. */
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if (ds3231_set_24hrs_mode(sc) != 0)
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return;
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/* Temperature. */
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SYSCTL_ADD_PROC(ctx, tree, OID_AUTO, "temperature",
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CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_MPSAFE, sc, 0,
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ds3231_temp_sysctl, "IK", "Current temperature");
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/* Configuration parameters. */
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SYSCTL_ADD_PROC(ctx, tree, OID_AUTO, "temp_conv",
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CTLFLAG_RW | CTLTYPE_UINT | CTLFLAG_MPSAFE, sc, 0,
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ds3231_conv_sysctl, "IU",
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"DS3231 start a new temperature converstion");
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SYSCTL_ADD_PROC(ctx, tree, OID_AUTO, "bbsqw",
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CTLFLAG_RW | CTLTYPE_UINT | CTLFLAG_MPSAFE, sc, 0,
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ds3231_bbsqw_sysctl, "IU",
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"DS3231 battery-backed square-wave output enable");
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SYSCTL_ADD_PROC(ctx, tree, OID_AUTO, "sqw_freq",
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CTLFLAG_RW | CTLTYPE_UINT | CTLFLAG_MPSAFE, sc, 0,
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ds3231_sqw_freq_sysctl, "IU",
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"DS3231 square-wave output frequency");
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SYSCTL_ADD_PROC(ctx, tree, OID_AUTO, "sqw_mode",
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CTLFLAG_RW | CTLTYPE_STRING | CTLFLAG_MPSAFE, sc, 0,
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ds3231_sqw_mode_sysctl, "A", "DS3231 SQW output mode control");
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SYSCTL_ADD_PROC(ctx, tree, OID_AUTO, "32khz_enable",
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CTLFLAG_RW | CTLTYPE_UINT | CTLFLAG_MPSAFE, sc, 0,
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ds3231_en32khz_sysctl, "IU", "DS3231 enable the 32kHz output");
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/* 1 second resolution. */
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clock_register(dev, 1000000);
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}
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static int
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ds3231_gettime(device_t dev, struct timespec *ts)
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{
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int c, error;
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struct clocktime ct;
|
|
struct ds3231_softc *sc;
|
|
uint8_t data[7];
|
|
|
|
sc = device_get_softc(dev);
|
|
memset(data, 0, sizeof(data));
|
|
error = ds3231_read(sc->sc_dev, sc->sc_addr, DS3231_SECS,
|
|
data, sizeof(data));
|
|
if (error != 0) {
|
|
device_printf(dev, "cannot read from RTC.\n");
|
|
return (error);
|
|
}
|
|
ct.nsec = 0;
|
|
ct.sec = FROMBCD(data[DS3231_SECS] & DS3231_SECS_MASK);
|
|
ct.min = FROMBCD(data[DS3231_MINS] & DS3231_MINS_MASK);
|
|
ct.hour = FROMBCD(data[DS3231_HOUR] & DS3231_HOUR_MASK);
|
|
ct.day = FROMBCD(data[DS3231_DATE] & DS3231_DATE_MASK);
|
|
ct.dow = data[DS3231_WEEKDAY] & DS3231_WEEKDAY_MASK;
|
|
ct.mon = FROMBCD(data[DS3231_MONTH] & DS3231_MONTH_MASK);
|
|
ct.year = FROMBCD(data[DS3231_YEAR] & DS3231_YEAR_MASK);
|
|
c = (data[DS3231_MONTH] & DS3231_C_MASK) ? 1 : 0;
|
|
if (sc->sc_last_c == -1)
|
|
sc->sc_last_c = c;
|
|
else if (c != sc->sc_last_c) {
|
|
sc->sc_year0 += 100;
|
|
sc->sc_last_c = c;
|
|
}
|
|
ct.year += sc->sc_year0;
|
|
if (ct.year < POSIX_BASE_YEAR)
|
|
ct.year += 100; /* assume [1970, 2069] */
|
|
|
|
return (clock_ct_to_ts(&ct, ts));
|
|
}
|
|
|
|
static int
|
|
ds3231_settime(device_t dev, struct timespec *ts)
|
|
{
|
|
int error;
|
|
struct clocktime ct;
|
|
struct ds3231_softc *sc;
|
|
uint8_t data[8];
|
|
|
|
sc = device_get_softc(dev);
|
|
/* Accuracy is only one second. */
|
|
if (ts->tv_nsec >= 500000000)
|
|
ts->tv_sec++;
|
|
ts->tv_nsec = 0;
|
|
clock_ts_to_ct(ts, &ct);
|
|
memset(data, 0, sizeof(data));
|
|
data[0] = DS3231_SECS;
|
|
data[DS3231_SECS + 1] = TOBCD(ct.sec);
|
|
data[DS3231_MINS + 1] = TOBCD(ct.min);
|
|
data[DS3231_HOUR + 1] = TOBCD(ct.hour);
|
|
data[DS3231_DATE + 1] = TOBCD(ct.day);
|
|
data[DS3231_WEEKDAY + 1] = ct.dow;
|
|
data[DS3231_MONTH + 1] = TOBCD(ct.mon);
|
|
data[DS3231_YEAR + 1] = TOBCD(ct.year % 100);
|
|
if (sc->sc_last_c)
|
|
data[DS3231_MONTH] |= DS3231_C_MASK;
|
|
/* Write the time back to RTC. */
|
|
error = ds3231_write(dev, sc->sc_addr, data, sizeof(data));
|
|
if (error != 0)
|
|
device_printf(dev, "cannot write to RTC.\n");
|
|
|
|
return (error);
|
|
}
|
|
|
|
static device_method_t ds3231_methods[] = {
|
|
DEVMETHOD(device_probe, ds3231_probe),
|
|
DEVMETHOD(device_attach, ds3231_attach),
|
|
|
|
DEVMETHOD(clock_gettime, ds3231_gettime),
|
|
DEVMETHOD(clock_settime, ds3231_settime),
|
|
|
|
DEVMETHOD_END
|
|
};
|
|
|
|
static driver_t ds3231_driver = {
|
|
"ds3231",
|
|
ds3231_methods,
|
|
sizeof(struct ds3231_softc),
|
|
};
|
|
|
|
static devclass_t ds3231_devclass;
|
|
|
|
DRIVER_MODULE(ds3231, iicbus, ds3231_driver, ds3231_devclass, NULL, NULL);
|
|
MODULE_VERSION(ds3231, 1);
|
|
MODULE_DEPEND(ds3231, iicbus, 1, 1, 1);
|