c5f838abdb
- TEST_CPUSTOP adds stop_cpus()/restart_cpus(), OFF by default - TEST_ALTTIMER new method for attaching 8259 PIC to APIC this method avoids 'ExtInt' programming, ON by default - TIMER_ALL sends 8259/8254 timer INTs to all CPUs, ON by default - ASMPOSTCODExxx code to display bytes to POST hardware, OFF by default
142 lines
3.9 KiB
C
142 lines
3.9 KiB
C
/*
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* ----------------------------------------------------------------------------
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* "THE BEER-WARE LICENSE" (Revision 42):
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* <phk@FreeBSD.org> wrote this file. As long as you retain this notice you
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* can do whatever you want with this stuff. If we meet some day, and you think
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* this stuff is worth it, you can buy me a beer in return. Poul-Henning Kamp
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* ----------------------------------------------------------------------------
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*
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* $Id: smp.h,v 1.7 1997/07/13 00:26:07 smp Exp smp $
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*
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*/
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#ifndef _MACHINE_SMP_H_
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#define _MACHINE_SMP_H_
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#ifdef KERNEL
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#if defined(SMP) && !defined(APIC_IO)
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# error APIC_IO required for SMP, add "options APIC_IO" to your config file.
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#endif /* SMP && !APIC_IO */
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#if defined(SMP) && !defined(NCPU)
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# define NCPU 2
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#endif /* SMP && NCPU */
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#if defined(SMP) || defined(APIC_IO)
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/*
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* For sending values to POST displays.
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* XXX FIXME: where does this really belong, isa.h/isa.c perhaps?
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*/
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extern int current_postcode; /** XXX currently in mp_machdep.c */
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#define POSTCODE(X) current_postcode = (X), \
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outb(0x80, current_postcode)
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#define POSTCODE_LO(X) current_postcode &= 0xf0, \
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current_postcode |= ((X) & 0x0f), \
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outb(0x80, current_postcode)
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#define POSTCODE_HI(X) current_postcode &= 0x0f, \
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current_postcode |= (((X) << 4) & 0xf0), \
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outb(0x80, current_postcode)
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#include <machine/apic.h>
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/* global data in mpboot.s */
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extern int bootMP_size;
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/* functions in mpboot.s */
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void bootMP __P((void));
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/* global data in mplock.s */
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extern u_int mp_lock;
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/* functions in mplock.s */
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void get_mplock __P((void));
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void rel_mplock __P((void));
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void try_mplock __P((void));
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/* global data in apic_vector.s */
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extern volatile u_int stopped_cpus;
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extern volatile u_int started_cpus;
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/* global data in mp_machdep.c */
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extern int mp_ncpus;
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extern int mp_naps;
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extern int mp_nbusses;
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extern int mp_napics;
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extern int mp_picmode;
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extern int boot_cpu_id;
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extern vm_offset_t cpu_apic_address;
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extern vm_offset_t io_apic_address[];
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extern u_int32_t cpu_apic_versions[];
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extern u_int32_t io_apic_versions[];
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extern int cpu_num_to_apic_id[];
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extern int io_num_to_apic_id[];
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extern int apic_id_to_logical[];
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extern u_int all_cpus;
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extern u_int SMP_prvpt[];
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extern u_char SMP_ioapic[];
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/* functions in mp_machdep.c */
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u_int mp_bootaddress __P((u_int));
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int mp_probe __P((void));
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void mp_start __P((void));
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void mp_announce __P((void));
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u_int isa_apic_mask __P((u_int));
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int isa_apic_pin __P((int));
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int pci_apic_pin __P((int, int, int));
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int undirect_isa_irq __P((int));
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int undirect_pci_irq __P((int));
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int apic_bus_type __P((int));
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int apic_src_bus_id __P((int, int));
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int apic_src_bus_irq __P((int, int));
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int apic_int_type __P((int, int));
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int apic_trigger __P((int, int));
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int apic_polarity __P((int, int));
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void bsp_apic_configure __P((void));
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void init_secondary __P((void));
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void smp_invltlb __P((void));
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int stop_cpus __P((u_int));
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int restart_cpus __P((u_int));
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/* global data in mpapic.c */
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extern volatile lapic_t lapic;
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#if defined(MULTIPLE_IOAPICS)
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#error MULTIPLE_IOAPICSXXX
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#else
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extern volatile ioapic_t *ioapic[];
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#endif /* MULTIPLE_IOAPICS */
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/* functions in mpapic.c */
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void apic_dump __P((void));
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void apic_initialize __P((void));
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int apic_ipi __P((int, int, int));
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int selected_apic_ipi __P((u_int, int, int));
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int io_apic_setup __P((int));
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int ext_int_setup __P((int, int));
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void write_io_apic_mask24 __P((int, u_int32_t));
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#if defined(READY)
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void clr_io_apic_mask24 __P((int, u_int32_t));
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void set_io_apic_mask24 __P((int, u_int32_t));
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#endif /* READY */
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void set_apic_timer __P((int));
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int read_apic_timer __P((void));
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void u_sleep __P((int));
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/* global data in init_smp.c */
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extern int smp_active;
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extern int invltlb_ok;
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/* 'private' global data in locore.s */
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extern volatile u_int cpuid;
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extern volatile u_int cpu_lockid;
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extern volatile u_int other_cpus;
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#endif /* SMP || APIC_IO */
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#endif /* KERNEL */
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#endif /* _MACHINE_SMP_H_ */
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