1a7c0630db
for this file, but here goes nothing. This was my first attempt at tidying up this file. Unfortunately, it just exposes many more horrors in the code itself that had been masked by the eyesore that was there before. I think this just needs to be put out of its misery.
1139 lines
32 KiB
C
1139 lines
32 KiB
C
/*
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* GPIB driver for FreeBSD.
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* Version 0.1 (No interrupts, no DMA)
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* Supports National Instruments AT-GPIB and AT-GPIB/TNT boards.
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* (AT-GPIB not tested, but it should work)
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*
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* Written by Fred Cawthorne (fcawth@delphi.umd.edu)
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* Some sections were based partly on the lpt driver.
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* (some remnants may remain)
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*
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* This software is distributed with NO WARRANTIES, not even the implied
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* warranties for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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*
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* The author grants any other persons or organizations permission to use
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* or modify this software as long as this message is kept with the software,
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* all derivative works or modified versions.
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*
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* $FreeBSD$
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*/
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/* Please read the README file for usage information */
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/conf.h>
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#include <sys/uio.h>
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#include <sys/malloc.h>
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#include <sys/bus.h>
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#include <i386/isa/gpibreg.h>
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#include <i386/isa/gpib.h>
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#include <i386/isa/isa_device.h>
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#ifndef COMPAT_OLDISA
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#error "The gpib device requires the old isa compatibility shims"
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#endif
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#define MIN(a, b) ((a < b) ? a : b)
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#define GPIBPRI (PZERO + 8) | PCATCH
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#define SLEEP_MAX 1000
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#define SLEEP_MIN 4
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static int initgpib(void);
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static void closegpib(void);
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static int sendgpibfifo(unsigned char device, char *data, int count);
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static int sendrawgpibfifo(unsigned char device, char *data, int count);
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static int readgpibfifo(unsigned char device, char *data, int count);
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#if 0
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static void showregs(void);
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#endif
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static void enableremote(unsigned char device);
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static void gotolocal(unsigned char device);
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static void menableremote(unsigned char *device);
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static void mgotolocal(unsigned char *device);
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static void mtrigger(unsigned char *device);
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static void trigger(unsigned char device);
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static char spoll(unsigned char device);
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static int gpprobe(struct isa_device *dvp);
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static int gpattach(struct isa_device *dvp);
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struct isa_driver gpdriver = {
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INTR_TYPE_TTY,
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gpprobe,
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gpattach,
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"gp"
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};
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COMPAT_ISA_DRIVER(gp, gpdriver);
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static d_open_t gpopen;
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static d_close_t gpclose;
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static d_write_t gpwrite;
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static d_ioctl_t gpioctl;
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#define CDEV_MAJOR 44
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static struct cdevsw gp_cdevsw = {
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/* open */ gpopen,
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/* close */ gpclose,
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/* read */ noread,
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/* write */ gpwrite,
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/* ioctl */ gpioctl,
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/* poll */ nopoll,
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/* mmap */ nommap,
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/* strategy */ nostrategy,
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/* name */ "gp",
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/* maj */ CDEV_MAJOR,
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/* dump */ nodump,
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/* psize */ nopsize,
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/* flags */ 0,
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};
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#define BUFSIZE 1024
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#define ATTACHED 0x08
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#define OPEN 0x04
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#define INIT 0x02
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static struct gpib_softc {
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char *sc_cp; /* current data to send */
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int sc_count; /* bytes queued in sc_inbuf */
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int sc_type; /* Type of gpib controller */
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u_char sc_flags; /* flags (open and internal) */
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char sc_unit; /* gpib device number */
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char *sc_inbuf; /* buffer for data */
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} gpib_sc; /* only support one of these? */
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static int oldcount;
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static char oldbytes[2];
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/*
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* Probe routine
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* This needs to be changed to be a bit more robust
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*/
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static int
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gpprobe(struct isa_device *dvp)
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{
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int status;
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struct gpib_softc *sc = &gpib_sc;
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gpib_port = dvp->id_iobase;
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status = 1;
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sc->sc_type = 3;
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if ((inb(KSR) & 0xF7) == 0x34)
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sc->sc_type = 3;
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else if ((inb(KSR) & 0xF7) == 0x24)
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sc->sc_type = 2;
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else if ((inb(KSR) & 0xF7) == 0x14)
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sc->sc_type = 1;
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else
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status = 0;
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return (status);
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}
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/*
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* gpattach()
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* Attach device and print the type of card to the screen.
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*/
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static int
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gpattach(isdp)
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struct isa_device *isdp;
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{
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struct gpib_softc *sc = &gpib_sc;
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sc->sc_unit = isdp->id_unit;
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if (sc->sc_type == 3)
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printf ("gp%d: type AT-GPIB/TNT\n", sc->sc_unit);
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if (sc->sc_type == 2)
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printf ("gp%d: type AT-GPIB chip NAT4882B\n", sc->sc_unit);
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if (sc->sc_type == 1)
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printf ("gp%d: type AT-GPIB chip NAT4882A\n", sc->sc_unit);
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sc->sc_flags |= ATTACHED;
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make_dev(&gp_cdevsw, 0, 0, 0, 0600, "gp");
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return (1);
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}
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/*
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* gpopen()
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* New open on device.
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*
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* More than 1 open is not allowed on the entire device.
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* i.e. even if gpib5 is open, we can't open another minor device
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*/
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static int
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gpopen(dev, flags, fmt, td)
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dev_t dev;
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int flags;
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int fmt;
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struct thread *td;
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{
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struct gpib_softc *sc = &gpib_sc;
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u_char unit;
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int status;
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unit = minor(dev);
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/* minor number out of limits ? */
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if (unit >= 32)
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return (ENXIO);
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/* Attached ? */
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if (!(sc->sc_flags&ATTACHED)) /* not attached */
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return (ENXIO);
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/* Already open */
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if (sc->sc_flags&OPEN) /* too late .. */
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return (EBUSY);
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/* Have memory for buffer? */
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sc->sc_inbuf = malloc(BUFSIZE, M_DEVBUF, M_WAITOK);
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if (sc->sc_inbuf == 0)
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return (ENOMEM);
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if (initgpib()) return (EBUSY);
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sc->sc_flags |= OPEN;
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sc->sc_count = 0;
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oldcount = 0;
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if (unit != 0) { /* Someone is trying to access an actual device */
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/* So.. we'll address it to listen */
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enableremote(unit);
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do {
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status = inb(ISR2);
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} while (!(status & 8) && tsleep((caddr_t)&gpib_sc, GPIBPRI,
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"gpibpoll", 1) == EWOULDBLOCK);
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outb(CDOR, (unit & 31) + 32); /* address device to listen */
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do
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status = inb(ISR2);
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while (!(status & 8) && tsleep((caddr_t)&gpib_sc, GPIBPRI,
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"gpibpoll", 1) == EWOULDBLOCK);
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outb(CDOR, 64); /* Address controller (me) to talk */
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do {
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status = inb(ISR2);
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} while (!(status & 8) && tsleep((caddr_t)&gpib_sc, GPIBPRI,
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"gpibpoll", 1) == EWOULDBLOCK);
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outb(AUXMR, gts); /* Set to Standby (Controller) */
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do {
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status = inb(ISR1);
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} while (!(status & 2) && tsleep((caddr_t)&gpib_sc, GPIBPRI,
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"gpibpoll", 1) == EWOULDBLOCK);
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/* Set up the TURBO488 registers */
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outb(IMR2, 0x30); /* we have to enable DMA (0x30) for turbo488 to work */
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outb(CNT0, 0); /* NOTE this does not enable DMA to the host computer!! */
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outb(CNT1, 0);
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outb(CNT2, 0);
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outb(CNT3, 0);
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outb(CMDR, 0x20);
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outb(CFG, 0x47); /* 16 bit, write, fifo B first, TMOE TIM */
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outb(CMDR, 0x10); /* RESET fifos */
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outb(CMDR, 0x04); /* Tell TURBO488 to GO */
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}
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return (0);
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}
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/*
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* gpclose()
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* Close gpib device.
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*/
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static int
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gpclose(dev, flags, fmt, td)
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dev_t dev;
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int flags;
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int fmt;
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struct thread *td;
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{
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struct gpib_softc *sc = &gpib_sc;
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unsigned char unit;
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unsigned char status;
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unit = minor(dev);
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if (unit != 0) { /* Here we need to send the last character with EOS */
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/* and unaddress the listening device */
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status = EWOULDBLOCK;
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/* Wait for fifo to become empty */
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do {
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status = tsleep((caddr_t)&gpib_sc, GPIBPRI, "gpibpoll", 1);
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} while ((inb(ISR3) & 0x04) && status == EWOULDBLOCK); /* Fifo is not empty */
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outb(CMDR, 0x08); /* Issue STOP to TURBO488 */
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/* Wait for DONE and STOP */
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if (status == EWOULDBLOCK) do {
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status = tsleep((caddr_t)&gpib_sc, GPIBPRI, "gpibpoll", 1);
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} while (!(inb(ISR3) & 0x11) && status == EWOULDBLOCK); /* not done and stop */
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/* Shut down TURBO488 */
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outb(IMR2, 0x00); /* DISABLE DMA to turbo488 */
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outb(CMDR, 0x20); /* soft reset turbo488 */
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outb(CMDR, 0x10); /* reset fifos */
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/* Send last byte with EOI set */
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/* Send second to last byte if there are 2 bytes left */
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if (status == EWOULDBLOCK) {
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do {
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if (!(inb(ISR1) & 2)) status = tsleep((caddr_t)&gpib_sc, GPIBPRI, "gpibpoll", 1);
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} while (!(inb(ISR1) & 2) && (status == EWOULDBLOCK));
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if (oldcount == 2) {
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outb(CDOR, oldbytes[0]); /* Send second to last byte */
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while (!(inb(ISR1) & 2) && (status == EWOULDBLOCK));
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status = tsleep((caddr_t)&gpib_sc, GPIBPRI,
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"gpibpoll", 1);
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}
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outb(AUXMR, seoi); /* Set EOI for the last byte */
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outb(AUXMR, 0x5E); /* Clear SYNC */
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if (oldcount == 1)
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outb(CDOR, oldbytes[0]);
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else
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if (oldcount == 2)
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outb(CDOR, oldbytes[1]);
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else {
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outb(CDOR, 13); /* Send a CR.. we've got trouble */
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printf("gpib: Warning: gpclose called with nothing left in buffer\n");
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}
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}
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do {
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if (!(inb(ISR1) & 2)) status = tsleep((caddr_t)&gpib_sc,
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GPIBPRI, "gpibpoll", 1);
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} while (!(inb(ISR1) & 2) && (status == EWOULDBLOCK));
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if (!(inb(ISR1) & 2) && status == EWOULDBLOCK) do {
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status = tsleep((caddr_t)&gpib_sc, GPIBPRI, "gpibpoll", 1);
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} while (!(inb(ISR1) & 2) && status == EWOULDBLOCK);
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outb(AUXMR, tca); /* Regain full control of the bus */
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do {
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status = inb(ISR2);
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} while (!(status & 8) && tsleep((caddr_t)&gpib_sc, GPIBPRI,
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"gpibpoll", 1) == EWOULDBLOCK);
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outb(CDOR, 63); /* unlisten */
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do {
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status = inb(ISR2);
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} while (!(status & 8) && tsleep((caddr_t)&gpib_sc, GPIBPRI,
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"gpibpoll", 1) == EWOULDBLOCK);
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outb(AUXMR, 0x5E); /* Clear SYNC */
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outb(CDOR, 95); /* untalk */
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do {
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status = inb(ISR2);
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} while (!(status & 8) && tsleep((caddr_t)&gpib_sc, GPIBPRI,
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"gpibpoll", 1) == EWOULDBLOCK);
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#if 0
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gotolocal(minor(dev));
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#endif
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}
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closegpib();
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sc->sc_flags = ATTACHED;
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free(sc->sc_inbuf, M_DEVBUF);
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sc->sc_inbuf = 0; /* Sanity */
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return (0);
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}
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/*
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* gpwrite()
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* Copy from user's buffer, then write to GPIB device referenced
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* by minor(dev).
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*/
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static int
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gpwrite(dev, uio, ioflag)
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dev_t dev;
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struct uio *uio;
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int ioflag;
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{
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int err, count;
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/* main loop */
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while ((gpib_sc.sc_count = MIN(BUFSIZE-1, uio->uio_resid)) > 0) {
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/* If there were >1 bytes left over, send them */
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if (oldcount == 2)
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sendrawgpibfifo(minor(dev), oldbytes, 2);
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/* If there was 1 character left, put it at the beginning
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of the new buffer */
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if (oldcount == 1) {
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(gpib_sc.sc_inbuf)[0] = oldbytes[0];
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gpib_sc.sc_cp = gpib_sc.sc_inbuf;
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/* get from user-space */
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uiomove(gpib_sc.sc_inbuf + 1, gpib_sc.sc_count, uio);
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gpib_sc.sc_count++;
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} else {
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gpib_sc.sc_cp = gpib_sc.sc_inbuf;
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/* get from user-space */
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uiomove(gpib_sc.sc_inbuf, gpib_sc.sc_count, uio);
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}
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|
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/*
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* NOTE we always leave one byte in case this is the last write
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* so close can send EOI with the last byte There may be 2 bytes
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* since we are doing 16 bit transfers.(note the -1 in the count below)
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*/
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|
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/* If count <= 2 we'll either pick it up on the next write or on close */
|
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if (gpib_sc.sc_count>2) {
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count = sendrawgpibfifo(minor(dev), gpib_sc.sc_cp, gpib_sc.sc_count-1);
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err = !count;
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if (err)
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return (1);
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oldcount = gpib_sc.sc_count-count; /* Set # of remaining bytes */
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gpib_sc.sc_count -= count;
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gpib_sc.sc_cp += count; /* point char pointer to remaining bytes */
|
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}
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else
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oldcount = gpib_sc.sc_count;
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oldbytes[0] = gpib_sc.sc_cp[0];
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if (oldcount == 2)
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oldbytes[1] = gpib_sc.sc_cp[1];
|
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}
|
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return (0);
|
|
}
|
|
|
|
/*
|
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* Here is how you would usually access a GPIB device
|
|
* An exception would be a plotter or printer that you can just
|
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* write to using a minor device = its GPIB address
|
|
*/
|
|
|
|
static int
|
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gpioctl(dev_t dev, u_long cmd, caddr_t data, int flags, struct thread *td)
|
|
{
|
|
struct gpibdata *gd = (struct gpibdata *)data;
|
|
int error, result;
|
|
error = 0;
|
|
|
|
switch (cmd) {
|
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case GPIBWRITE:
|
|
sendgpibfifo(gd->address, gd->data, *(gd->count));
|
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error = 0;
|
|
break;
|
|
case GPIBREAD:
|
|
result = readgpibfifo(gd->address, gd->data, *(gd->count));
|
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*(gd->count) = result;
|
|
error = 0;
|
|
break;
|
|
case GPIBINIT:
|
|
initgpib();
|
|
error = 0;
|
|
break;
|
|
case GPIBTRIGGER:
|
|
trigger(gd->address);
|
|
error = 0;
|
|
break;
|
|
case GPIBREMOTE:
|
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enableremote(gd->address);
|
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error = 0;
|
|
break;
|
|
case GPIBLOCAL:
|
|
gotolocal(gd->address);
|
|
error = 0;
|
|
break;
|
|
case GPIBMTRIGGER:
|
|
mtrigger(gd->data);
|
|
error = 0;
|
|
break;
|
|
case GPIBMREMOTE:
|
|
menableremote(gd->data);
|
|
error = 0;
|
|
break;
|
|
case GPIBMLOCAL:
|
|
mgotolocal(gd->data);
|
|
error = 0;
|
|
break;
|
|
case GPIBSPOLL:
|
|
*(gd->data) = spoll(gd->address);
|
|
error = 0;
|
|
break;
|
|
default:
|
|
error = ENODEV;
|
|
}
|
|
|
|
return (error);
|
|
}
|
|
|
|
#if 0
|
|
/* Just in case you want a dump of the registers... */
|
|
|
|
static void showregs() {
|
|
printf ("NAT4882:\n");
|
|
printf ("ISR1=%X\t", inb(ISR1));
|
|
printf ("ISR2=%X\t", inb(ISR2));
|
|
printf ("SPSR=%X\t", inb(SPSR));
|
|
printf ("KSR =%X\t", inb(KSR));
|
|
printf ("ADSR=%X\t", inb(ADSR));
|
|
printf ("CPTR=%X\t", inb(CPTR));
|
|
printf ("SASR=%X\t", inb(SASR));
|
|
printf ("ADR0=%X\t", inb(ADR0));
|
|
printf ("ISR0=%X\t", inb(ISR0));
|
|
printf ("ADR1=%X\t", inb(ADR1));
|
|
printf ("BSR =%X\n", inb(BSR));
|
|
|
|
printf ("Turbo488\n");
|
|
printf ("STS1=%X ", inb(STS1));
|
|
printf ("STS2=%X ", inb(STS2));
|
|
printf ("ISR3=%X ", inb(ISR3));
|
|
printf ("CNT0=%X ", inb(CNT0));
|
|
printf ("CNT1=%X ", inb(CNT1));
|
|
printf ("CNT2=%X ", inb(CNT2));
|
|
printf ("CNT3=%X ", inb(CNT3));
|
|
printf ("IMR3=%X ", inb(IMR3));
|
|
printf ("TIMER=%X\n", inb(TIMER));
|
|
}
|
|
#endif
|
|
|
|
/*
|
|
* Set up the NAT4882 and TURBO488 registers
|
|
* This will be nonsense to you unless you have a data sheet from
|
|
* National Instruments. They should give you one if you call them
|
|
*/
|
|
|
|
static int
|
|
initgpib()
|
|
{
|
|
outb(CMDR, 0x20);
|
|
outb(CFG, 0x16);
|
|
outb(IMR3, 0);
|
|
outb(CMDR, 0x10);
|
|
outb(CNT0, 0);
|
|
outb(CNT1, 0);
|
|
outb(CNT2, 0);
|
|
outb(CNT3, 0);
|
|
outb(INTR, 0); /* Put interrupt line in tri-state mode?? */
|
|
outb(AUXMR, chip_reset);
|
|
|
|
outb(IMR1, 0x10); /* send interrupt to TURBO488 when END received */
|
|
outb(IMR2, 0);
|
|
outb(IMR0, 0x90); /* Do we want nba here too??? */
|
|
outb(ADMR, 1);
|
|
outb(ADR, 0);
|
|
outb(ADR, 128);
|
|
outb(AUXMR, 0xE9);
|
|
outb(AUXMR, 0x49);
|
|
outb(AUXMR, 0x70);
|
|
outb(AUXMR, 0xD0);
|
|
outb(AUXMR, 0xA0);
|
|
|
|
outb(EOSR, 10); /* set EOS message to newline */
|
|
/* should I make the default to interpret END as EOS? */
|
|
/* It isn't now. The following changes this */
|
|
outb(AUXMR, 0x80); /* No special EOS handling */
|
|
#if 0
|
|
outb(AUXMR, 0x88) /* Transmit END with EOS */
|
|
outb(AUXMR, 0x84) /* Set END on EOS received */
|
|
outb(AUXMR, 0x8C) /* Do both of the above */
|
|
#endif
|
|
|
|
#if 0
|
|
/* Not currently supported */
|
|
outb(AUXMR, hldi); /* Perform RFD Holdoff for all data in */
|
|
#endif
|
|
|
|
outb(AUXMR, pon);
|
|
outb(AUXMR, sic_rsc);
|
|
tsleep((caddr_t)&gpib_sc, GPIBPRI, "gpibpoll", 1);
|
|
|
|
outb(AUXMR, sic_rsc_off);
|
|
|
|
return (0);
|
|
}
|
|
|
|
/* This is kind of Brute force.. But it works */
|
|
|
|
static void
|
|
closegpib()
|
|
{
|
|
outb(AUXMR, chip_reset);
|
|
}
|
|
|
|
/*
|
|
* GPIB ROUTINES:
|
|
* These will also make little sense unless you have a data sheet.
|
|
* Note that the routines with an "m" in the beginning are for
|
|
* accessing multiple devices in one call
|
|
*/
|
|
|
|
/*
|
|
* This is one thing I could not figure out how to do correctly.
|
|
* I tried to use the auxilary command to enable remote, but it
|
|
* never worked. Here, I bypass everything and write to the BSR
|
|
* to enable the remote line. NOTE that these lines are effectively
|
|
* "OR'ed" with the actual lines, so writing a 1 to the bit in the BSR
|
|
* forces the GPIB line true, no matter what the fancy circuitry of the
|
|
* NAT4882 wants to do with it
|
|
*/
|
|
|
|
static void
|
|
enableremote(unsigned char device)
|
|
{
|
|
int status;
|
|
|
|
status = EWOULDBLOCK;
|
|
if (status == EWOULDBLOCK) do {
|
|
status = tsleep((caddr_t)&gpib_sc, GPIBPRI, "gpibpoll", 2);
|
|
} while (!(inb(ISR2) & 0x08) && status == EWOULDBLOCK); /* Wait to send next cmd */
|
|
|
|
outb(BSR, 1); /* Set REN bit on GPIB */
|
|
if (status == EWOULDBLOCK) do {
|
|
status = tsleep((caddr_t)&gpib_sc, GPIBPRI, "gpibpoll", 2);
|
|
} while (!(inb(ISR2) & 0x08) && status == EWOULDBLOCK); /* Wait to send next cmd */
|
|
outb(CDOR, (device & 31) + 32); /* address device to listen */
|
|
if (status == EWOULDBLOCK) do {
|
|
status = tsleep((caddr_t)&gpib_sc, GPIBPRI, "gpibpoll", 2);
|
|
} while (!(inb(ISR2) & 0x08) && status == EWOULDBLOCK); /* Wait to send next cmd */
|
|
outb(CDOR, 63); /* Unaddress device */
|
|
if (status == EWOULDBLOCK) do {
|
|
status = tsleep((caddr_t)&gpib_sc, GPIBPRI, "gpibpoll", 2);
|
|
} while (!(inb(ISR2) & 0x08) && status == EWOULDBLOCK); /* Wait to send next cmd */
|
|
|
|
}
|
|
|
|
/*
|
|
* This does not release the REM line on the gpib port, because if it did,
|
|
* all the remote devices would go to local mode. This only sends the
|
|
* gotolocal message to one device. Currently, REM is always held true
|
|
* after enableremote is called, and is reset only on a close of the
|
|
* gpib device
|
|
*/
|
|
|
|
static void
|
|
gotolocal(unsigned char device)
|
|
{
|
|
int status;
|
|
|
|
status = EWOULDBLOCK;
|
|
if (status == EWOULDBLOCK) do {
|
|
status = tsleep((caddr_t)&gpib_sc, GPIBPRI, "gpibpoll", 2);
|
|
} while (!(inb(ISR2) & 0x08) && status == EWOULDBLOCK); /* Wait to send next cmd */
|
|
|
|
outb(CDOR, (device & 31) + 32);
|
|
|
|
if (status == EWOULDBLOCK) do {
|
|
status = tsleep((caddr_t)&gpib_sc, GPIBPRI, "gpibpoll", 2);
|
|
} while (!(inb(ISR2) & 0x08) && status == EWOULDBLOCK); /* Wait to send next cmd */
|
|
|
|
outb(AUXMR, 0x5E); /* Clear SYNC */
|
|
outb(CDOR, 1);
|
|
|
|
if (status == EWOULDBLOCK) do {
|
|
status = tsleep((caddr_t)&gpib_sc, GPIBPRI, "gpibpoll", 2);
|
|
} while (!(inb(ISR2) & 0x08) && status == EWOULDBLOCK); /* Wait to send next cmd */
|
|
|
|
outb(AUXMR, 0x5E);
|
|
outb(CDOR, 63); /* unaddress device */
|
|
|
|
if (status == EWOULDBLOCK) do {
|
|
status = tsleep((caddr_t)&gpib_sc, GPIBPRI, "gpibpoll", 2);
|
|
} while (!(inb(ISR2) & 0x08) && status == EWOULDBLOCK); /* Wait to send next cmd */
|
|
}
|
|
|
|
static void
|
|
menableremote(unsigned char *device)
|
|
{
|
|
int status, counter = 0;
|
|
|
|
status = EWOULDBLOCK;
|
|
if (status == EWOULDBLOCK) do {
|
|
status = tsleep((caddr_t)&gpib_sc, GPIBPRI, "gpibpoll", 2);
|
|
} while (!(inb(ISR2) & 0x08) && status == EWOULDBLOCK); /* Wait to send next cmd */
|
|
|
|
outb(BSR, 1); /* Set REN bit on GPIB */
|
|
do {
|
|
if (status == EWOULDBLOCK) do {
|
|
status = tsleep((caddr_t)&gpib_sc, GPIBPRI, "gpibpoll", 2);
|
|
} while (!(inb(ISR2) & 0x08) && status == EWOULDBLOCK); /* Wait to send next cmd */
|
|
outb(CDOR, (device[counter] & 31) + 32); /* address device to listen */
|
|
counter++;
|
|
} while (device[counter] < 32);
|
|
|
|
if (status == EWOULDBLOCK) do {
|
|
status = tsleep((caddr_t)&gpib_sc, GPIBPRI, "gpibpoll", 2);
|
|
} while (!(inb(ISR2) & 0x08) && status == EWOULDBLOCK); /* Wait to send next cmd */
|
|
|
|
outb(CDOR, 63); /* Unaddress device */
|
|
if (status == EWOULDBLOCK) do {
|
|
status = tsleep((caddr_t)&gpib_sc, GPIBPRI, "gpibpoll", 2);
|
|
} while (!(inb(ISR2) & 0x08) && status == EWOULDBLOCK); /* Wait to send next cmd */
|
|
|
|
}
|
|
|
|
static void
|
|
mgotolocal(unsigned char *device)
|
|
{
|
|
int status;
|
|
int counter = 0;
|
|
|
|
status = EWOULDBLOCK;
|
|
if (device[counter] < 32) do {
|
|
if (status == EWOULDBLOCK) do {
|
|
status = tsleep((caddr_t)&gpib_sc, GPIBPRI, "gpibpoll", 2);
|
|
} while (!(inb(ISR2) & 0x08) && status == EWOULDBLOCK); /* Wait to send next cmd */
|
|
outb(CDOR, (device[counter] & 31) + 32);
|
|
counter++;
|
|
} while (device[counter] < 32);
|
|
if (status == EWOULDBLOCK) do {
|
|
status = tsleep((caddr_t)&gpib_sc, GPIBPRI, "gpibpoll", 2);
|
|
} while (!(inb(ISR2) & 0x08) && status == EWOULDBLOCK); /* Wait to send next cmd */
|
|
|
|
outb(AUXMR, 0x5E); /* Clear SYNC */
|
|
outb(CDOR, 1);
|
|
|
|
if (status == EWOULDBLOCK) do {
|
|
status = tsleep((caddr_t)&gpib_sc, GPIBPRI, "gpibpoll", 2);
|
|
} while (!(inb(ISR2) & 0x08) && status == EWOULDBLOCK); /* Wait to send next cmd */
|
|
outb(AUXMR, 0x5E);
|
|
outb(CDOR, 63); /* unaddress device */
|
|
if (status == EWOULDBLOCK) do {
|
|
status = tsleep((caddr_t)&gpib_sc, GPIBPRI, "gpibpoll", 2);
|
|
} while (!(inb(ISR2) & 0x08) && status == EWOULDBLOCK); /* Wait to send next cmd */
|
|
}
|
|
|
|
/* Trigger a device. What happens depends on how the device is configured. */
|
|
|
|
static void
|
|
trigger(unsigned char device)
|
|
{
|
|
int status;
|
|
|
|
status = EWOULDBLOCK;
|
|
if (device < 32) {
|
|
if (!(inb(ISR2) & 0x08)) do {
|
|
status = tsleep((caddr_t)&gpib_sc, GPIBPRI, "gpibpoll", 1);
|
|
} while (!(inb(ISR2) & 0x08) && status == EWOULDBLOCK); /* Wait to send next cmd */
|
|
outb(CDOR, (device & 31) + 32); /* address device to listen */
|
|
if (!(inb(ISR2) & 0x08) && status == EWOULDBLOCK) do {
|
|
status = tsleep((caddr_t)&gpib_sc, GPIBPRI, "gpibpoll", 1);
|
|
} while (!(inb(ISR2) & 0x08) && status == EWOULDBLOCK); /* Wait to send next cmd */
|
|
|
|
outb(CDOR, 8); /* send GET */
|
|
|
|
if (!(inb(ISR2) & 0x08) && status == EWOULDBLOCK) do {
|
|
status = tsleep((caddr_t)&gpib_sc, GPIBPRI, "gpibpoll", 1);
|
|
} while (!(inb(ISR2) & 0x08) && status == EWOULDBLOCK); /* Wait to send next cmd */
|
|
outb(AUXMR, 0x5E);
|
|
outb(CDOR, 63); /* unaddress device */
|
|
if (!(inb(ISR2) & 0x08) && status == EWOULDBLOCK) do {
|
|
status = tsleep((caddr_t)&gpib_sc, GPIBPRI, "gpibpoll", 1);
|
|
} while (!(inb(ISR2) & 0x08) && status == EWOULDBLOCK); /* Wait to send next cmd */
|
|
}
|
|
}
|
|
|
|
/*
|
|
* Trigger multiple devices by addressing them all to listen, and then
|
|
* sending GET
|
|
*/
|
|
|
|
static void
|
|
mtrigger(unsigned char *device)
|
|
{
|
|
int status = EWOULDBLOCK;
|
|
int counter = 0;
|
|
if (device[0] < 32) {
|
|
do {
|
|
if (device[counter] < 32)
|
|
if (!(inb(ISR2) & 0x08) && status == EWOULDBLOCK) do {
|
|
status = tsleep((caddr_t)&gpib_sc, GPIBPRI, "gpibpoll", 1);
|
|
} while (!(inb(ISR2) & 0x08) && status == EWOULDBLOCK); /* Wait to send next cmd */
|
|
outb(CDOR, (device[counter] & 31) + 32); /* address device to listen */
|
|
counter++;
|
|
} while (device[counter] < 32);
|
|
if (!(inb(ISR2) & 0x08) && status == EWOULDBLOCK) do {
|
|
status = tsleep((caddr_t)&gpib_sc, GPIBPRI, "gpibpoll", 1);
|
|
} while (!(inb(ISR2) & 0x08) && status == EWOULDBLOCK); /* Wait to send next cmd */
|
|
outb(CDOR, 8); /* send GET */
|
|
|
|
if (!(inb(ISR2) & 0x08) && status == EWOULDBLOCK) do {
|
|
status = tsleep((caddr_t)&gpib_sc, GPIBPRI, "gpibpoll", 1);
|
|
} while (!(inb(ISR2) & 0x08) && status == EWOULDBLOCK); /* Wait to send next cmd */
|
|
outb(AUXMR, 0x5E);
|
|
outb(CDOR, 63); /* unaddress device */
|
|
if (!(inb(ISR2) & 0x08) && status == EWOULDBLOCK) do {
|
|
status = tsleep((caddr_t)&gpib_sc, GPIBPRI, "gpibpoll", 1);
|
|
} while (!(inb(ISR2) & 0x08) && status == EWOULDBLOCK); /* Wait to send next cmd */
|
|
}
|
|
}
|
|
|
|
/*
|
|
* This is not used now, but it should work with NI's 8 bit gpib board
|
|
* since it does not use the TURBO488 registers at all
|
|
*/
|
|
|
|
/*
|
|
* Send data through the TURBO488 FIFOS to a device that is already
|
|
* addressed to listen. This is used by the write call when someone is
|
|
* writing to a printer or plotter, etc...
|
|
*
|
|
* The last byte of each write is held off until either the next
|
|
* write or close, so it can be sent with EOI set
|
|
*/
|
|
|
|
static int
|
|
sendrawgpibfifo(unsigned char device, char *data, int count)
|
|
{
|
|
int status;
|
|
int counter;
|
|
int fifopos;
|
|
int sleeptime;
|
|
|
|
sleeptime = SLEEP_MIN;
|
|
counter = 0;
|
|
|
|
fifopos = 0;
|
|
|
|
status = EWOULDBLOCK;
|
|
do {
|
|
/* Wait for fifo to become not full if it is full */
|
|
sleeptime = SLEEP_MIN;
|
|
if (!(inb(ISR3) & 0x08)) do {
|
|
status = tsleep((caddr_t)&gpib_sc, GPIBPRI, "gpibpoll", sleeptime);
|
|
if (sleeptime < SLEEP_MAX) sleeptime = sleeptime * 2;
|
|
} while (!(inb(ISR3) & 0x08) && (status == EWOULDBLOCK)); /* Fifo is full */
|
|
|
|
if ((count>1) && (inb(ISR3) & 0x08)) {
|
|
outw(FIFOB, *(unsigned *)(data + counter));
|
|
#if 0
|
|
printf ("gpib: sent:%c, %c\n", data[counter], data[counter + 1]);
|
|
#endif
|
|
counter += 2;
|
|
count -= 2;
|
|
}
|
|
}
|
|
while ((count>1) && (status == EWOULDBLOCK));
|
|
|
|
/*
|
|
* The write routine and close routine must check if there is 1
|
|
* byte left and handle it accordingly
|
|
*/
|
|
|
|
/* Return the number of bytes written to the device */
|
|
return (counter);
|
|
}
|
|
|
|
static int
|
|
sendgpibfifo(unsigned char device, char *data, int count)
|
|
{
|
|
int status;
|
|
int counter;
|
|
int fifopos;
|
|
int sleeptime;
|
|
|
|
outb(IMR2, 0x30); /* we have to enable DMA (0x30) for turbo488 to work */
|
|
outb(CNT0, 0);
|
|
outb(CNT1, 0);
|
|
outb(CNT2, 0);
|
|
outb(CNT3, 0);
|
|
status = EWOULDBLOCK;
|
|
if (!(inb(ISR2) & 8)) do {
|
|
status = tsleep((caddr_t)&gpib_sc, GPIBPRI, "gpibpoll", 1);
|
|
} while (!(inb(ISR2) & 8) && status == EWOULDBLOCK);
|
|
|
|
outb(CDOR, (device & 31) + 32); /* address device to listen */
|
|
|
|
if (!(inb(ISR2) & 8) && status == EWOULDBLOCK) do {
|
|
status = tsleep((caddr_t)&gpib_sc, GPIBPRI, "gpibpoll", 1);
|
|
} while (!(inb(ISR2) & 8) && status == EWOULDBLOCK);
|
|
outb(CDOR, 64); /* Address controller (me) to talk */
|
|
|
|
if (!(inb(ISR2) & 8) && status == EWOULDBLOCK) do {
|
|
status = tsleep((caddr_t)&gpib_sc, GPIBPRI, "gpibpoll", 1);
|
|
} while (!(inb(ISR2) & 8) && status == EWOULDBLOCK);
|
|
|
|
outb(AUXMR, gts); /* Set to Standby (Controller) */
|
|
fifopos = 0;
|
|
|
|
sleeptime = SLEEP_MIN;
|
|
counter = 0;
|
|
|
|
fifopos = 0;
|
|
|
|
outb(CMDR, 0x20);
|
|
outb(CFG, 0x47); /* 16 bit, write, fifo B first, TMOE TIM */
|
|
outb(CMDR, 0x10); /* RESET fifos */
|
|
outb(CCRG, seoi); /* program to send EOI at end */
|
|
outb(CMDR, 0x04); /* Tell TURBO488 to GO */
|
|
status = EWOULDBLOCK;
|
|
do {
|
|
/* Wait for fifo to become not full if it is full */
|
|
sleeptime = SLEEP_MIN;
|
|
if (!(inb(ISR3) & 0x08)) do {
|
|
status = tsleep((caddr_t)&gpib_sc, GPIBPRI, "gpibpoll", sleeptime);
|
|
if (sleeptime < SLEEP_MAX) sleeptime = sleeptime * 2;
|
|
} while (!(inb(ISR3) & 0x08) && (status == EWOULDBLOCK)); /* Fifo is full */
|
|
|
|
if ((count>1) && (inb(ISR3) & 0x08)) {
|
|
#if 0
|
|
if (count == 2) outb(CFG, 15 + 0x40); /* send eoi when done */
|
|
#endif
|
|
outw(FIFOB, *(unsigned *)(data + counter));
|
|
|
|
counter += 2;
|
|
count -= 2;
|
|
}
|
|
} while ((count>2) && (status == EWOULDBLOCK));
|
|
|
|
if (count == 2 && status == EWOULDBLOCK) {
|
|
/* Wait for fifo to become not full */
|
|
if (status == EWOULDBLOCK && !(inb(ISR3) & 0x08)) do {
|
|
status = tsleep((caddr_t)&gpib_sc, GPIBPRI, "gpibpoll", SLEEP_MIN);
|
|
} while (!(inb(ISR3) & 0x08) && status == EWOULDBLOCK); /* Fifo is full */
|
|
#if 0
|
|
outb(CFG, 0x40 + 15); /* send eoi when done */
|
|
#endif
|
|
outb(FIFOB, data[counter]);
|
|
counter++;
|
|
count--;
|
|
}
|
|
|
|
#if 0
|
|
outb(CMDR, 0x04);
|
|
#endif
|
|
|
|
/* Wait for fifo to become empty */
|
|
if (status == EWOULDBLOCK) do {
|
|
status = tsleep((caddr_t)&gpib_sc, GPIBPRI, "gpibpoll", 1);
|
|
} while ((inb(ISR3) & 0x04) && status == EWOULDBLOCK); /* Fifo is not empty */
|
|
|
|
outb(CMDR, 0x08); /* Issue STOP to TURBO488 */
|
|
|
|
/* Wait for DONE and STOP */
|
|
if (status == EWOULDBLOCK) do {
|
|
status = tsleep((caddr_t)&gpib_sc, GPIBPRI, "gpibpoll", 1);
|
|
} while (!(inb(ISR3) & 0x11) && status == EWOULDBLOCK); /* not done and stop */
|
|
|
|
outb(IMR2, 0x00); /* we have to enable DMA (0x30) for turbo488 to work */
|
|
outb(CMDR, 0x20); /* soft reset turbo488 */
|
|
outb(CMDR, 0x10); /* reset fifos */
|
|
|
|
|
|
/*
|
|
* Send last byte with EOI set
|
|
* Here EOI is handled correctly since the string to be sent
|
|
* is actually all sent during the ioctl. (See above)
|
|
*/
|
|
if (count == 1 && status == EWOULDBLOCK) { /* Count should always=1 here */
|
|
|
|
do {
|
|
if (!(inb(ISR1) & 2)) status = tsleep((caddr_t)&gpib_sc, GPIBPRI, "gpibpoll", 1);
|
|
} while (!(inb(ISR1) & 2) && (status == EWOULDBLOCK));
|
|
|
|
outb(AUXMR, seoi); /* Set EOI for the last byte */
|
|
outb(AUXMR, 0x5E); /* Clear SYNC */
|
|
outb(CDOR, data[counter]);
|
|
counter++;
|
|
count--;
|
|
}
|
|
|
|
do {
|
|
if (!(inb(ISR1) & 2)) status = tsleep((caddr_t)&gpib_sc, GPIBPRI, "gpibpoll", 1);
|
|
} while (!(inb(ISR1) & 2) && (status == EWOULDBLOCK));
|
|
|
|
|
|
if (!(inb(ISR1) & 2) && status == EWOULDBLOCK) do {
|
|
status = tsleep((caddr_t)&gpib_sc, GPIBPRI, "gpibpoll", 1);
|
|
} while (!(inb(ISR1) & 2) && status == EWOULDBLOCK);
|
|
outb(AUXMR, tca); /* Regain full control of the bus */
|
|
|
|
if (!(inb(ISR2) & 8) && status == EWOULDBLOCK) do {
|
|
status = tsleep((caddr_t)&gpib_sc, GPIBPRI, "gpibpoll", 1);
|
|
} while (!(inb(ISR2) & 8) && status == EWOULDBLOCK);
|
|
|
|
outb(CDOR, 63); /* unlisten */
|
|
|
|
if (!(inb(ISR2) & 8) && status == EWOULDBLOCK) do {
|
|
status = tsleep((caddr_t)&gpib_sc, GPIBPRI, "gpibpoll", 1);
|
|
} while (!(inb(ISR2) & 8) && status == EWOULDBLOCK);
|
|
|
|
|
|
outb(AUXMR, 0x5E); /* Clear SYNC */
|
|
outb(CDOR, 95); /* untalk */
|
|
if (!(inb(ISR2) & 8) && status == EWOULDBLOCK) do {
|
|
status = tsleep((caddr_t)&gpib_sc, GPIBPRI, "gpibpoll", 1);
|
|
} while (!(inb(ISR2) & 8) && status == EWOULDBLOCK);
|
|
|
|
return (counter);
|
|
}
|
|
|
|
static int
|
|
readgpibfifo(unsigned char device, char *data, int count)
|
|
{
|
|
int status;
|
|
int status2 = 0;
|
|
int status1;
|
|
int counter;
|
|
int fifopos;
|
|
unsigned inword;
|
|
|
|
outb(IMR2, 0x30); /* we have to enable DMA (0x30) for turbo488 to work */
|
|
#if 0
|
|
outb(IMR3, 0x1F);
|
|
outb(INTR, 1);
|
|
#endif
|
|
outb(CMDR, 0x20);
|
|
|
|
outb(CFG, 14 + 0x60 + 1); /* Halt on int, read, fifo B first, CCEN TMOE TIM */
|
|
outb(CMDR, 0x10); /* RESET fifos */
|
|
outb(CCRG, tcs); /* program to tcs at end */
|
|
outb(CMDR, 0x08); /* STOP?? */
|
|
|
|
status = EWOULDBLOCK;
|
|
do {
|
|
status = tsleep((caddr_t)&gpib_sc, GPIBPRI, "gpibpoll", 1);
|
|
} while (!(inb(ISR2) & 8) && status == EWOULDBLOCK);
|
|
|
|
outb(CDOR, 32); /* Address controller (me) to listen */
|
|
|
|
do {
|
|
status = tsleep((caddr_t)&gpib_sc, GPIBPRI, "gpibpoll", 1);
|
|
} while (!(inb(ISR2) & 8) && status == EWOULDBLOCK);
|
|
|
|
outb(CDOR, (device & 31) + 64); /* address device to talk */
|
|
|
|
do {
|
|
status = tsleep((caddr_t)&gpib_sc, GPIBPRI, "gpibpoll", 1);
|
|
} while (!(inb(ISR2) & 8) && status == EWOULDBLOCK);
|
|
|
|
outb(AUXMR, gts); /* Set to Standby (Controller) */
|
|
|
|
counter = 0;
|
|
fifopos = 0;
|
|
|
|
outb(CMDR, 0x04); /* Tell TURBO488 to GO */
|
|
|
|
do {
|
|
status1 = inb(ISR3);
|
|
if (!(status1 & 0x01) && (status1 & 0x04)) {
|
|
status2 = inb(STS2);
|
|
inword = inw(FIFOB);
|
|
*(unsigned *)(data + counter) = inword;
|
|
#if 0
|
|
printf ("Read:%c, %c\n", data[counter], data[counter + 1]);
|
|
#endif
|
|
counter += 2;
|
|
} else {
|
|
status = tsleep((caddr_t)&gpib_sc, GPIBPRI, "gpibpoll", 4);
|
|
}
|
|
} while (!(status1 & 0x01) && status == EWOULDBLOCK);
|
|
if (!(status2 & 0x04)) { /* Only 1 byte came in on last 16 bit transfer */
|
|
data[counter-1] = 0;
|
|
counter--;
|
|
} else
|
|
data[counter] = 0;
|
|
outb(CMDR, 0x08); /* send STOP */
|
|
|
|
do {
|
|
status = tsleep((caddr_t)&gpib_sc, GPIBPRI, "gpibpoll", 1);
|
|
} while (!(inb(ISR3) & 0x11) && status == EWOULDBLOCK); /* wait for DONE and STOP */
|
|
outb(AUXMR, 0x55);
|
|
|
|
outb(IMR2, 0x00); /* we have to enable DMA (0x30) for turbo488 to work */
|
|
outb(CMDR, 0x20); /* soft reset turbo488 */
|
|
outb(CMDR, 0x10); /* reset fifos */
|
|
|
|
#if 0
|
|
do {
|
|
status = tsleep((caddr_t)&gpib_sc, GPIBPRI, "gpibpoll", 1);
|
|
} while (!(inb(ISR1) & 2));
|
|
#endif
|
|
outb(AUXMR, tca); /* Regain full control of the bus */
|
|
|
|
do {
|
|
status = tsleep((caddr_t)&gpib_sc, GPIBPRI, "gpibpoll", 1);
|
|
} while (!(inb(ISR2) & 8) && status == EWOULDBLOCK);
|
|
outb(CDOR, 63); /* unlisten */
|
|
|
|
do {
|
|
status = tsleep((caddr_t)&gpib_sc, GPIBPRI, "gpibpoll", 1);
|
|
} while (!(inb(ISR2) & 8) && status == EWOULDBLOCK);
|
|
|
|
outb(AUXMR, 0x5E); /* Clear SYNC */
|
|
outb(CDOR, 95); /* untalk */
|
|
do {
|
|
status = tsleep((caddr_t)&gpib_sc, GPIBPRI, "gpibpoll", 1);
|
|
} while (!(inb(ISR2) & 8) && status == EWOULDBLOCK);
|
|
|
|
return (counter);
|
|
}
|
|
|
|
|
|
/* Return the status byte from device */
|
|
static char
|
|
spoll(unsigned char device)
|
|
{
|
|
int status = EWOULDBLOCK;
|
|
unsigned int statusbyte;
|
|
|
|
if (!(inb(ISR2) & 8)) do {
|
|
status = tsleep((caddr_t)&gpib_sc, GPIBPRI, "gpibpoll", 1);
|
|
} while (!(inb(ISR2) & 8) && status == EWOULDBLOCK);
|
|
|
|
outb(CDOR, (device & 31) + 64); /* address device to talk */
|
|
|
|
if (!(inb(ISR2) & 8) && status == EWOULDBLOCK) do {
|
|
status = tsleep((caddr_t)&gpib_sc, GPIBPRI, "gpibpoll", 1);
|
|
} while (!(inb(ISR2) & 8) && status == EWOULDBLOCK);
|
|
|
|
outb(CDOR, 32); /* Address controller (me) to listen */
|
|
|
|
if (!(inb(ISR2) & 8) && status == EWOULDBLOCK) do {
|
|
status = tsleep((caddr_t)&gpib_sc, GPIBPRI, "gpibpoll", 1);
|
|
} while (!(inb(ISR2) & 8) && status == EWOULDBLOCK);
|
|
outb(AUXMR, 0x5E);
|
|
outb(CDOR, 0x18); /* Send SPE (serial poll enable) */
|
|
if (!(inb(ISR2) & 8) && status == EWOULDBLOCK) do {
|
|
status = tsleep((caddr_t)&gpib_sc, GPIBPRI, "gpibpoll", 1);
|
|
} while (!(inb(ISR2) & 8) && status == EWOULDBLOCK);
|
|
|
|
/* wait for bus to be synced */
|
|
if (!(inb(ISR0) & 1) && status == EWOULDBLOCK) do {
|
|
status = tsleep((caddr_t)&gpib_sc, GPIBPRI, "gpibpoll", 1);
|
|
} while (!(inb(ISR0) & 1) && status == EWOULDBLOCK);
|
|
|
|
outb(AUXMR, gts); /* Set to Standby (Controller) */
|
|
|
|
if (!(inb(ISR1) & 1) && status == EWOULDBLOCK) do {
|
|
status = tsleep((caddr_t)&gpib_sc, GPIBPRI, "gpibpoll", 1);
|
|
} while (!(inb(ISR1) & 1) && status == EWOULDBLOCK);
|
|
outb(AUXMR, 0x5E);
|
|
outb(AUXMR, tcs); /* Take control after next read */
|
|
statusbyte = inb(DIR);
|
|
|
|
if (!(inb(ISR2) & 8) && status == EWOULDBLOCK) do {
|
|
status = tsleep((caddr_t)&gpib_sc, GPIBPRI, "gpibpoll", 1);
|
|
} while (!(inb(ISR2) & 8) && status == EWOULDBLOCK);
|
|
|
|
outb(CDOR, 0x19); /* SPD (serial poll disable) */
|
|
|
|
/* wait for bus to be synced */
|
|
if (!(inb(ISR0) & 1) && status == EWOULDBLOCK) do {
|
|
status = tsleep((caddr_t)&gpib_sc, GPIBPRI, "gpibpoll", 1);
|
|
} while (!(inb(ISR0) & 1) && status == EWOULDBLOCK);
|
|
|
|
|
|
if (!(inb(ISR2) & 8) && status == EWOULDBLOCK) do {
|
|
status = tsleep((caddr_t)&gpib_sc, GPIBPRI, "gpibpoll", 1);
|
|
} while (!(inb(ISR2) & 8) && status == EWOULDBLOCK);
|
|
|
|
outb(CDOR, 95); /* untalk */
|
|
|
|
if (!(inb(ISR2) & 8) && status == EWOULDBLOCK) do {
|
|
status = tsleep((caddr_t)&gpib_sc, GPIBPRI, "gpibpoll", 1);
|
|
} while (!(inb(ISR2) & 8) && status == EWOULDBLOCK);
|
|
outb(AUXMR, 0x5E);
|
|
outb(CDOR, 63); /* unlisten */
|
|
if (!(inb(ISR2) & 8) && status == EWOULDBLOCK) do {
|
|
status = tsleep((caddr_t)&gpib_sc, GPIBPRI, "gpibpoll", 1);
|
|
} while (!(inb(ISR2) & 8) && status == EWOULDBLOCK);
|
|
|
|
/* wait for bus to be synced */
|
|
if (!(inb(ISR0) & 1) && status == EWOULDBLOCK) do {
|
|
status = tsleep((caddr_t)&gpib_sc, GPIBPRI, "gpibpoll", 1);
|
|
} while (!(inb(ISR0) & 1) && status == EWOULDBLOCK);
|
|
|
|
return (statusbyte);
|
|
}
|