304 lines
7.6 KiB
C
304 lines
7.6 KiB
C
/*-
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* Copyright (c) 2017 Hiroki Mori. All rights reserved.
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* Copyright (c) 2017 Ian Lepore. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* This code base on isl12xx.c
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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/*
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* Driver for realtime clock EPSON RTC-8583
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*/
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#include "opt_platform.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/clock.h>
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#include <sys/kernel.h>
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#include <sys/lock.h>
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#include <sys/module.h>
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#ifdef FDT
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#endif
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#include <dev/iicbus/iiconf.h>
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#include <dev/iicbus/iicbus.h>
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#include "clock_if.h"
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#include "iicbus_if.h"
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#define RTC8583_SC_REG 0x01 /* RTC Seconds */
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#define RTC8583_USERSRAM_REG 0x10 /* User SRAM register (first) */
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#define MAX_TRANSFER 16
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/*
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* A struct laid out in the same order as the time registers in the chip.
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*/
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struct time_regs {
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uint8_t msec, sec, min, hour, day, month;
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};
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struct rtc8583_softc {
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device_t dev;
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device_t busdev;
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struct intr_config_hook
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init_hook;
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};
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#ifdef FDT
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static struct ofw_compat_data compat_data[] = {
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{"epson,rtc8583", 1},
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{NULL, 0},
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};
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#endif
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static void rtc8583_init(void *arg);
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static int rtc8583_probe(device_t dev);
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static int rtc8583_attach(device_t dev);
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static int rtc8583_detach(device_t dev);
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static int rtc8583_gettime(device_t dev, struct timespec *ts);
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static int rtc8583_settime(device_t dev, struct timespec *ts);
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static int rtc8583_writeto(device_t slavedev, uint8_t regaddr,
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void *buffer, uint16_t buflen, int waithow);
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/* Implementation */
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static int
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rtc8583_writeto(device_t slavedev, uint8_t regaddr, void *buffer,
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uint16_t buflen, int waithow)
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{
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struct iic_msg msgs;
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uint8_t slaveaddr;
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uint8_t newbuf[MAX_TRANSFER];
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slaveaddr = iicbus_get_addr(slavedev);
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newbuf[0] = regaddr;
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memcpy(newbuf + 1, buffer, buflen);
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msgs.slave = slaveaddr;
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msgs.flags = IIC_M_WR;
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msgs.len = 1 + buflen;
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msgs.buf = newbuf;
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return (iicbus_transfer_excl(slavedev, &msgs, 1, waithow));
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}
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static inline int
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rtc8583_read1(struct rtc8583_softc *sc, uint8_t reg, uint8_t *data)
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{
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return (iicdev_readfrom(sc->dev, reg, data, 1, IIC_WAIT));
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}
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static inline int
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rtc8583_write1(struct rtc8583_softc *sc, uint8_t reg, uint8_t val)
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{
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return (rtc8583_writeto(sc->dev, reg, &val, 1, IIC_WAIT));
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}
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static void
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rtc8583_init(void *arg)
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{
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struct rtc8583_softc *sc;
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sc = (struct rtc8583_softc*)arg;
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config_intrhook_disestablish(&sc->init_hook);
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/*
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* Register as a system realtime clock.
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*/
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clock_register_flags(sc->dev, 1000000, CLOCKF_SETTIME_NO_ADJ);
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clock_schedule(sc->dev, 1);
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return;
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}
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static int
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rtc8583_probe(device_t dev)
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{
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#ifdef FDT
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if (!ofw_bus_status_okay(dev))
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return (ENXIO);
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if (ofw_bus_search_compatible(dev, compat_data)->ocd_data != 0) {
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device_set_desc(dev, "EPSON RTC-8583");
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return (BUS_PROBE_DEFAULT);
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}
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#endif
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return (ENXIO);
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}
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static int
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rtc8583_attach(device_t dev)
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{
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struct rtc8583_softc *sc;
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sc = device_get_softc(dev);
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sc->dev = dev;
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sc->busdev = device_get_parent(sc->dev);
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/*
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* Chip init must wait until interrupts are enabled. Often i2c access
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* works only when the interrupts are available.
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*/
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sc->init_hook.ich_func = rtc8583_init;
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sc->init_hook.ich_arg = sc;
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if (config_intrhook_establish(&sc->init_hook) != 0)
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return (ENOMEM);
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return (0);
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}
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static int
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rtc8583_detach(device_t dev)
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{
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clock_unregister(dev);
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return (0);
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}
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static int
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rtc8583_gettime(device_t dev, struct timespec *ts)
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{
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struct rtc8583_softc *sc;
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struct bcd_clocktime bct;
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struct time_regs tregs;
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uint8_t y, ytmp, sreg;
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int err;
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sc = device_get_softc(dev);
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/* Read the bcd time registers. */
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if ((err = iicdev_readfrom(sc->dev, RTC8583_SC_REG, &tregs, sizeof(tregs),
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IIC_WAIT)) != 0)
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return (err);
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y = tregs.day >> 6;
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/* Get year from user SRAM */
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rtc8583_read1(sc, RTC8583_USERSRAM_REG, &sreg);
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/*
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* Check if year adjustment is required.
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* RTC has only 2 bits for year value (i.e. maximum is 4 years), so
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* full year value is stored in user SRAM and updated manually or
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* by this code.
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*/
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ytmp = sreg & 0x03;
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if (ytmp != y) {
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/* shift according to difference */
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sreg += y - ytmp;
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/* check if overflow happened */
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if (ytmp > y)
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sreg += 4;
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if ((err = iicbus_request_bus(sc->busdev, sc->dev, IIC_WAIT)) != 0)
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return (err);
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rtc8583_write1(sc, RTC8583_USERSRAM_REG, sreg);
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iicbus_release_bus(sc->busdev, sc->dev);
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}
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if (!validbcd(tregs.msec))
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return (EINVAL);
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/* The 'msec' reg is actually 1/100ths, in bcd. */
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bct.nsec = bcd2bin(tregs.msec) * 10 * 1000 * 1000;
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bct.sec = tregs.sec;
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bct.min = tregs.min;
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bct.hour = tregs.hour & 0x3f;
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bct.day = tregs.day & 0x3f;
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bct.mon = tregs.month & 0x1f;
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bct.year = bin2bcd(sreg % 100);
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clock_dbgprint_bcd(sc->dev, CLOCK_DBG_READ, &bct);
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return (clock_bcd_to_ts(&bct, ts, false));
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}
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static int
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rtc8583_settime(device_t dev, struct timespec *ts)
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{
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struct rtc8583_softc *sc;
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struct bcd_clocktime bct;
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struct time_regs tregs;
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uint8_t sreg;
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int err;
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sc = device_get_softc(dev);
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ts->tv_sec -= utc_offset();
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clock_ts_to_bcd(ts, &bct, false);
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clock_dbgprint_bcd(sc->dev, CLOCK_DBG_WRITE, &bct);
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/* The 'msec' reg is actually 1/100ths, in bcd. */
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tregs.msec = bin2bcd(ts->tv_nsec / (10 * 1000 * 1000));
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tregs.sec = bct.sec;
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tregs.min = bct.min;
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tregs.hour = bct.hour;
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tregs.day = bct.day | (bct.year & 0x03 << 6);
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tregs.month = bct.mon;
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if ((err = iicbus_request_bus(sc->busdev, sc->dev, IIC_WAIT)) != 0)
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return (err);
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err = rtc8583_writeto(sc->dev, RTC8583_SC_REG, &tregs,
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sizeof(tregs), IIC_WAIT);
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sreg = bcd2bin(bct.year & 0xff);
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/* save to year to sram */
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rtc8583_write1(sc, RTC8583_USERSRAM_REG, sreg);
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iicbus_release_bus(sc->busdev, sc->dev);
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return (err);
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}
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static device_method_t rtc8583_methods[] = {
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/* device_if methods */
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DEVMETHOD(device_probe, rtc8583_probe),
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DEVMETHOD(device_attach, rtc8583_attach),
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DEVMETHOD(device_detach, rtc8583_detach),
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/* clock_if methods */
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DEVMETHOD(clock_gettime, rtc8583_gettime),
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DEVMETHOD(clock_settime, rtc8583_settime),
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DEVMETHOD_END,
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};
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static driver_t rtc8583_driver = {
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"rtc8583",
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rtc8583_methods,
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sizeof(struct rtc8583_softc),
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};
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static devclass_t rtc8583_devclass;
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DRIVER_MODULE(rtc8583, iicbus, rtc8583_driver, rtc8583_devclass, NULL, NULL);
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MODULE_VERSION(rtc8583, 1);
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MODULE_DEPEND(rtc8583, iicbus, IICBUS_MINVER, IICBUS_PREFVER, IICBUS_MAXVER);
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IICBUS_FDT_PNP_INFO(compat_data);
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