SSE2 instructions, we can use them. Suggested by: jkim PR: 221733 MFC after: 1 week X-MFC-With: r323001
241 lines
4.5 KiB
Makefile
241 lines
4.5 KiB
Makefile
# $FreeBSD$
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CRTARCH= ${MACHINE_CPUARCH:C/amd64/x86_64/}
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CRTSRC= ${SRCTOP}/contrib/compiler-rt/lib/builtins
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.PATH: ${CRTSRC}/${CRTARCH}
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.PATH: ${CRTSRC}
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SRCF+= absvdi2
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SRCF+= absvsi2
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SRCF+= absvti2
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SRCF+= addvdi3
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SRCF+= addvsi3
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SRCF+= addvti3
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SRCF+= apple_versioning
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SRCF+= ashldi3
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SRCF+= ashlti3
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SRCF+= ashrdi3
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SRCF+= ashrti3
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SRCF+= clear_cache
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SRCF+= clzdi2
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SRCF+= clzsi2
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SRCF+= clzti2
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SRCF+= cmpdi2
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SRCF+= cmpti2
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SRCF+= ctzdi2
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SRCF+= ctzsi2
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SRCF+= ctzti2
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SRCF+= divdc3
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SRCF+= divdi3
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SRCF+= divmoddi4
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SRCF+= divmodsi4
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SRCF+= divsc3
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SRCF+= divsi3
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SRCF+= divtc3
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SRCF+= divti3
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SRCF+= divxc3
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SRCF+= enable_execute_stack
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SRCF+= eprintf
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SRCF+= extendhfsf2
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SRCF+= ffsdi2
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SRCF+= ffssi2
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SRCF+= ffsti2
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SRCF+= fixdfdi
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SRCF+= fixdfti
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SRCF+= fixsfdi
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SRCF+= fixsfti
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SRCF+= fixunsdfdi
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SRCF+= fixunsdfsi
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SRCF+= fixunsdfti
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SRCF+= fixunssfdi
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SRCF+= fixunssfsi
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SRCF+= fixunssfti
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SRCF+= fixunsxfdi
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SRCF+= fixunsxfsi
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SRCF+= fixunsxfti
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SRCF+= fixxfdi
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SRCF+= fixxfti
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SRCF+= floatditf
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SRCF+= floatsitf
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SRCF+= floattidf
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SRCF+= floattisf
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SRCF+= floattixf
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SRCF+= floatunditf
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SRCF+= floatunsidf
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SRCF+= floatunsisf
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SRCF+= floatuntidf
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SRCF+= floatuntisf
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SRCF+= floatuntixf
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SRCF+= gcc_personality_v0
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SRCF+= int_util
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SRCF+= lshrdi3
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SRCF+= lshrti3
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SRCF+= moddi3
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SRCF+= modsi3
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SRCF+= modti3
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SRCF+= muldc3
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SRCF+= muldi3
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SRCF+= mulodi4
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SRCF+= mulosi4
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SRCF+= muloti4
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SRCF+= mulsc3
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SRCF+= multi3
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SRCF+= mulvdi3
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SRCF+= mulvsi3
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SRCF+= mulvti3
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SRCF+= multc3
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SRCF+= mulxc3
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SRCF+= negdf2
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SRCF+= negdi2
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SRCF+= negsf2
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SRCF+= negti2
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SRCF+= negvdi2
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SRCF+= negvsi2
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SRCF+= negvti2
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SRCF+= paritydi2
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SRCF+= paritysi2
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SRCF+= parityti2
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SRCF+= popcountdi2
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SRCF+= popcountsi2
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SRCF+= popcountti2
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SRCF+= powidf2
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SRCF+= powisf2
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SRCF+= powitf2
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SRCF+= powixf2
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SRCF+= subvdi3
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SRCF+= subvsi3
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SRCF+= subvti3
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SRCF+= trampoline_setup
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SRCF+= truncdfhf2
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SRCF+= truncsfhf2
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SRCF+= ucmpdi2
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SRCF+= ucmpti2
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SRCF+= udivdi3
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SRCF+= udivmoddi4
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SRCF+= udivmodsi4
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SRCF+= udivmodti4
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SRCF+= udivsi3
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SRCF+= udivti3
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SRCF+= umoddi3
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SRCF+= umodsi3
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SRCF+= umodti3
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# Avoid using SSE2 instructions on i386, if unsupported.
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.if ${MACHINE_CPUARCH} == "i386" && empty(MACHINE_CPU:Msse2)
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SRCS+= floatdidf.c
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SRCS+= floatdisf.c
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SRCS+= floatdixf.c
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SRCS+= floatundidf.c
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SRCS+= floatundisf.c
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SRCS+= floatundixf.c
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.else
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SRCF+= floatdidf
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SRCF+= floatdisf
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SRCF+= floatdixf
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SRCF+= floatundidf
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SRCF+= floatundisf
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SRCF+= floatundixf
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.endif
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# __cpu_model support, only used on x86
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.if ${MACHINE_CPUARCH} == "amd64" || ${MACHINE_CPUARCH} == "i386"
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SRCF+= cpu_model
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.endif
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#
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# 128-bit quad precision long double support,
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# only used on some architectures.
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#
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.if ${MACHINE_CPUARCH} == "aarch64" || ${MACHINE_CPUARCH} == "riscv"
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SRCF+= addtf3
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SRCF+= comparetf2
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SRCF+= divtf3
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SRCF+= extenddftf2
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SRCF+= extendsftf2
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SRCF+= fixtfdi
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SRCF+= fixtfsi
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SRCF+= fixtfti
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SRCF+= fixunstfdi
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SRCF+= fixunstfsi
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SRCF+= fixunstfti
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SRCF+= floatunsitf
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SRCF+= multf3
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SRCF+= subtf3
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SRCF+= trunctfdf2
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SRCF+= trunctfsf2
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.endif
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# These are already shipped by libc.a on some architectures.
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.if ${MACHINE_CPUARCH} != "arm" && ${MACHINE_CPUARCH} != "mips" && \
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${MACHINE_CPUARCH} != "riscv"
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SRCF+= adddf3
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SRCF+= addsf3
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SRCF+= divdf3
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SRCF+= divsf3
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SRCF+= extendsfdf2
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SRCF+= fixdfsi
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SRCF+= fixsfsi
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SRCF+= floatsidf
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SRCF+= floatsisf
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SRCF+= muldf3
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SRCF+= mulsf3
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SRCF+= subdf3
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SRCF+= subsf3
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SRCF+= truncdfsf2
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.endif
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.if ${MACHINE_CPUARCH} != "arm"
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SRCF+= comparedf2
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SRCF+= comparesf2
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.endif
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# FreeBSD-specific atomic intrinsics.
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.if ${MACHINE_CPUARCH} == "arm"
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.PATH: ${SRCTOP}/sys/arm/arm
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SRCF+= stdatomic
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CFLAGS+= -DEMIT_SYNC_ATOMICS
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.elif ${MACHINE_CPUARCH} == "mips"
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.PATH: ${SRCTOP}/sys/mips/mips
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SRCF+= stdatomic
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.endif
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.for file in ${SRCF}
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.if ${MACHINE_ARCH:Marmv6*} && (!defined(CPUTYPE) || ${CPUTYPE:M*soft*} == "") \
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&& exists(${CRTSRC}/${CRTARCH}/${file}vfp.S)
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SRCS+= ${file}vfp.S
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. elif exists(${CRTSRC}/${CRTARCH}/${file}.S)
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SRCS+= ${file}.S
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. else
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SRCS+= ${file}.c
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. endif
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.endfor
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.if ${MACHINE_CPUARCH} == "arm"
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SRCS+= aeabi_div0.c
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SRCS+= aeabi_idivmod.S
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SRCS+= aeabi_ldivmod.S
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SRCS+= aeabi_memcmp.S
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SRCS+= aeabi_memcpy.S
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SRCS+= aeabi_memmove.S
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SRCS+= aeabi_memset.S
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SRCS+= aeabi_uidivmod.S
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SRCS+= aeabi_uldivmod.S
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SRCS+= bswapdi2.S
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SRCS+= bswapsi2.S
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SRCS+= switch16.S
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SRCS+= switch32.S
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SRCS+= switch8.S
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SRCS+= switchu8.S
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SRCS+= sync_synchronize.S
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.endif
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# On some archs GCC-6.3 requires bswap32 built-in.
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.if ${MACHINE_CPUARCH} == "mips" || ${MACHINE_CPUARCH} == "sparc64"
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SRCS+= bswapdi2.c
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SRCS+= bswapsi2.c
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.endif
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