2f56128403
POWER architecture CPUs (Book-S) require natural alignment for cache-inhibited storage accesses. Since we can't know the caching model for a page ahead of time, always enforce natural alignment in bcopy. This fixes a SIGBUS when calling the function with misaligned pointers on POWER7. Submitted by: Bruno Larsen <bruno.larsen@eldorado.org.br> Reviewed by: luporl, bdragon (IRC) MFC after: 1 week Sponsored by: Eldorado Research Institute (eldorado.org.br) Differential Revision: https://reviews.freebsd.org/D28776
341 lines
7.7 KiB
ArmAsm
341 lines
7.7 KiB
ArmAsm
/*-
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* Copyright (c) 2018 Instituto de Pesquisas Eldorado
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the author nor the names of its contributors may
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* be used to endorse or promote products derived from this software
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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*/
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#include <machine/asm.h>
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__FBSDID("$FreeBSD$");
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#define BLOCK_SIZE_BITS 6
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#define BLOCK_SIZE (1 << BLOCK_SIZE_BITS)
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#define BLOCK_SIZE_MASK (BLOCK_SIZE - 1)
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/* Minimum 8 byte alignment, to avoid cache-inhibited alignment faults.*/
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#ifndef ALIGN_MASK
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#define ALIGN_MASK 0x7
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#endif
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#define MULTI_PHASE_THRESHOLD 512
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#ifndef FN_NAME
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#ifdef MEMMOVE
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#define FN_NAME __memmove
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WEAK_REFERENCE(__memmove, memmove);
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#else
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#define FN_NAME __bcopy
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WEAK_REFERENCE(__bcopy, bcopy);
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#endif
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#endif
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/*
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* r3: dst
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* r4: src
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* r5: len
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*/
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ENTRY(FN_NAME)
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cmpld %r3, %r4 /* src == dst? nothing to do */
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beqlr-
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cmpdi %r5, 0 /* len == 0? nothing to do */
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beqlr-
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#ifdef MEMMOVE
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std %r3, -8(%r1) /* save dst */
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#else /* bcopy: swap src/dst */
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mr %r0, %r3
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mr %r3, %r4
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mr %r4, %r0
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#endif
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/* First check for relative alignment, if unaligned copy one byte at a time */
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andi. %r8, %r3, ALIGN_MASK
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andi. %r7, %r4, ALIGN_MASK
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cmpd %r7, %r8
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bne .Lunaligned
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cmpldi %r5, MULTI_PHASE_THRESHOLD
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bge .Lmulti_phase
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b .Lfast_copy
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.Lunaligned:
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/* forward or backward copy? */
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cmpd %r4, %r3
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blt .Lbackward_unaligned
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/* Just need to setup increment and jump to copy */
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li %r0, 1
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mtctr %r5
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b .Lsingle_1_loop
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.Lbackward_unaligned:
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/* advance src and dst to last byte, set decrement and jump to copy */
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add %r3, %r3, %r5
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addi %r3, %r3, -1
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add %r4, %r4, %r5
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addi %r4, %r4, -1
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li %r0, -1
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mtctr %r5
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b .Lsingle_1_loop
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.Lfast_copy:
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/* align src */
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cmpd %r4, %r3 /* forward or backward copy? */
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blt .Lbackward_align
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.align 5
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.Lalign:
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andi. %r0, %r4, 15
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beq .Lsingle_copy
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lbz %r0, 0(%r4)
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addi %r4, %r4, 1
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stb %r0, 0(%r3)
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addi %r3, %r3, 1
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addi %r5, %r5, -1
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cmpdi %r5, 0
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beq- .Ldone
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b .Lalign
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.Lbackward_align:
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/* advance src and dst to end (past last byte) */
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add %r3, %r3, %r5
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add %r4, %r4, %r5
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.align 5
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.Lbackward_align_loop:
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andi. %r0, %r4, 15
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beq .Lbackward_single_copy
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lbzu %r0, -1(%r4)
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addi %r5, %r5, -1
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stbu %r0, -1(%r3)
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cmpdi %r5, 0
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beq- .Ldone
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b .Lbackward_align_loop
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.Lsingle_copy:
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/* forward copy */
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li %r0, 1
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li %r8, 16
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li %r9, 0
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b .Lsingle_phase
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.Lbackward_single_copy:
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/* backward copy */
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li %r0, -1
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li %r8, -16
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li %r9, -15
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/* point src and dst to last byte */
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addi %r3, %r3, -1
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addi %r4, %r4, -1
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.Lsingle_phase:
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srdi. %r6, %r5, 4 /* number of 16-bytes */
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beq .Lsingle_1
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/* pre-adjustment */
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add %r3, %r3, %r9
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add %r4, %r4, %r9
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mtctr %r6
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.align 5
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.Lsingle_16_loop:
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ld %r6, 0(%r4)
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ld %r7, 8(%r4)
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add %r4, %r4, %r8
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std %r6, 0(%r3)
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std %r7, 8(%r3)
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add %r3, %r3, %r8
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bdnz .Lsingle_16_loop
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/* post-adjustment */
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sub %r3, %r3, %r9
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sub %r4, %r4, %r9
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.Lsingle_1:
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andi. %r6, %r5, 0x0f /* number of 1-bytes */
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beq .Ldone /* 1-bytes == 0? done */
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mtctr %r6
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.align 5
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.Lsingle_1_loop:
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lbz %r6, 0(%r4)
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add %r4, %r4, %r0 /* increment */
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stb %r6, 0(%r3)
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add %r3, %r3, %r0 /* increment */
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bdnz .Lsingle_1_loop
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.Ldone:
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#ifdef MEMMOVE
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ld %r3, -8(%r1) /* restore dst */
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#endif
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blr
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.Lmulti_phase:
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/* set up multi-phase copy parameters */
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/* r7 = bytes before the aligned section of the buffer */
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andi. %r6, %r4, 15
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subfic %r7, %r6, 16
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/* r8 = bytes in and after the aligned section of the buffer */
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sub %r8, %r5, %r7
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/* r9 = bytes after the aligned section of the buffer */
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andi. %r9, %r8, BLOCK_SIZE_MASK
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/* r10 = BLOCKS in the aligned section of the buffer */
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srdi %r10, %r8, BLOCK_SIZE_BITS
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/* forward or backward copy? */
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cmpd %r4, %r3
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blt .Lbackward_multi_copy
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/* set up forward copy parameters */
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std %r7, -32(%r1) /* bytes to copy in phase 1 */
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std %r10, -40(%r1) /* BLOCKS to copy in phase 2 */
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std %r9, -48(%r1) /* bytes to copy in phase 3 */
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li %r0, 1 /* increment for phases 1 and 3 */
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li %r5, BLOCK_SIZE /* increment for phase 2 */
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/* op offsets for phase 2 */
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li %r7, 0
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li %r8, 16
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li %r9, 32
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li %r10, 48
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std %r8, -16(%r1) /* 16-byte increment (16) */
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std %r7, -24(%r1) /* 16-byte pre/post adjustment (0) */
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b .Lphase1
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.Lbackward_multi_copy:
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/* set up backward copy parameters */
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std %r9, -32(%r1) /* bytes to copy in phase 1 */
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std %r10, -40(%r1) /* BLOCKS to copy in phase 2 */
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std %r7, -48(%r1) /* bytes to copy in phase 3 */
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li %r0, -1 /* increment for phases 1 and 3 */
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add %r6, %r5, %r0 /* r6 = len - 1 */
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li %r5, -BLOCK_SIZE /* increment for phase 2 */
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/* advance src and dst to the last position */
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add %r3, %r3, %r6
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add %r4, %r4, %r6
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/* op offsets for phase 2 */
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li %r7, -15
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li %r8, -31
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li %r9, -47
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li %r10, -63
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add %r6, %r7, %r0 /* r6 = -16 */
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std %r6, -16(%r1) /* 16-byte increment (-16) */
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std %r7, -24(%r1) /* 16-byte pre/post adjustment (-15) */
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.Lphase1:
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ld %r6, -32(%r1) /* bytes to copy in phase 1 */
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cmpldi %r6, 0 /* r6 == 0? skip phase 1 */
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beq+ .Lphase2
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mtctr %r6
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.align 5
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.Lphase1_loop:
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lbz %r6, 0(%r4)
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add %r4, %r4, %r0 /* phase 1 increment */
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stb %r6, 0(%r3)
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add %r3, %r3, %r0 /* phase 1 increment */
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bdnz .Lphase1_loop
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.Lphase2:
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ld %r6, -40(%r1) /* BLOCKS to copy in phase 2 */
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cmpldi %r6, 0 /* %r6 == 0? skip phase 2 */
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beq .Lphase3
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#ifdef FN_PHASE2
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FN_PHASE2
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#else
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/* save registers */
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std %r14, -56(%r1)
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std %r15, -64(%r1)
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std %r16, -72(%r1)
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std %r17, -80(%r1)
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std %r18, -88(%r1)
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std %r19, -96(%r1)
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std %r20, -104(%r1)
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std %r21, -112(%r1)
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addi %r18, %r7, 8
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addi %r19, %r8, 8
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addi %r20, %r9, 8
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addi %r21, %r10, 8
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mtctr %r6
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.align 5
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.Lphase2_loop:
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ldx %r14, %r7, %r4
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ldx %r15, %r18, %r4
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ldx %r16, %r8, %r4
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ldx %r17, %r19, %r4
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stdx %r14, %r7, %r3
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stdx %r15, %r18, %r3
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stdx %r16, %r8, %r3
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stdx %r17, %r19, %r3
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ldx %r14, %r9, %r4
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ldx %r15, %r20, %r4
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ldx %r16, %r10, %r4
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ldx %r17, %r21, %r4
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stdx %r14, %r9, %r3
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stdx %r15, %r20, %r3
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stdx %r16, %r10, %r3
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stdx %r17, %r21, %r3
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add %r4, %r4, %r5 /* phase 2 increment */
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add %r3, %r3, %r5 /* phase 2 increment */
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bdnz .Lphase2_loop
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/* restore registers */
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ld %r14, -56(%r1)
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ld %r15, -64(%r1)
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ld %r16, -72(%r1)
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ld %r17, -80(%r1)
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ld %r18, -88(%r1)
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ld %r19, -96(%r1)
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ld %r20, -104(%r1)
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ld %r21, -112(%r1)
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#endif
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.Lphase3:
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/* load registers for transitioning into the single-phase logic */
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ld %r5, -48(%r1) /* bytes to copy in phase 3 */
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ld %r8, -16(%r1) /* 16-byte increment */
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ld %r9, -24(%r1) /* 16-byte pre/post adjustment */
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b .Lsingle_phase
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END(FN_NAME)
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.section .note.GNU-stack,"",%progbits
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