freebsd-dev/sys/arm/mv/clk/a37x0_tbg_pll.h
Hubert Mazur 127e4d9524 Add driver for armada, 37x0-tbg-clock
Driver for tbg clocks. Read reference frequency from parent
and modify it depending on parameters read from register.

Reviewed by:		manu
Obtained from:		Semihalf
Differential revision:	https://reviews.freebsd.org/D32293
2022-01-04 13:26:34 +01:00

55 lines
1.9 KiB
C

/*-
* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
*
* Copyright (c) 2021 Semihalf.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $FreeBSD$
*
*/
#ifndef _TBG_CLK_PLL_H_
#define _TBG_CLK_PLL_H_
#include <dev/extres/clk/clk.h>
struct a37x0_tbg_pll_reg_def {
uint32_t offset;
uint32_t shift;
uint32_t mask;
};
struct a37x0_tbg_pll_clk_def {
struct clknode_init_def clkdef;
struct a37x0_tbg_pll_reg_def vcodiv;
struct a37x0_tbg_pll_reg_def refdiv;
struct a37x0_tbg_pll_reg_def fbdiv;
struct a37x0_tbg_pll_reg_def tbg_bypass;
};
int a37x0_tbg_pll_clk_register(struct clkdom *,
const struct a37x0_tbg_pll_clk_def *);
#endif