e388de98bd
Summary: This switch is based off of the AR8327/AR8337 external switch/PHY. However unlike the AR8327/AR8337 it itself doesn't have any PHYs; instead an external PHY connects to it using the PSGMII port. Differential Revision: https://reviews.freebsd.org/D34112 Reviewed by: manu This code is inspired by the ar40xx code in openwrt, which itself is based on the Qualcomm QCA-SSDK. Both of these sources are, amusingly, BSD licenced - and thus I have included some of the comments in the hardware workaround paths to document some of the magic numbers.
45 lines
1.9 KiB
C
45 lines
1.9 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
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*
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* Copyright (c) 2022 Adrian Chadd <adrian@FreeBSD.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#ifndef __AR40XX_DEBUG_H__
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#define __AR40XX_DEBUG_H__
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#define AR40XX_DBG_HW_INIT 0x00000001
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#define AR40XX_DBG_HW_RESET 0x00000002
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#define AR40XX_DBG_HW_PORT_INIT 0x00000004
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#define AR40XX_DBG_VTU_OP 0x00000008
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#define AR40XX_DBG_ATU_OP 0x00000010
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#define AR40XX_DBG_PORT_STATUS 0x00000020
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#define AR40XX_DPRINTF(sc, flags, ...) \
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do { \
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if ((sc)->sc_debug & (flags)) \
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device_printf((sc)->sc_dev, __VA_ARGS__); \
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} while (0)
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#endif /* __AR40XX_DEBUG_H__ */
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