2e6a8c1ae3
Reviewed by: kd Sponsored by: Juniper Networks, Inc. Differential Revision: https://reviews.freebsd.org/D37813
136 lines
4.1 KiB
C
136 lines
4.1 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
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*
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* Copyright (c) 2022 Adrian Chadd <adrian@FreeBSD.org>.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#ifndef __AR40XX_VAR_H__
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#define __AR40XX_VAR_H__
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#define AR40XX_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx)
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#define AR40XX_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx)
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#define AR40XX_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->sc_mtx, MA_OWNED)
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/*
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* register space access macros
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*/
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#define AR40XX_REG_WRITE(sc, reg, val) do { \
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bus_write_4(sc->sc_ess_mem_res, (reg), (val)); \
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} while (0)
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#define AR40XX_REG_READ(sc, reg) bus_read_4(sc->sc_ess_mem_res, (reg))
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#define AR40XX_REG_BARRIER_WRITE(sc) bus_barrier((sc)->sc_ess_mem_res, \
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0, (sc)->sc_ess_mem_size, BUS_SPACE_BARRIER_WRITE)
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#define AR40XX_REG_BARRIER_READ(sc) bus_barrier((sc)->sc_ess_mem_res, \
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0, (sc)->sc_ess_mem_size, BUS_SPACE_BARRIER_READ)
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#define AR40XX_REG_BARRIER_RW(sc) bus_barrier((sc)->sc_ess_mem_res, \
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0, (sc)->sc_ess_mem_size, \
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BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE)
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/* Size of the VLAN table itself in hardware */
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#define AR40XX_NUM_VTU_ENTRIES 64
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#define AR40XX_NUM_PORTS 6
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#define AR40XX_NUM_PHYS 5
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/* Size of the ATU table in hardware */
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#define AR40XX_NUM_ATU_ENTRIES 2048
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struct ar40xx_softc {
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struct mtx sc_mtx; /* serialize access to softc */
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device_t sc_dev;
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uint32_t sc_debug;
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/* ess-switch memory resource */
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struct resource *sc_ess_mem_res;
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int sc_ess_mem_rid;
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size_t sc_ess_mem_size;
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/* ess-switch clock resource */
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clk_t sc_ess_clk;
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/* ess-switch reset resource */
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hwreset_t sc_ess_rst;
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/* phy update callout timer */
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struct callout sc_phy_callout;
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/* memory for the ess-psgmii config interface */
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bus_space_tag_t sc_psgmii_mem_tag;
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bus_space_handle_t sc_psgmii_mem_handle;
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bus_size_t sc_psgmii_mem_size;
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/* reference to the ipq4019-mdio interface */
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phandle_t sc_mdio_phandle;
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device_t sc_mdio_dev;
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etherswitch_info_t sc_info;
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struct {
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uint32_t phy_t_status;
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} sc_psgmii;
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struct {
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uint32_t switch_mac_mode;
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uint32_t switch_cpu_bmp;
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uint32_t switch_lan_bmp;
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uint32_t switch_wan_bmp;
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} sc_config;
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/* VLAN table configuration */
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struct {
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/* Whether 802.1q VLANs are enabled or not */
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bool vlan;
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/* Map etherswitch vgroup to 802.1q vlan */
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uint16_t vlan_id[AR40XX_NUM_VTU_ENTRIES];
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/* VLAN port membership */
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uint8_t vlan_ports[AR40XX_NUM_VTU_ENTRIES];
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/* VLAN port membership - untagged ports */
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uint16_t vlan_untagged[AR40XX_NUM_VTU_ENTRIES];
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/* PVID for each port - index into vlan_id[] */
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uint16_t pvid[AR40XX_NUM_PORTS];
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} sc_vlan;
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struct {
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bool mirror_rx;
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bool mirror_tx;
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int source_port;
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int monitor_port;
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} sc_monitor;
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struct {
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char *ifname[AR40XX_NUM_PHYS];
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device_t miibus[AR40XX_NUM_PHYS];
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if_t ifp[AR40XX_NUM_PHYS];
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} sc_phys;
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/* ATU (address table unit) support */
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struct {
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int count;
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int size;
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etherswitch_atu_entry_t entries[AR40XX_NUM_ATU_ENTRIES];
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} atu;
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};
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#endif /* __AR40XX_VAR_H__ */
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